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radv: disable CPU caching for the upload BO to reduce fetch latency
AMDGPU_GEM_CREATE_CPU_GTT_USWC should be faster when CPU reads are unexpected (because they aren't cached). Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5978>
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1 changed files with 2 additions and 1 deletions
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@ -483,7 +483,8 @@ radv_cmd_buffer_resize_upload_buf(struct radv_cmd_buffer *cmd_buffer,
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RADEON_DOMAIN_GTT,
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RADEON_FLAG_CPU_ACCESS|
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RADEON_FLAG_NO_INTERPROCESS_SHARING |
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RADEON_FLAG_32BIT,
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RADEON_FLAG_32BIT |
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RADEON_FLAG_GTT_WC,
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RADV_BO_PRIORITY_UPLOAD_BUFFER);
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if (!bo) {
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