Commit graph

629 commits

Author SHA1 Message Date
Faith Ekstrand
1fbc73836e intel: Drop intel_mem.c/h
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37803>
2025-10-16 01:19:45 +00:00
Paulo Zanoni
b75e0462ec intel: unify parameters for the exec ioctl retries
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Add the common magic numbers in a header file and make the functions
use them.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
6d6b22b734 intel/xe: unify behavior with i915.ko regarding ENOMEM on DRM_IOCTL_XE_EXEC
When the system is under memory pressure (which can happen, for
example, during CI runs), don't immediately give up the exec ioctl
(which, for Vulkan, will result in the device being declared lost).
Instead, retry a little bit just like we do for i915.ko.

This is a trade-off.

One of the reasons to *not* have unified behavior regarding ENOMEM
between i915.ko and xe.ko is the fact that xe.ko uses vm_bind, so if
the user tried to bind more memory than it is able to, we'll just keep
getting ENOMEM as long as we retry the ioctl. We now have a retry
limit, so we'll eventually return the error.

On the other hand, if the problem is other applications consuming all
the memory, having the retry loop may really help avoid unnecessarily
marking the device as lost, since one of our retries may eventually
succeed.

I believe the tradeoff of "we'll now eventually succeed in some cases
where it's possible to succeed, at the expense of retrying for a few
seconds until giving up in cases where we would never be able to
succeed" is an improvement.

If xe.ko ever gives us a way to differentiate between the two
different reasons for ENOMEM, we'll be able to make things much
better. We can also tune our timeouts if needed.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
680daeea63 intel/i915: warn the user about repeated execbuf ENOMEM after ~2s
By this point, the user may have noticed their game is not drawing any
new frames, so perhaps an error message might help.

This would also, of course, help identifying ENOMEM problems in our CI
runs.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
dc1877a0a1 intel/i915: give up the execbuf ioctl after ~16s of ENOMEMs
If nothing has freed memory until that point, return the error, which
may make the upper layers report the device as lost. It could be that
the system is under very very heavy swapping and that waiting a little
more would make it work, but let's try 16s for now.

v2: Bring down the timeout from ~60s to ~16s (José).

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
7b1e9af900 intel/i915: sleep a little bit between retries of the execbuf ioctl
If the ioctl is returning ENOMEM, incessantly retrying does not seem
to be the best way to proceed. After the second retry, sleep 0.1ms,
then more each time, giving the CPU some time to run the other threads
and processes, in the hope that whatever is eating all the memory
might eventually return it.

If the problem is the current thread, then busy looping won't help
either, so here we at least save some power before the user kills the
app.

v2: Adjust the control flow and the sleep time.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
d19a051714 intel/i915: add i915_gem_execbuf_ioctl()
Unify the common code for i915.ko execbuf submission between Iris and
Anv. I plan to add more code to this function in the next patches.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Tim Van Patten
f90e0f0797 intel: Convert getenv() to os_get_option()
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
os_get_option() is a wrapper for getenv() that checks properties in
Android. It should be a no-op for other OS but will allow full use of
env vars in Android.

The environment variable names are automatically renamed by
os_get_option() and the order of precedence thus becomes:

1. getenv (non-Android)
2. debug.mesa.* (Android)
3. vendor.mesa.* (Android)
4. mesa.* (Android, as a fallback for older versions)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37587>
2025-09-25 17:01:18 -06:00
Faith Ekstrand
d7416ebc19 intel/gem: Add an intel_gem_supports_dma_buf_sync_file() helper
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36783>
2025-08-16 00:04:46 -04:00
Qiang Yu
196569b1a4 all: rename gl_shader_stage to mesa_shader_stage
It's not only for GL, change to a generic name.

Use command:
  find . -type f -not -path '*/.git/*' -exec sed -i 's/\bgl_shader_stage\b/mesa_shader_stage/g' {} +

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:40 +08:00
Lionel Landwerlin
e52c1c3ba4 intel: reuse intel_urb_config for mesh
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36512>
2025-08-01 11:35:06 +00:00
Lionel Landwerlin
be16985c82 intel: move deref_block_size to intel_urb_config
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36512>
2025-08-01 11:35:05 +00:00
Antonio Ospite
ddf2aa3a4d build: avoid redefining unreachable() which is standard in C23
In the C23 standard unreachable() is now a predefined function-like
macro in <stddef.h>

See https://android.googlesource.com/platform/bionic/+/HEAD/docs/c23.md#is-now-a-predefined-function_like-macro-in

And this causes build errors when building for C23:

-----------------------------------------------------------------------
In file included from ../src/util/log.h:30,
                 from ../src/util/log.c:30:
../src/util/macros.h:123:9: warning: "unreachable" redefined
  123 | #define unreachable(str)    \
      |         ^~~~~~~~~~~
In file included from ../src/util/macros.h:31:
/usr/lib/gcc/x86_64-linux-gnu/14/include/stddef.h:456:9: note: this is the location of the previous definition
  456 | #define unreachable() (__builtin_unreachable ())
      |         ^~~~~~~~~~~
-----------------------------------------------------------------------

So don't redefine it with the same name, but use the name UNREACHABLE()
to also signify it's a macro.

Using a different name also makes sense because the behavior of the
macro was extending the one of __builtin_unreachable() anyway, and it
also had a different signature, accepting one argument, compared to the
standard unreachable() with no arguments.

This change improves the chances of building mesa with the C23 standard,
which for instance is the default in recent AOSP versions.

All the instances of the macro, including the definition, were updated
with the following command line:

  git grep -l '[^_]unreachable(' -- "src/**" | sort | uniq | \
  while read file; \
  do \
    sed -e 's/\([^_]\)unreachable(/\1UNREACHABLE(/g' -i "$file"; \
  done && \
  sed -e 's/#undef unreachable/#undef UNREACHABLE/g' -i src/intel/isl/isl_aux_info.c

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36437>
2025-07-31 17:49:42 +00:00
Caio Oliveira
887642b0f2 intel: Add INTEL_DEBUG=no-vrt
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Add support for disabling the VRT (Variable Register Thread) feature.
The strategy here is to force the old BRW_MAX_GRF limit for the
register allocator (locks the upper limit) and make sure
ptl_register_blocks() always return that amount of blocks (locks
the lower limit).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35781>
2025-07-13 21:11:02 +00:00
Sagar Ghuge
0c4e1c9efc intel/common: Add helper for compute thread group dispatch size
The recommended settings is just a guidance and not a programming
requirement as per the Bspec.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35904>
2025-07-10 22:08:36 +00:00
José Roberto de Souza
59d361043e intel/common: Use as much as possible spec recommended values for compute engine async thread limits
Spec recommended values should give us a good balance between progress
in render and compute engines, also with less possibility of values
it will reduce the number of times that we need to emit
STATE_COMPUTE_MODE reducing the number of stalls in the compute engine.

Cc: stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35563>
2025-06-23 18:57:25 +00:00
José Roberto de Souza
080b9a165c intel/common: Add function to compute optimal compute engine async thread limits
Spec has several restrictions to the values we program to compute
engine async thread limits.
Without those we risk hit deadlocks, so here adding a function to
return the optimal value based on those restrictions.

Cc: stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35563>
2025-06-23 18:57:24 +00:00
Calder Young
6f28364541 intel_aux_map: Avoid creating new table pages when removing
Fixes #13241, where iris_bufmgr occasionally deadlocks while allocating buffers.

The deadlock happens when iris_bufmgr.c calls intel_aux_map_unmap_range while
holding the bufmgr lock, with a range that includes pages that were never created,
which can happen because the iris_resource that adds aux mappings will sometimes
use a slightly larger buffer with an offset to ensure the resource is aligned
correctly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35266>
2025-06-02 20:10:49 +00:00
Kenneth Graunke
1dfed59c49 intel: Use devinfo->urb.min_entries[GS and TCS] for setting URB configs
We were not using the minimum values from devinfo for anything.  For
tessellation control, the minimum value is 0, so we continue taking
MAX2 of that with 1 when tessellation is enabled so we have at least
something guaranteed to be present.  For geometry, the minimum value
is already non-zero (and updated by the previous patch).

This will have the side-effect of raising the minimum number of URB
entries for geometry stages.  This is currently not known to fix
anything, but should be more closely following the documentation.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33764>
2025-03-10 17:23:07 -07:00
José Roberto de Souza
a13a6656dd intel: Add function to check if PXP is supported in Xe KMD
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30723>
2025-03-06 16:25:04 +00:00
José Roberto de Souza
e146e573f7 anv: Add support to create protected bo and protected exec_queue in Xe KMD
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30723>
2025-03-06 16:25:03 +00:00
José Roberto de Souza
008ac818ba intel/common: Retry GEM_CONTEXT_CREATE when PXP have not finished initialization
If PXP initialization is not completed and application requested a
protected context the GEM_CONTEXT_CREATE will wait up to 250ms for
PXP to finish initialization but if that do not happens it will
return a error and set errno to EIO.
This patch add the missing retry handling.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30723>
2025-03-06 16:25:03 +00:00
Tapani Pälli
4a41564619 intel/common: fix mi_builder_test issue
Fixes intel_gfx20_mi_builder_test failures on LNL.

Fixes: bb31287d24 ("intel: Initialize upper 32bits of drm_xe_sync.handle")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33366>
2025-02-04 12:57:19 +00:00
José Roberto de Souza
bb31287d24 intel: Initialize upper 32bits of drm_xe_sync.handle
Some compiles don't initialize the upper 32bits of the union that has
u64 addr and u32 handle.
Similar to previous patches but doing that for code in intel/misc.

Cc: stable
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33172>
2025-02-02 21:34:45 -08:00
Francisco Jerez
67cb23a4b1 intel/common/xe2+: Allow SIMD32 PS for all multisample cases.
These don't seem to be disallowed by recent hardware anymore.  Stop
disabling SIMD32 due to hardware restrictions of multisample
rasterization, since it should have better performance, and on Xe3+
there may be no shader variant available other than SIMD32.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32664>
2025-01-29 23:39:32 +00:00
Alyssa Rosenzweig
164a161279 meson: project-wide fs = import('fs')
reduces a bit of boilerplate.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33242>
2025-01-28 23:01:32 +00:00
Dylan Baker
d9429229cf intel/tests: Fix missing assignment of error condition
Coverity notices that `err` might be used uninitialized, which is true
as we don't assign the value we want to check! Fix that assignment so
the EXPECT_EQ macro does what we expect.

CID: 1635272
Fixes: 6b931a68c7 ("intel/common: Implement Xe KMD in mi_builder tests")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32849>
2025-01-03 00:53:49 +00:00
Dylan Baker
5420fc16d6 intel/tests: Fix coverity warning about possibly leaked memory
If the assert were to fail the memory would leak, which is pretty
harmless in a unit test, but the fix is trivial.

CID: 1635429
Fixes: 6b931a68c7 ("intel/common: Implement Xe KMD in mi_builder tests")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32849>
2025-01-03 00:53:49 +00:00
Caio Oliveira
d918edaf9a intel/common: Enable mi_builder test for PTL
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32194>
2024-11-20 01:47:04 +00:00
Caio Oliveira
6b931a68c7 intel/common: Implement Xe KMD in mi_builder tests
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32194>
2024-11-20 01:47:04 +00:00
Caio Oliveira
3998602d0e intel/common: Prepare mi_builder tests to support Xe KMD
No functional change, just move i915 specific data to a struct
and check for kmd_type where appropriate.  This will make the
next patch (which adds Xe KMD support here) cleaner.

This patch had to make intel_kmd.h header C++ friendly so it
can use its symbols.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32194>
2024-11-20 01:47:04 +00:00
Caio Oliveira
3735652be8 intel/common: Properly dispose resources in mi_builder tests
Since we will already use SetUp()/TearDown(), remove the ctor/dtor
that now would be unused.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32194>
2024-11-20 01:47:04 +00:00
Matt Turner
b3a14d7b91 intel: Avoid unaligned pointer access
Avoids the sanitizer error:

```
../src/intel/common/intel_debug_identifier.c:122:15: runtime error: member access within misaligned address 0x7f5ca8b32051 for type 'struct intel_debug_block_base', which requires 4 byte alignment
0x7f5ca8b32051: note: pointer points here
 66 30 29  00 03 00 00 00 10 00 00  00 00 00 00 00 00 00 00  00 01 00 00 00 08 00 00  00 00 00 00 00
              ^
```

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32098>
2024-11-14 01:05:02 +00:00
Felix DeGrood
bf96702985 intel/measure: increase size of filename malloc to account for \0
Corrects regression caused by prior commit that created memory
overwrite by not mallocing enough space for filename string.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32013>
2024-11-06 22:12:29 +00:00
Felix DeGrood
99e8502013 intel/measure: defer file open until first write
Fixes abort on steam.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31938>
2024-11-04 20:25:14 +00:00
Felix DeGrood
f345019830 intel/measure: add nogl feature
Do not trigger INTEL_MEASURE for ogl apps with INTEL_MEASURE=nogl

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31938>
2024-11-04 20:25:14 +00:00
Jordan Justen
f59ae1ec10 intel/dev: Add Xe3 support to get_l3_list()
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31838>
2024-10-26 07:39:30 +00:00
Caio Oliveira
366f63fd88 intel/brw: Enable mi_builder test for Xe2
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31299>
2024-10-01 16:03:35 -07:00
José Roberto de Souza
2f7c9f906d intel: Split anv_xe_wait_exec_queue_idle() and move part of it to common/
Split anv_xe_wait_exec_queue_idle() into 2 functions, the first
function creates the syncobj and prepares it to be signaled when the
last workload in queue is completed.

And the second one that calls the first function, then waits for the
syncobj to be signaled and destroy the syncobj.

The main reason for that is that the first function can be reused in
Iris and a future patch will add another user, so lets share it.

No changes in behavior are expected here.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30958>
2024-09-19 23:12:44 +00:00
Dylan Baker
7556521417 intel: replace (uint64_t - uint64_t) > 0 with uint64_t > uint64_t
As coverity points out, if the second uint64_t was greater than the
first (I don't think it actually can be), then the overflow would result
in the check succeeding when it shouldn't. We could cast this to an
integer type, but since we have uint64_t, we'd need int128_t for that.
Instead, replace the comparison to 0 with a direct comparison, since
that would give the correct result without potential to overflow.

CID: 1604833
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31175>
2024-09-16 17:12:17 +00:00
José Roberto de Souza
600d88ab3c intel: Remove INTEL_ENGINE_CLASS_COMPUTE and INTEL_ENGINE_CLASS_COPY parameters
It has been a while that the GuC version with the compute engine fix
was released, same for the KMD uAPI to query the GuC firmware version.
So at this point this parameters do more harm than good.

Also just setting those don't enable the async compute and copy engines
this is not enabled by default on i915.

If user wants to disable or enable usage of those engines a better
approach would be use ANV_QUEUE_OVERRIDE.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30593>
2024-08-13 21:15:31 +00:00
Lionel Landwerlin
6145798022 intel/mi_builder: enable control flow API on Gfx9+
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30539>
2024-08-06 17:55:19 +00:00
Jianxun Zhang
349e7a2919 intel/common: Remove blank lines in intel_set_ps_dispatch_state() (xe2)
Backport-to: 24.2
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29907>
2024-07-26 21:02:24 +00:00
Jianxun Zhang
cb7f816fc4 intel/common: Ensure SIMD16 for fast-clear kernel (xe2)
Add a restriction on SIMD mode for fast-clear pixel
shader according to the Bspec.

Backport-to: 24.2
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29907>
2024-07-26 21:02:24 +00:00
Sushma Venkatesh Reddy
2f6919e6c2 intel/clflush: Utilize clflushopt in intel_invalidate_range
On MTL ChromeOS boards, during AI based video conference, we were
observing a lot of overhead from invalidations. Upon debug, it was found
that we were using clflush in this function and that isn't efficient.

With this change, while executing compute workloads like zoo models, we
are getting ~25% performance improvements in a best case scenario.

Rework:
 * Jordan: Call intel_clflushopt_range() rather than
   __builtin_ia32_clflushopt() because intel_mem.c is not compiled
   with -mclflushopt.

Backport-to: 24.1 24.2
Signed-off-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30238>
2024-07-20 16:10:16 +00:00
Mauro Rossi
87ad3ca0ac intel/common: fix building error in intel_common.c
Fixes the following building error:

../out_src/src/intel/common/intel_common.c:29:4: error: implicit declaration of function 'free' is invalid in C99 [-Werror,-Wimplicit-function-declarat
ion]
   free(engine_info);
   ^
1 error generated.

Fixes: 5b8b4f78 ("intel/dev: Add engine_class_supported_count to intel_device_info")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29975>
2024-07-02 23:35:26 +00:00
David Heidelberg
68215332a8 build: pass licensing information in SPDX form
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29972>
2024-06-29 12:42:49 -07:00
Sushma Venkatesh Reddy
d52dd5a9e9 anv/drirc: add option to provide low latency hint
GuC offers a mechanism for KMD/UMD to provide workload hints and one of
that strategy is low latency hint. We can utilize this hint when the
workload is more latency sensitive like compute usecases.

Signed-off-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28282>
2024-06-28 21:45:59 +00:00
Jianxun Zhang
1c92b31888 intel/genxml,blorp,common: Update 3DSTATE_PS command (xe2)
From Bspec 56423 (r58507), the legacy full resovling and
partial resolving options are gone since Xe2. They also
cause hang on Xe2 if not disabled.

Some suggested code from Nanley Chery <nanley.g.chery@intel.com> is
included.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29906>
2024-06-26 05:25:43 +00:00
José Roberto de Souza
5b8b4f7878 intel/dev: Add engine_class_supported_count to intel_device_info
Next patch will need to frequently get the count of supported engine
for compute and copy engines, so to reduce the overhead of doing
KMD queries at every call here caching this information into
intel_device_info struct.

With that ANV and Iris would need to set this information as intel/dev
can't depend on intel/common, so here adding a single function
to update intel_device_info with all fields filled by intel/common
functions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29899>
2024-06-25 14:16:45 +00:00