Commit graph

1458 commits

Author SHA1 Message Date
Timur Kristóf
ff6c585121 radv: Add queue family argument to some functions.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25770>
2023-10-19 14:35:00 +00:00
Timur Kristóf
12a753f8d2 radv: Use new WRITE_DATA helper in more places.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25770>
2023-10-19 14:35:00 +00:00
Timur Kristóf
107473162e radv: Refactor WRITE_DATA helper function.
Create a version of this function that takes a CS and queue family.
move it to radv_cs.h so it can be called from multiple other files.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25770>
2023-10-19 14:35:00 +00:00
Timur Kristóf
1b988af0ad radv: Move radv_cp_wait_mem to radv_cs.h and add queue family argument.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25770>
2023-10-19 14:35:00 +00:00
Timur Kristóf
cd41d9e96d radv: Only call si_cp_dma_wait_for_idle on GFX and ACE queues.
This command is only supported on GFX and ACE.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25770>
2023-10-19 14:35:00 +00:00
Samuel Pitoiset
1f77f52bbe radv: skip GDS allocation for NGG streamout on GFX11
Only GDS OA is needed on GFX11.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25284>
2023-10-12 16:58:22 +00:00
Samuel Pitoiset
f0abdaea9f amd/llvm,aco,radv: implement NGG streamout with GDS_STRMOUT registers on GFX11
According to RadeonSI, this is required for preemption, user queues,
and we only have to wait for VS after streamout which should be more
performant.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25284>
2023-10-12 16:58:22 +00:00
Samuel Pitoiset
7397502a1f radv: disable primitive restart for non-indexed draws on GFX11
Primitive restart is also applied to non-indexed draws on AMD GPUs. On
GFX11, DISABLE_FOR_AUTO_INDEX can be set but we will need a different
solution for older GPUs.

This fixes all line related flakes in CI (at least).

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25639>
2023-10-12 06:33:40 +00:00
Samuel Pitoiset
3c61fd029b radv: fix re-emitting streamout descriptors for NGG streamout
In a scenario like:
CmdBindTransformFeedbackBuffers()
BeginTransformFeedback()
CmdDraw() --> streamout descriptors emitted
EndTransformFeedback() --> streamout descriptors emitted as 0 (disabled)
CmdDraw()
BeginTransformFeedback()
CmdDraw() --> streamout descriptor not re-emitted
EndTransformFeedback()

Fix this by re-emitting streamout descriptors when streamout is
enabled/disabled because a buffer size of 0 acts like a disable bit.

This fixes dEQP-VK.transform_feedback.simple.backward_dependency_indirect*
on NAVI31.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25583>
2023-10-06 22:51:31 +00:00
Samuel Pitoiset
67ed899cd6 radv: remove absolute_depth_bias workaround
This was only used with Path of Exile and the game bug seems fixed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25198>
2023-09-19 07:53:51 +00:00
Rhys Perry
f6f9c07efe radv: disable mesh dispatch XYZ_DIM when possible
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25222>
2023-09-18 12:04:06 +00:00
Samuel Pitoiset
f8a7c8edd1 radv: emit relocation for mesh/task shaders
RGP requires shaders to be contiguous in memory.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25144>
2023-09-14 07:19:26 +00:00
Samuel Pitoiset
312103e0ff radv: set THREAD_TRACE_MARKER_ENABLE for mesh/task draws
PAL does that.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25144>
2023-09-14 07:19:25 +00:00
Dave Airlie
147c17c28c radv: don't emit event code on video queues.
I don't know if these can be done properly, but for now just don't
emit the standard cp stuff since it hangs the GPU.

"Fixes" dEQP-VK.video.synchronizat*

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25170>
2023-09-12 21:42:28 +00:00
Konstantin Seurer
28e1e33c32 radv: Don't use the depth image view for depth bias emission
If the application records a secondary command buffer that inherits
a render pass without specifying a framebuffer, we should still be able
to emit the depth bias state properly.

Fixes: 266b2cf ("radv: implement VK_EXT_depth_bias_control")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9588
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25018>
2023-09-08 19:26:59 +00:00
Samuel Pitoiset
adaf4460bd radv: do not use pre-compiled prologs when VS is compiled separately
This wouldn't work for VS+TCS or VS+GS if they are compiled separately
on GFX9+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24933>
2023-09-08 12:43:29 +00:00
Samuel Pitoiset
871a383671 radv: adjust emitted prolog regs for merged shaders compiled separately
It should also be the merged shader stage.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24933>
2023-09-08 12:43:28 +00:00
Samuel Pitoiset
657cabe17e radv: adjust next stage for VS prologs and merged shaders compiled separately
It should be the merged shader stage.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24933>
2023-09-08 12:43:28 +00:00
Samuel Pitoiset
a2ead228ac radv: avoid emitting THREAD_TRACE_MARKER for predicated draws/dispatches
This confused RGP for example when DGC calls are skipped.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25060>
2023-09-07 22:51:51 +00:00
Samuel Pitoiset
51eb072eb6 radv: skip DGC calls when the indirect sequence count is zero with a predicate
Starfield has a lot of empty ExecuteIndirect() calls. This optimizes
them by using the indirect sequence count as predicate.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25060>
2023-09-07 22:51:51 +00:00
Samuel Pitoiset
63e0fcfb13 radv: avoid emitting SQTT markers for DGC calls
This confuses RGP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25035>
2023-09-06 07:52:50 +00:00
Samuel Pitoiset
083e7d3a92 radv: fix capturing indirect dispatches with SQTT
Looks like indirect dispatches require an event marker instead of an
event marker with dims. That makes sense somehow given the blocks size
is not known at record time with indirect dispatches.

This allows RGP to report correct block sizes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24994>
2023-09-04 06:31:40 +00:00
Samuel Pitoiset
3f517ff947 radv: fix emitting TCS epilogs if TES and GS are linked on GFX9+
TES would be NULL because everything is merged to GS.
Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24890>
2023-08-29 07:09:51 +00:00
Samuel Pitoiset
01ecaca188 radv: small cleanups in radv_emit_patch_control_points()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24890>
2023-08-29 07:09:51 +00:00
Samuel Pitoiset
9314d5c6df radv: rename tcs_shader to tcs in radv_emit_tcs_epilog_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24890>
2023-08-29 07:09:51 +00:00
Samuel Pitoiset
0004d903d4 radv: fix the per-patch data offset when TES isn't linked with TCS
When TCS and TES aren't linked together and TCS exports unused outputs,
the per-patch data offset needs to be adjusted. This is similar to the
LS-HS vertex stride when VS and TCS aren't linked together.

This fixes a bunch of failures by forcing the driver to use TCS epilogs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24776>
2023-08-24 06:03:12 +00:00
Samuel Pitoiset
1a90b7a5da radv: allow DGC on the compute queue
DGC cmdbuf on ACE are executed as IB1 without chaining because IB2
isn't supported on ACE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
2023-08-23 06:05:39 +00:00
Samuel Pitoiset
559da06755 radv: implement NV_device_generated_commands_compute
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
2023-08-23 06:05:39 +00:00
Samuel Pitoiset
131c3aa3dc radv: add tcs_out_patch_fits_subgroup to radv_tcs_epilog_key
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
2023-08-22 06:10:32 +00:00
Samuel Pitoiset
c136169062 radv: fix emitting TCS epilogs for GFX6-9
The number of SGPRs need to be adjusted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24747>
2023-08-18 07:52:22 +00:00
Samuel Pitoiset
b34c027cb0 radv: use the number of VS outputs for computing the tessellation info
When TCS isn't linked with VS, the vertex stride should be computed
from vertex outputs. This is only for shader object and shouldn't
change anything right now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24540>
2023-08-11 07:43:58 +00:00
Samuel Pitoiset
8a97302f57 radv: add support for loading the LSHS vertex stride from a SGPR
With shader object, if VS and TCS aren't linked together, the LSHS
vertex stride should be computed from the vertex outputs. Otherwise,
if an output is unused, the stride is wrong in TCS.

This is currently for GFX8 only because for merged shaders this won't
be needed but shader object on GFX9+ isn't yet a thing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24540>
2023-08-11 07:43:58 +00:00
Samuel Pitoiset
3f617b8e4a radv: allow VK_WHOLE_SIZE for pSizes in vkCmdBindVertexBuffers2()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>
2023-08-10 03:05:02 +00:00
Samuel Pitoiset
cbfd2931bb radv: implement vkCmdBindIndexBuffer2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>
2023-08-10 03:05:02 +00:00
Samuel Pitoiset
b135149986 radv: update cmdbuf scratch size info when shaders are bound
This will automatically update the scratch size info for shader object.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24502>
2023-08-08 09:28:54 +00:00
Samuel Pitoiset
ea31193532 radv: update the number of scratch waves for RT prolog at bind time
The compute scratch size is computed later because the RT stack size
can be dynamic, but the number of waves shouldn't change.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24502>
2023-08-08 09:28:54 +00:00
Samuel Pitoiset
9880224490 radv: use the RT prolog scratch size directly for tracing rays
It should be the same as the pipeline scratch size value.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24502>
2023-08-08 09:28:54 +00:00
Samuel Pitoiset
c327ab9e33 radv: track if vertex binding stride is dynamic from the cmdbuf state
This allows us to remove one more pipeline occurence during cmdbuf
recording. Note that shader object always uses dynamic vertex input.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24473>
2023-08-04 12:34:12 +00:00
Samuel Pitoiset
976297b73a radv: re-emit binning state if the framebuffer is dirty
This used to depend on the graphics pipeline, but now that everything
is dynamic it should be fine to trigger it on fb changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24473>
2023-08-04 12:34:12 +00:00
Samuel Pitoiset
0a102d3fd6 radv: track if patch control points is dynamic from the cmdbuf state
This allows us to remove one more pipeline occurence during cmdbuf
recording. Note that patch control points is always dynamic with
shader object.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24473>
2023-08-04 12:34:12 +00:00
Samuel Pitoiset
b56c288589 radv: remove redundant check in radv_cmd_buffer_after_draw()
RADV_CMD_FLAG_PS_PARTIAL_FLUSH is only used for draws with
RADV_DEBUG=syncshaders, which implies a valid graphics pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24473>
2023-08-04 12:34:12 +00:00
Samuel Pitoiset
e7cf235422 radv: add support for emitting TCS epilogs in cmdbuf
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24404>
2023-08-02 16:59:19 +00:00
Samuel Pitoiset
ce05412417 radv: add support for a TCS epilogs cache in the device
Similar to VS prologs and PS epilogs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24404>
2023-08-02 16:59:19 +00:00
Samuel Pitoiset
f4ec2e7bb3 radv,aco: move has_epilog to radv_shader_info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24404>
2023-08-02 16:59:18 +00:00
Samuel Pitoiset
f04577b789 radv: add support for dynamic TCS vertices out for TES
With shader object, if TES is compiled without a TCS, the number of
TCS vertices out might not be known at compile time and it needs to be
loaded from a user SGPR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>
2023-07-28 08:21:40 +00:00
Samuel Pitoiset
a50cec9e18 radv: use a packed user SGPR for the TES state
It only contains the number of tessellation patches for now, but it
will be used to pass the number of TCS vertices out for shader object.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>
2023-07-28 08:21:40 +00:00
Samuel Pitoiset
670bd70fa6 radv: emulate GEOMETRY_SHADER_INVOCATIONS query on RDNA1-2
The number of geometry shader invocations is correctly counted by the
hardware for both NGG and the legacy GS path but it increments for
NGG VS/TES because they are merged with GS, but it shouldn't. Fix this
by emulating the number of geometry shader invocations.

This fixes piglit/bin/arb_query_buffer_object-qbo and recent
dEQP-VK.query_pool.statistics_query.gs_invocations_no_gs.* failures
with NGG.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>
2023-07-27 09:15:22 +02:00
Samuel Pitoiset
96b97ed527 radv: declare the shader query user SGPR for emulating GS counters
This user SGPR is only declared on chips that support NGG but might
fallback to legacy GS for some reasons, like XFB. It will be used to
emulate GS counters from shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>
2023-07-27 09:13:11 +02:00
Samuel Pitoiset
e1f8cfc2b2 radv: rename NGG query state to be more generic
To use emulated GS counters for legacy GS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>
2023-07-27 09:13:11 +02:00
Samuel Pitoiset
090d88247d radv: cleanup pipeline compute emit helpers
Merge both functions together and rename the function.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24313>
2023-07-26 07:44:49 +00:00