Commit graph

12750 commits

Author SHA1 Message Date
Eric Anholt
a995bdced2 intel-gem: Emit an MI_FLUSH at glFlush() so frontbuffer rendering is flushed.
We have something similar in the X Server that covers X Server rendering, this
is the equivalent here for rendering to the front buffer.  If we cared about
avoiding this at glFlush time, we could only do this when some actual
frontbuffer rendering had occurred.

Bug #16392.
2008-07-02 11:16:30 -07:00
Eric Anholt
4b3ed4d2d1 intel-gem: Fix y-tile swizzling for our G965 with swizzle_mode=1.
Apparently in Y mode we get bit 6 ^ bit 9.  The reflect demo in 'd' mode now
displays correctly.
2008-07-02 10:21:44 -07:00
Eric Anholt
19f585a3cf intel-gem: Fix Y-tiling span setup.
The boolean that the server gives us for whether the region is tiled was
getting used as the enum for what tiling mode.  Instead, guess the correct
tiling in screen setup.

Also, fix the Y-tiling pitch setup.  The pitch to the next tile in Y is
32 scanlines, not 8.
2008-07-02 09:10:21 -07:00
Eric Anholt
e74f54793e intel-gem: Move bit 6 x tiling swizzle to a driconf option, and add new mode.
It turns out that it's not just deviceID dependent, and there's some additional
undefined factor that determines the bit 6 swizzling.  It's now controllable
with swizzle_mode=[012] until we get a response on how to automatically detect.
2008-07-01 16:14:08 -07:00
Eric Anholt
f059a33022 intel: Fix locking when doing intel_region_cow().
This was broken in the merge of 965 blit support.  It tried to lock only
when things were already locked.
2008-06-26 15:34:27 -07:00
Eric Anholt
93f701bc36 intel: Replace sprinkled intel_batchbuffer_flush with MI_FLUSH or nothing.
Most of these were to ensure that caches got synchronized between 2d (or meta)
rendering and later use of the target as a source, such as for texture
miptree setup.  Those are replaced with intel_batchbuffer_emit_mi_flush(),
which just drops an MI_FLUSH.  Most of the remainder were to ensure that
REFERENCES_CLIPRECTS batchbuffers got flushed before the lock was dropped.
Those are now replaced by automatically flushing those when dropping the lock.
2008-06-26 15:29:28 -07:00
Eric Anholt
f6abe8f0f2 Merge commit 'origin/master' into drm-gem 2008-06-24 14:08:08 -07:00
Eric Anholt
5174b85a0c intel: Fix glCopyPixels when x or y are < 0 in hw coordinates.
Nothing would get drawn as the negative coordinates broke the rectangle
intersection code that used unsigned ints.  Tested with copypix demo and
sliding the copy to the upper left.
2008-06-24 14:04:11 -07:00
Eric Anholt
9a0d773116 i965: Use the shared intel_pixel_copy.c.
This disables the textured copy implementation on 965, which didn't appear
to work (mesa copypix demo, disable the blit path, move so that regions don't
overlap and textured is used, and you get garbage).  If we resurrect this for
i965, I'd rather it used the 915-style metaops instead.  Current metaops code
left in place so that whoever picks it up has a reference.
2008-06-24 13:18:40 -07:00
Eric Anholt
744357e29c intel: Same pixel function init for everyone now. 2008-06-24 11:49:21 -07:00
Eric Anholt
f5eb62a116 intel: Avoid glBitmap software fallback for blending when no blending occurs.
Mesa demos tend to leave blending on but in GL_ONE/GL_ZERO, or
GL_SRC_ALPHA/GL_ONE_MINUS_SRC_ALPHA with a source alpha of 1.0.
2008-06-24 11:44:42 -07:00
Eric Anholt
f23adc504d intel: Merge check_blit_fragment_ops between i915/i965.
Both had some useful bits for the other.
2008-06-24 11:34:42 -07:00
Eric Anholt
90d33edf37 intel: Note reasons for blit pixel op fallbacks under INTEL_DEBUG=pix. 2008-06-24 10:50:10 -07:00
Eric Anholt
eda68cccc0 i915: Add support for accelerated glBitmap, shared from 965. 2008-06-24 10:26:57 -07:00
Eric Anholt
5989098779 i915: Fix read != draw drawable for glCopyPixels.
Taken from commit bad6e175cf.
2008-06-24 10:25:19 -07:00
Eric Anholt
98fa0aec36 i915: Allow accelerated pixel ops to be disabled with INTEL_NO_BLIT.
This matches 965.
2008-06-24 10:24:32 -07:00
Eric Anholt
a42dac1879 i915: Accumulate the VB into a local buffer and subdata it in.
This lets GEM use pwrite, for an additional 4% or so speedup.
2008-06-23 15:44:10 -07:00
Eric Anholt
62d66caeba i915: Convert to using VBs instead of inline prims. 2008-06-23 14:45:13 -07:00
Dan Nicholson
fe3b62b5b1 Ensure all objects are built when installing DRI 2008-06-22 20:29:45 -07:00
Dan Nicholson
5aa4d5a87d Don't make libmesa.a or libglapi.a depend on asm_subdirs
Since the asm_subdirs target does not actually create a file, make will
always consider that it needs to be rebuilt. If libmesa.a and libglapi.a
have asm_subdirs as a prerequisite, then they will always need to be
rebuilt, too. The correct order will be preserved by the default target,
though.

This should fix #16358.
2008-06-22 20:27:00 -07:00
Dan Nicholson
7ec5e6a032 Create $(TOP)/$(LIB_DIR) for install, too
If `make install' is run without running `make' first, the $(LIB_DIR)
will not be created. This also changes the mkdir a little bit so that it
isn't run if necessary and added `-p' so that it is immune to races.
2008-06-22 20:19:35 -07:00
Brian Paul
71d2578ac5 replace __inline and __inline__ with INLINE macro 2008-06-21 10:55:24 -06:00
Brian Paul
ba97ed2b74 replace __inline and __inline__ with INLINE macro 2008-06-21 10:52:40 -06:00
Brian Paul
cc96d54920 replace __inline and __inline__ with INLINE macro 2008-06-21 10:52:32 -06:00
Brian Paul
37f19b94ac replace __inline and __inline__ with INLINE macro 2008-06-21 10:49:45 -06:00
Brian Paul
402e7f76b1 #undef DEBUG to silence warnings 2008-06-21 10:49:40 -06:00
Brian Paul
5ee7b7912c replace __inline and __inline__ with INLINE macro 2008-06-21 10:34:38 -06:00
Brian Paul
055ab81920 replace __inline and __inline__ with INLINE macro 2008-06-21 10:34:00 -06:00
Brian Paul
24197b4901 replace __inline and __inline__ with INLINE macro 2008-06-21 10:30:01 -06:00
Brian Paul
7899270b9f replace __inline and __inline__ with INLINE macro 2008-06-21 10:27:36 -06:00
Brian Paul
2e922b0e35 replace __inline and __inline__ with INLINE macro 2008-06-21 10:24:43 -06:00
Brian Paul
2c1bead069 s/inline/INLINE 2008-06-21 10:20:54 -06:00
Brian Paul
77d917a74a remove old comments 2008-06-21 10:20:31 -06:00
Alan Coopersmith
e1f9adc274 Solaris port of Mesa 7.1 with autoconf support
Signed-off-by: Brian Paul <brian.paul@tungstengraphics.com>
2008-06-21 10:19:45 -06:00
Daniel Zhu
f30e4af734 Rename quad function to quadr to avoid clash with Solaris quad typedef
Signed-off-by: Brian Paul <brian.paul@tungstengraphics.com>
2008-06-21 10:19:45 -06:00
Alan Coopersmith
1043a7c71a Make minstall work with Solaris /bin/sh
Solaris /bin/sh doesn't set $PWD for you

Signed-off-by: Brian Paul <brian.paul@tungstengraphics.com>
2008-06-21 10:19:45 -06:00
Alan Coopersmith
4ba39c40ae Fix builds with compilers other than gcc 3.0 & newer
Add #include "glheader.h" for definition of __builtin_expect for compilers
that don't support it.

Signed-off-by: Brian Paul <brian.paul@tungstengraphics.com>
2008-06-21 10:19:45 -06:00
Brian Paul
3491cbea88 added pointer to beta/release candidates 2008-06-21 10:19:45 -06:00
Alex Deucher
dc25661099 R300: 1002:5657 is actually RV410
See bug 14289
2008-06-21 10:52:49 -04:00
Roland Scheidegger
b3f1aac95e r200: fix typo in r200TryDrawPixels parameter validation (bug 16406) 2008-06-21 02:54:14 +02:00
Brian Paul
21177c8764 mesa: tweak mipmap level selection for cube maps
This is just a hack.  After we convert the 3D texcoord into a face plus 2D
texcoord we need to recompute the partial derivatives and mipmap LOD.
But we don't have the info to do that.  Adjusting the original mipmap
level by -1 seems to give somewhat better results than before though.
2008-06-19 14:37:50 -06:00
Eric Anholt
0da9bc6a69 i915: Note the non-PBO fallback for textured drawpixels under DEBUG_PIXEL. 2008-06-18 14:35:59 -07:00
Eric Anholt
bbe80af457 i915: Restore the accelerated PBO pixel path functions after GEM changes.
The fencing code is not required, and waiting on the fences defeated one of
the purposes of the extension, which is to allow asynchronous readpixels.
2008-06-18 14:19:18 -07:00
Eric Anholt
654258a4fe Merge commit 'origin/master' into drm-gem 2008-06-18 14:07:38 -07:00
Eric Anholt
cf29ab3ba0 i915: Bug #14313: Fix accelerated (PBO) ReadPixels.
Refactoring of mine in 02d5ba8491 broke it
by failing to understand that the masking was about sign extension.
2008-06-18 13:50:49 -07:00
Xiang, Haihao
3e8aadee8b i965: add support for Intel 4 series chipsets 2008-06-18 15:33:33 +08:00
Brian Paul
3064069540 mesa: fix inconsistent use of GL_UNSIGNED_INT vs. GL_UNSIGNED_INT_24_8_EXT for Z unpacking 2008-06-17 16:44:04 -06:00
Eric Anholt
64adeb163d [intel] Fix no_rast option on non-965.
The no_rast fallback was getting partially overwritten by later TNL init,
resulting in a segfault when things were in a mixed-up state.
2008-06-17 14:14:02 -07:00
Eric Anholt
e2baf564d1 [intel-gem] Bug #16326: Fix X tile unswizzling on 965.
Apparently a bit gets flipped in the addressing for some rows of each tile.
2008-06-17 11:18:02 -07:00
Wilfried Holzke
5b5bf21874 assorted glide driver fixes 2008-06-17 10:08:22 -06:00