Commit graph

210795 commits

Author SHA1 Message Date
Valentine Burley
a2e7fbc351 radeonsi/ci: Fix radeonsi-vangogh-glcts job definition
If the pre-merge job is derived from the nightly job, it inherits
`.no-auto-retry`, which prevents Marge from retrying the job on flakes.

Reversing the order in which the pre-merge and nightly jobs derive from
each other fixes this.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36928>
2025-08-22 12:15:18 +00:00
Valentine Burley
fe54cfe403 zink/ci: Document recent flakes on a618 with Turnip
Some checks are pending
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Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36786>
2025-08-22 10:46:02 +00:00
Valentine Burley
db566c33a6 zink/ci: Add EGL coverage on Turnip
Add the usual EGL test set to the zink-tu-a618 job.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36786>
2025-08-22 10:46:02 +00:00
Qiang Yu
57942550f4 mesa: remove mtype.h include from st_atom.h
st_atom.h will be included by mtype.h later.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36751>
2025-08-22 10:01:57 +00:00
Qiang Yu
0e35f835f9 mesa: support mesh shader when glCreateShader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36751>
2025-08-22 10:01:57 +00:00
Qiang Yu
a4b6e8b1aa mesa: implement mesh shader queries
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36751>
2025-08-22 10:01:57 +00:00
Qiang Yu
9acaa409b9 mesa,glsl: add mesh shader subrotine handling
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36751>
2025-08-22 10:01:57 +00:00
Qiang Yu
7ba64547ae mesa: implement EXT_mesh_shader glGetActive* values
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36751>
2025-08-22 10:01:57 +00:00
Qiang Yu
be601af465 mesa: implement EXT_mesh_shader glGetProgrameiv values
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36751>
2025-08-22 10:01:57 +00:00
Qiang Yu
337d19c2fc mesa: implement EXT_mesh_shader glGet* values
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36751>
2025-08-22 10:01:57 +00:00
Qiang Yu
516b4fcd5a mesa,mapi: add EXT_mesh_shader extension
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36751>
2025-08-22 10:01:56 +00:00
Qiang Yu
533c701d85 Update OpenGL headers for GL_EXT_mesh_shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36751>
2025-08-22 10:01:56 +00:00
Samuel Pitoiset
db298d1b50 radv: make radv_cmd_state::dirty a 64-bit field
Some checks are pending
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More RADV_CMD_DIRTY states will be added later.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
2025-08-22 08:12:05 +00:00
Samuel Pitoiset
772f185fc0 radv: add a new dirty bit for the scissor state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
2025-08-22 08:12:05 +00:00
Samuel Pitoiset
54b79d0f50 radv: add a new dirty bit for the sample locations state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
2025-08-22 08:12:04 +00:00
Samuel Pitoiset
dc3371332e radv: add a new dirty bit for the blend constants state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
2025-08-22 08:12:04 +00:00
Samuel Pitoiset
1be9cd43a8 radv: add a new dirty bit for the VS prolog state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
2025-08-22 08:12:03 +00:00
Samuel Pitoiset
cc7b5ab0c9 radv: dirty more states when rendering begins
radv_get_ps_iter_samples() is used by :
- binning state
- rast samples state
- FS state
- MSAA state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
2025-08-22 08:12:02 +00:00
Samuel Pitoiset
80e8cb196f radv: dirty the cb render state when rendering begins
RADV_DYNAMIC_COLOR_BLEND_ENABLE trigger the cb render state, the db
shader control state and PS epilogs. Though, it's unecessary to re-emit
the db shader control and PS epilogs are already triggered when the
fb is dirty.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
2025-08-22 08:12:02 +00:00
Samuel Pitoiset
1db3d4f182 radv: dirty the depth stencil state when rendering begins
RADV_DYNAMIC_STENCIL_TEST_ENABLE only triggers
RADV_CMD_DIRTY_DEPTH_STENCIL_STATE but it's better to dirty the RADV
state than the dynamic one.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
2025-08-22 08:12:01 +00:00
Samuel Pitoiset
7694ad969e radv: add a new dirty bit for the depth bias state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36901>
2025-08-22 08:12:00 +00:00
Guilherme Gallo
76c16c4480 ci/radeonsi: Document a new flake
`spec@!opengl es 3.0@gles-3.0-transform-feedback-uniform-buffer-object`
is showing flake behavior.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36908>
2025-08-22 07:35:15 +00:00
Collabora's Gfx CI Team
62f39fca25 Uprev Piglit to 28d1349844eacda869f0f82f551bcd4ac0c4edfe
c3a3e29d59...28d1349844

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36908>
2025-08-22 07:35:15 +00:00
Collabora's Gfx CI Team
640e2eddea Uprev ANGLE to 995c4c4d89ed6a5c28b210e9c0f83eb4f8b6e2f5
6a04a50f98...995c4c4d89

- Skip tests failing on all drivers due to a CTS bug
- Disable clang options not supported by the 'unbundled' toolchain

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36908>
2025-08-22 07:35:15 +00:00
Job Noorman
24cdb0b636 ir3: emit descriptor prefetch in block dominated by its sources
Some checks are pending
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Descriptor prefetches may be generated for instructions in control flow.
This means we cannot simply emit prefetches at the end of the preamble
because that may not be dominated by all their sources. This commit uses
the helpers introduced by e7ac1094f6 ("ir3: rematerialize preamble defs
in block dominated by sources") to find the correct block to insert
prefetches.

Fixes NIR validation errors in Dying Light 2.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Fixes: 4e2a0a5ad0 ("ir3: Add descriptor prefetching optimization on a7xx")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36885>
2025-08-22 05:21:25 +00:00
Qiang Yu
dbbb46aa38 nir: compute io base for fragment shader inputs which maybe per primitive
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Some inputs is per vertex while vertex pipeline, and per primitive
when mesh pipeline. Put these inputs after other inputs to share
the same fragment shader code for two pipelines.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36749>
2025-08-22 02:42:57 +00:00
Qiang Yu
7c3f7e1046 nir: lower io support task and mesh shader
mesh shader does not have input, and we skip task shader
IO lowering like compute shader.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36749>
2025-08-22 02:42:57 +00:00
Yonggang Luo
dda1692484 util: Implement p_atomic_read for C++ properly.
../src/compiler/glsl/ast_function.cpp
..\src\util/u_cpu_detect.h(168): error C2220: the following warning is treated as an error
..\src\util/u_cpu_detect.h(168): warning C4197: 'uint32_t *volatile ': top-level volatile in cast is ignored
[325/1703] Compiling C++ object src/compiler/glsl/libglsl.a.p/builtin_functions.cpp.obj

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36863>
2025-08-22 02:05:57 +00:00
Yonggang Luo
de1a2a3537 util: Remove the __declspec(dllexport) on win32 for PUBLIC export macro
As on Windows, all DLLs are exported use def files, there is no need do __declspec(dllexport) on the function marker.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36863>
2025-08-22 02:05:57 +00:00
Yonggang Luo
39e20ad563 docs: Update requirement for MSVC
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36767>
2025-08-22 01:28:23 +00:00
Yonggang Luo
a34756bbed Revert "nir: Temporarily disable optimizations for MSVC ARM64"
This reverts commit 55d153b9f5.

The msvc bug is https://developercommunity.visualstudio.com/t/Stack-overflow-compiling-C-code-to-ARM64/916235

and Fixed In: Visual Studio 2022 version 17.7

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36767>
2025-08-22 01:28:23 +00:00
Yonggang Luo
85310e912c Revert "glsl: Work around MSVC arm64 optimizer bug"
This reverts commit 86b5c9278c.

As bug https://developercommunity.visualstudio.com/t/Incorrect-ARM64-codegen-with-optimizatio/10564605

is fixed in VS 17.8.6

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36767>
2025-08-22 01:28:23 +00:00
Emma Anholt
1c0c3a2375 ir3: Don't try to use indirect access in the alias table.
Fixes validation failures about missing instr->address in gravitymark
ultra.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36896>
2025-08-22 01:04:23 +00:00
Mike Blumenkrantz
37701ba6bc glx/kopper: don't call glFlush from swapbuffers
this is redundant and leads to extra glthread syncs

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36887>
2025-08-22 00:42:28 +00:00
Mike Blumenkrantz
40b3479635 glx/egl/kopper: explicitly pass __DRI2_FLUSH_CONTEXT when appropriate
this avoids unnecessary st flushing

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36887>
2025-08-22 00:42:28 +00:00
Mike Blumenkrantz
b799622a41 kopper: don't sync glthread from swapbuffers
dri_flush already does this

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36887>
2025-08-22 00:42:28 +00:00
Guilherme Gallo
7939e43cc8 ci: Disable vmware farm
Some checks are pending
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It seems offline, and it is blocking MR pipelines, such as:
- https://gitlab.freedesktop.org/mesa/mesa/-/pipelines/1495481
- https://gitlab.freedesktop.org/mesa/mesa/-/pipelines/1495510

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36922>
2025-08-22 00:10:11 +00:00
Daivik Bhatia
20eddec0bb v3d: remove unused functions from v3d_bufmgr.h
v3d_bo_set_reference, v3d_bo_unreference_locked_timed and
v3d_wait_seqno functions available since first v3d commit
45bb8f2957 ("broadcom: Add V3D 3.3 gallium driver called "vc5",
for BCM7268.") are not used since the beginning or since the
removal of its usage at 85f26828fe ("broadcom: only support
v42 and v71") and b225cdcecc ("broadcom/vc5: Update the UABI
for in/out syncobjs").

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36012>
2025-08-21 23:54:58 +00:00
Martin Roukala (né Peres)
2aaab5369a Revert "ci: disable the valve-kws farm"
This reverts commit d1839f09b1, now that
the gateway is back online.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36920>
2025-08-21 23:11:28 +00:00
Connor Abbott
03388baa6d tu, freedreno: Document GRAS shading rate LUT
Name the register, which is actually an array, and initialize it
programmatically using the same table as the per-primitive case. This
should produce the same value as the old hardcoded constant.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36892>
2025-08-21 22:48:32 +00:00
Connor Abbott
1dff4dcb0b ir3: Use common shading rate lookup table
This should be identical to the old one.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36892>
2025-08-21 22:48:32 +00:00
Connor Abbott
8d9e3bda44 freedreno: Add common VRS helpers
These will be used by ir3 and turnip.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36892>
2025-08-21 22:48:32 +00:00
Connor Abbott
658fe94241 ir3: Simplify and rationalize shading rate LUT
We had an extra 16 entries in the VK-to-HW table that were clearly
unnecessary because Vulkan does not allow values greater than 16 for the
primitive shading rate. This appears to be an extra debug/test thing
added by the blob. Similarly there were unused entries in the HW-to-VK
table that shouldn't be necessary. Delete them.

The HW-to-VK table was also inconsistent about whether invalid values
should be 0 or 11, fix that too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36892>
2025-08-21 22:48:32 +00:00
Iván Briano
07057e270c anv, hasvk: allow using a 3D image as a resolve target
Some checks are pending
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This is allowed by the specification, as the following VUIDs state:

   VUID-vkCmdResolveImage-srcImage-04446
   If dstImage is of type VK_IMAGE_TYPE_3D, then for each element of
   pRegions, srcSubresource.layerCount must be 1

   VUID-vkCmdResolveImage-srcImage-04447
   If dstImage is of type VK_IMAGE_TYPE_3D, then for each element of
   pRegions, dstSubresource.baseArrayLayer must be 0 and
   dstSubresource.layerCount must be 1

New tests coming for it: dEQP-VK.pipeline.*.multisample.3d.*

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36895>
2025-08-21 20:53:42 +00:00
Mike Blumenkrantz
8b2642db84 st/program: stop calling st_finalize_nir() unnecessarily for variants
Some checks are pending
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st_finalize_nir() only affects:
* sampling
* uniforms
* shader images

if a nir pass doesn't affect one of these three things or does not
yield progresss, then there is no need to call this

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36879>
2025-08-21 19:24:49 +00:00
Mike Blumenkrantz
45b6aa1eb7 glthread: mark internal bufferobjs for the ctx they belong to
this avoids unlimited unnecessary atomics

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36889>
2025-08-21 18:54:48 +00:00
Samuel Pitoiset
cbe42a4c43 radv: rename RADV_CMD_DIRTY_TESS_STATE to RADV_CMD_DIRTY_TCS_TES_STATE
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36875>
2025-08-21 18:36:35 +00:00
Samuel Pitoiset
3d1efbce98 radv: add a new dirty bit for the rast samples state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36875>
2025-08-21 18:36:35 +00:00
Samuel Pitoiset
ea6cb5e7bf radv: add a new dirty bit for the FSR state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36875>
2025-08-21 18:36:35 +00:00
Samuel Pitoiset
604296a282 radv: add a new dirty bit for the ngg culling state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36875>
2025-08-21 18:36:34 +00:00