It doesn't depend on the clc data being provided externally, so no
need to tie it there, we can re-use it for GL and Vulkan compute.
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14367>
This is a bit fragile. The algorithm is essentially:
- Let the driver track state for non-dual-bound resources.
- For resources that are dual-bound as SSBO/image and a second
bind point, assume they're being used as UAVs.
- When a MemoryBarrier is issued, dirty all destination bind points
so they re-assert their state, and if the destination is not UAV,
temporarily suppress UAV state re-assertion.
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14342>
In a future change, the bindings for images and SSBOs will start to
overlap in GL (using a separate space to disambiguate them)
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14342>
There are currently 3 different "environments" supported by this backend,
and they have slightly different semantics for how resources are accessed,
which is only going to get a little weirder when GL images start getting
supported. To try to make things less confusing, use an explicit enum
with heavy documentation on what's different between them.
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14342>
The CI changes are because WARP fails really hard at gather,
with crashes when doing it on a 1x1 or Nx1 texture, and incorrectly
applying swizzling to the result vector instead of the actual texture
accesses.
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14161>
Previously, the lowering was for 8/16/64-bit values, or 8/16-component
vectors. Now, it also handles write masks on 32-bit 1/2/3/4-component
vectors.
DXIL looks like it supports putting an interesting write mask in the
buffer store intrinsic, but DXC never generates stores with write
masks, and multiple drivers completely ignore the write mask.
Also, set the write mask properly on the output intrinsic.
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14294>
dxil_nir_opt_alu_deref_srcs will always return false because
the progress variable is declared both for the function and also
inside the loop.
Spotted by a unused-but-set-variable warning from clang
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14290>
_mesa_hash_table_u64_search() returns the data directly, not an
hash_entry object. We also need to take the descriptor set into account
for this pass to work properly on Vulkan shaders.
Fixes: 46bc7cf678 ("microsoft/compiler: Rewrite sampler splitting pass to be smarter and handle derefs")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13912>
../src/microsoft/spirv_to_dxil/dxil_validation.cpp: In function ‘bool validate_dxil(dxil_spirv_object*)’:
../src/microsoft/spirv_to_dxil/dxil_validation.cpp:129:12: error: ‘stderr’ was not declared in this scope
129 | fprintf(stderr, "DXIL validation only available in Windows.\n");
| ^~~~~~
Fixes: 37c366e283 ("microsoft/spirv_to_dxil: Add DXIL validation to spirv2dxil")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13736>
After running the (renamed) dxil_nir_split_typed_samplers pass, the
shader will have either:
* Textures, which map to D3D SRVs
* Bare samplers, which map to D3D bare samplers
* Images, which map to D3D UAVs
There shouldn't be any remaining samplers with type information
Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13390>
With the `gtest` protocol meson will add some extra arguments to the
test to generate better junit results, which may be useful. This
protocol is only available in meson 0.55.0+, so keep using the default
`exitcode` protocol for meson older than that.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8484>
The only big change is that lower_vars_to_explicit no longer assigns
a driver_location for images. That means that the storage for the
format/order loads is no longer implicitly "allocated" in the middle
of the kernel args. Instead, manually add the storage for that to the end
of the input args buffer.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
The LLVM-SPIRV translator can include a bunch of capabilities into the
generated SPIRV which is not what you always want. That include
internal Intel specific capabilities from the translator.
v2: Rename options
Fixup checks (Jesse)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13113>
