NVIDIA hardware doesn't take a vertex index for per-vertex I/O.
Instead, it takes an offset into the primitive. This has to be fetched
using a combination of SR_INVOCATION_INFO and the ISBERD instruction.
To keep things simple and allow for maximum CSE, we do the lowering in
NIR and patch the load/store_per_vertex_input/output intrinsic.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25000>
Some of us want to lower all TXD with min_lod regardless of whether or
not it's shadow or cube or whatever.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25000>
Extracted from nir_lower_to_source_mods, this is useful for back-ends
which don't want to rely on NIR source and destination modifiers.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25000>
We have competent lowering in NIR already available.
Drivers exposing CAP_DOUBLES but not SHADER_CAP_DROUND:
- d3d12 (NIR lowers ~0 if the underlying impl doesn't do floats)
- svga (Now sets the NIR lowering options)
- softpipe (Doesn't do GL4 so you can't use doubles anyway)
- llvmpipe (Lowers dround_even in NIR and passees the rest through
successfully)
- zink (NIR lowers ~0 if the underlying impl doesn't do floats,
otherwise passes things through successfully, except needed
dround_even lowering to avoid lavapipe regression with
native doubles)
- r600 (sets NIR rounding lowering flags, and lowers all fsign)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25777>
Right now some drivers are doing dsign lowering in GLSL and haven't had to
have a NIR path due to there not being a corresponding vulkan driver. We
want this in NIR now so that we can retire that batch of GLSL lowering
code.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25777>
Most drivers that can expose GL4 were claiming the cap anyway (llvmpipe,
softpipe, zink, iris, nvc0, radeonsi, r600, freedreno, d3d12), and just
doing lowering in NIR if nessary.
crocus was only claiming the cap for gen8, but the backend compiler
enables NIR lowering regardless.
svga is the only other GL4 driver that didn't set it, and we can just set
the NIR lowering flag.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25777>
Previous behavior was to default to "main"/fs, this wasn't nice
when the SPIR-V module had a single shader that didn't match that spec.
New behavior is to look at the available shaders:
- if there's only one, use just use it
- if multiple, narrow down using --stage and --entry as criteria
- if still multiple after narrowing down, print the list and fail
Note you can use just one --stage or --entry if that already narrows
down to a single match. Note that in SPIR-V it is valid to have a
shader module with two shaders sharing the same entry-point name but
different stages. Because of that in rare cases both --stage and
--entry will be needed.
This patch should remove the need of using --stage and --entry for most
of the uses of spirv2nir.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25461>
When there's ambiguity about what shader to use, list the shaders.
Conveniently print in the command line argument for, so can be copied
pasted.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25461>
This are the abbreviations we use elsewhere in Mesa. For convenience we
make them case insensitive. Old names still work for compatibility.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25461>
Refactor it to not fail, just return MESA_SHADER_NONE. Caller
takes care of handling error. Exposed so can be used by spirv2nir
program.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25461>
Replaced by the new NIR pass.
i915g results:
total instructions in shared programs: 510678 -> 510714 (<.01%)
total temps in shared programs: 30429 -> 30426 (<.01%)
rv370 results:
total instructions in shared programs: 737649 -> 737656 (<.01%)
instructions in affected programs: 82 -> 89 (8.54%)
total temps in shared programs: 112093 -> 112094 (<.01%)
temps in affected programs: 6 -> 7 (16.67%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24763>
i915g and r300-r400 don't have if statements, and discards are all
nir_intrinsic_discard_if. We can flatten those discards here, saving a
separate GLSL pass to try to do so.
i915g:
GAINED: shaders/closed/xcom-enemy-unknown/413.shader_test FS
rv370:
GAINED: shaders/closed/xcom-enemy-unknown/12.shader_test FS
GAINED: shaders/closed/xcom-enemy-unknown/122.shader_test FS
GAINED: shaders/closed/xcom-enemy-unknown/132.shader_test FS
GAINED: shaders/closed/xcom-enemy-unknown/145.shader_test FS
GAINED: shaders/closed/xcom-enemy-unknown/146.shader_test FS
GAINED: shaders/closed/xcom-enemy-unknown/19.shader_test FS
GAINED: shaders/closed/xcom-enemy-unknown/413.shader_test FS
GAINED: shaders/closed/xcom-enemy-unknown/415.shader_test FS
Closes: #9918
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24763>
Shifts always need 32 bit for their second source.
Fixes: c70d94a889 ("nir_lower_mem_access_bit_sizes: Support unaligned stores via a pair of atomics")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25740>
in Android 12 build have error "ninja:
'external/mesa/src/compiler/isaspec/README.rst', needed by
'out/target/product/s/obj/MESON_MESA3D_GEN/.timestamp', missing and
no known rule to make it" because commit:
d48d8aefdf (docs: Move isaspec out of
drivers/freedreno) modify isaspec.rst Location.
Signed-off-by: cheyang <cheyang@bytedance.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25697>
Map __constant with a 64-bit address format to load_global_constant instead of
load_global. This notably allows nir_opt_preamble to hoist the load.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25625>
The astc compute decode and lut creation code is copied
from https://github.com/Themaister/Granite/
Always set DECODE_8BIT idea is copied from
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19886
v2: use astc glsl shader code (Chia-I Wu)
v3: fix 32bit compilation error (Christopher Snowhill)
v4: use pitch to copy in vk_create_fill_image_visible_mem() function
pass correct layer to decode_astc()
v5: use existing ASTCLutHolder (Chia-I Wu)
v6: use only staging buffer (Chia-I Wu)
use texel buffer for partition table (Chia-I Wu)
v7: use 2DArray for input and output
v8: check for == mem_property (Chia-I Wu)
do not use vk_common* functions (Chia-I Wu)
squash single buffer patch (Chia-I Wu)
fix for minTexelBufferOffsetAlignment (Chia-I Wu)
avoid wasting 4 slots (Chia-I Wu)
remove partition_tbl_mask (Chia-I Wu)
remove wrong bindings count (Chia-I Wu)
use binding names from glsl code (Chia-I Wu)
use ARRAY_SIZE (Chia-I Wu)
use VkFormat for getting partition table index (Chia-I Wu)
fix mutex lock (Chia-I Wu)
image layout should be based on function call (Chia-I Wu)
VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE is wrong (Chia-I Wu)
add vk_texcompress_astc tag to helpder functions (Chia-I Wu)
remove write_desc_set_count (Chia-I Wu)
use desc_i++ (Chia-I Wu)
add assert for desc_i count at end (Chia-I Wu)
remove unused vk_create_map_texel_buffer() function (Chia-I Wu)
dynamically create the lut offset (Chia-I Wu)
offset not to pass as push contant (Chia-I Wu)
v9: use correct stoage and sampled flags (Chia-I Wu)
always pass single_buf_size (Chia-I Wu)
query drivers for minTexelBufferOffsetAlignment (Chia-I Wu)
remove blank lines (Chia-I Wu)
remove unnecessary if check in destroy (Chia-I Wu)
name label as unlock instead of fail and pass (Chia-I Wu)
use prog_glslang.found() (Chia-I Wu)
add offset,extent check to astc shader (Chia-I Wu)
v10: prog_glslang can be undefined in meson.build (Chia-I Wu)
v11: remove with_texcompress_astc and use required in find_program (Chia-I Wu)
v12: offset are aligned to blk size (Chia-I Wu)
v13: texel_blk_start should be under vulkan if check (Chia-I Wu)
dst image layout is always VK_IMAGE_LAYOUT_GENERAL (Chia-I Wu)
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24672>
