Commit graph

133563 commits

Author SHA1 Message Date
Dylan Baker
a181bc63ae .pick_status.json: Update to 8ed874d73f 2021-02-10 15:10:54 -08:00
Dylan Baker
392b1722c2 bump version for 21.0-rc4 2021-02-05 08:54:18 -08:00
Tapani Pälli
76ba9da691 i965: use aligned malloc for context instead of ralloc
Fixes: 3175b63a ("mesa: don't allocate matrices with malloc")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4118
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8805>
(cherry picked from commit b609d4677d)

Conflicts:
	src/mesa/drivers/dri/i965/brw_performance_query.c
2021-02-04 14:08:35 -08:00
Jonathan Marek
e2a27c1438 turnip: don't always use 3d ops for blit_image
Revert this accidentally committed testing change.

Fixes: 872c4bcd27 ("turnip: implement z-scaling and z-mirroring BlitImage")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8707>
(cherry picked from commit bdaa4d1ee0)
2021-02-04 14:08:35 -08:00
Rhys Perry
9cab7e3988 radv: correctly enable WGP_MODE for tessellation control
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8811>
(cherry picked from commit 0602d4ec69)
2021-02-04 14:08:35 -08:00
Rhys Perry
a0fe068d9e radv: correctly enable WGP_MODE for NGG and GS
Previously, we would set WGP_MODE on GFX10+ and then only on GFX10.
Because we used bitwise or, the result was WGP_MODE being set on GFX10+.

We also set the wrong bit, S_00B848_WGP_MODE instead of S_00B228_WGP_MODE.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8811>
(cherry picked from commit 2338e4ad36)
2021-02-04 14:08:34 -08:00
Rhys Perry
ed4d51e33a radv: round-up num_records division in radv_flush_vertex_descriptors
Vertex attribute bounds checking is supposed to be done per-attribute:
   is_oob = index * stride + attrib_offset + attrib_size > buffer_size
but we were obtaining num_records by dividing the buffer size by the
stride, making it per-vertex:
   is_oob = index * stride + (stride - 1) >= buffer_size

An example from Dead Cells (Wine) is:
attribute bindings: 0, 1, 2
attribute formats: r32g32, r32g32, r32g32b32a32
attribute offsets: 0, 0, 0
binding buffers: all the same buffer
binding offsets: 0, 8, 16
binding sizes: 128, 120, 112
binding strides: 32, 32, 32

Workaround this issue without switching to per-attribute descriptors by
rounding up the division. This is still incorrect, but it should now no
longer consider in-bounds attributes out-of-bounds.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3796
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4199
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8835>
(cherry picked from commit 56cd79b63d)
2021-02-04 14:08:34 -08:00
Jason Ekstrand
0b9988c507 nir: Drop the lower_mem_constant_vars declaration
The function was removed in c730ace12b.

Fixes: c730ace12b "nir,clover: Drop nir_lower_mem_constant_vars"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8834>
(cherry picked from commit 774fae34f0)
2021-02-04 14:08:34 -08:00
Boris Brezillon
98e928ea6a panfrost: Fix tiler job injection (again)
2f1947b39c ("panfrost: Fix tiler job injection") had the tests
inverted: WRITE_VALUE jobs are only needed on Midgard, not Bifrost.

Cc: mesa-stable
Fixes: 2f1947b39c ("panfrost: Fix tiler job injection")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8808>
(cherry picked from commit ec6c6f610c)
2021-02-04 14:08:34 -08:00
Yevhenii Kolesnikov
06faacb8b1 nir/from_ssa: consider defs in sibling blocks
If def a and def b are in sibling blocks, the one with higher
parent_instr's index does not necessarily come after the other.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3712
Fixes: 943ddb9458 "nir: Add a better out-of-SSA pass"
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8246>
(cherry picked from commit fd05620e43)
2021-02-04 14:08:34 -08:00
Dave Airlie
3dd7df6c24 radv: move queue object to a common base object
This is needed to use the new dispatch layer code.  While we're here, we
clean up the context on the error path.

Fixes: 9b1138e3f0 "radv: implement VK_EXT_private_data"
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8676>
(cherry picked from commit f695957421)
2021-02-03 09:15:35 -08:00
Bas Nieuwenhuizen
6753936d0e radv: Do not hash vk_object_base in descriptor set layout.
It contains potentially pointer-y stuff.

Fixes: 178adfa6a8 ("radv: use the base object struct types")
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8809>
(cherry picked from commit 1eaefe6cfd)
2021-02-03 09:15:34 -08:00
Dylan Baker
78107eaaac .pick_status.json: Update to b609d4677d 2021-02-03 09:15:18 -08:00
Rob Clark
e307e3df0c mesa: Remove _mesa_destroy_context()
There was only one caller, an error path in mesa/st.  But this is now
incorrect as we need align_free().  Just remove it.

Fixes: 55e853d823 ("mesa/st: Allocate the gl_context with 16-byte alignment.")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8801>
(cherry picked from commit 824ae64477)
2021-02-01 09:09:50 -08:00
Marek Olšák
33127367ef mesa: flush glBegin/End before changing GL_DEPTH_STENCIL_TEXTURE_MODE
Fixes: 23e81b93bb "mesa: Add core API support for GL_ARB_stencil_texturing (from 4.3)."

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8181>
(cherry picked from commit a1f16b59b3)

Conflicts:
	src/mesa/main/texparam.c
2021-02-01 09:09:47 -08:00
Eric Anholt
7bd9982ba1 mesa/st: Allocate the gl_context with 16-byte alignment.
The _ModelProjectMatrix matrix embedded inside has members inside of it
marked as 16-byte aligned, and so the context also has to be 16-byte
aligned or access to those members would be invalid.  I believe the
compiler used this to use better 16-byte-aligned load/stores to other
members of the context, breaking when the context's alignment was only 8
(as normal mallocs guarantee).

Fixes: 3175b63a0d ("mesa: don't allocate matrices with malloc")
Tested-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8783>
(cherry picked from commit 55e853d823)
2021-02-01 09:07:46 -08:00
Alyssa Rosenzweig
4169bef1b6 pan/bi: Fix M1/M2 decoding in disassembler
C's definition of the % operator has a footgun around sign conversion.
Avoid it and just use bitwise arithemtic instead like the hardware
would, fixing the disassembly and making buggy assembly more obvious.

Fixes: 08a9e5e3e8 ("pan/bi: Decode M values in disasm")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
(cherry picked from commit a69c73988b)
2021-02-01 09:07:45 -08:00
Samuel Pitoiset
26f5850810 radv: fix centroid with VRS coarse shading
Ported from RadeonSI.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8775>
(cherry picked from commit 718c4726f3)
2021-02-01 09:07:44 -08:00
James Park
b913f2b097 gallium/tessellator: Fix warning suppression
Single-line version of MSVC warning suppression does not extend beyond
the #endif directive. Use push/disable/pop instead.

Also suppress 26452, which is a similar analysis warning.

This could also be fixed with constexpr if, but C++17 would be required.

Fixes: 790516db0b ("gallium/swr: fix gcc warnings")
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8093>
(cherry picked from commit 3c7062417b)
2021-02-01 09:07:44 -08:00
Icecream95
cdebbc1846 panfrost: Add the tiler heap to fragment jobs
In some cases the GPU reads from the tiler heap in fragment jobs, so
always add it to GPU jobs.

Fixes faults in many applications that use multiple windows
(e.g. Firefox, plasmashell).

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4157
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8773>
(cherry picked from commit 4fec6c9448)
2021-02-01 09:07:43 -08:00
Marek Olšák
5f2c793c81 glthread: fix interpreting vertex size == GL_BGRA for vertex attribs
Fixes: c9c9f57b02 - glthread: track pointers and strides for Pointer & EXT_dsa attrib functions
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4116

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8753>
(cherry picked from commit 76c322a48d)
2021-02-01 09:07:42 -08:00
Dylan Baker
c2a8ca1468 .pick_status.json: Update to e870796113 2021-02-01 09:07:35 -08:00
Ian Romanick
d27c65945e i965: Don't parse driconf again
It was already parsed in intelInitScree2, and the results are stored in
the screen.

Fixes: d67ef48580 ("i965/screen: Allow drirc to set 'allow_rgb10_configs' again.")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7387>
(cherry picked from commit 0f1a8f8a6d)
2021-01-28 08:53:50 -08:00
Marek Olšák
1c0cfc597a radeonsi: fix centroid with VRS coarse shading
This has no effect on other shading. It should have been the default value.

Fixes: c3432ad852 - radeonsi: add an option to enable 2x2 coarse shading for non-GUI elements

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8726>
(cherry picked from commit dbf09c0c26)
2021-01-28 08:53:50 -08:00
Dylan Baker
e51293a06b .pick_status.json: Update to 9003735b91 2021-01-28 08:53:17 -08:00
Nanley Chery
87d20549c8 iris: Disable aux as needed in iris_flush_resource
Disable compression in iris_flush_resource if the resource lacks a
modifier. When a caller wants to prepare such a resource for sharing
(via eglCreateImage for example), this change enables all reference
holders to access the resource in a common manner - without compression.

This fixes misrendering with 3D-accelerated qemu. A piglit test which
reproduces qemu's behavior, ext_image_dma_buf_import-export-tex, is also
enabled to pass.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2678
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8663>
(cherry picked from commit 40d6b92de9)
2021-01-27 10:10:52 -08:00
Nanley Chery
587d1f75fb gallium: Flush GL API resources in eglCreateImage
Some drivers need to be able to remove compression from resources before
they are handed to consumers that wouldn't understand or expect it.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8663>
(cherry picked from commit b26f510978)
2021-01-27 10:10:51 -08:00
Nanley Chery
88f2c1ab02 gallium: Map _DRI_IMAGE_FORMAT_NONE to NULL
Many entries in the dri2_format_table have _DRI_IMAGE_FORMAT_NONE as the
dri_format. Make the result of dri2_get_mapping_by_format a tad more
well-defined by returning NULL when this format is passed into it.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8663>
(cherry picked from commit 0a8cc88202)
2021-01-27 10:10:51 -08:00
Daniel Schürmann
1c4a92a7cd aco: fix nir_intrinsic_ballot with wave32
Found by inspection.

Fixes: 21db083504 ('aco/wave32: Allow setting the subgroup ballot size to 64-bit.')

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8703>
(cherry picked from commit b06609e903)
2021-01-27 10:10:50 -08:00
Caio Marcelo de Oliveira Filho
343f1aba20 compiler: Use util/bitset.h for system_values_read
It is currently a bitset on top of a uint64_t but there are already
more than 64 values.  Change to use BITSET to cover all the
SYSTEM_VALUE_MAX bits.

Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8585>
(cherry picked from commit 9f3d5e99ea)
2021-01-27 10:10:50 -08:00
Samuel Pitoiset
de78b1c88d nir/algebraic: mark more optimization with fsat(NaN) as inexact
These optimizations are duplicated from the main optimization table
to the late one... And I missed some in the original fix.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3368
Fixes: bc123c396a ("nir/algebraic: mark some optimizations with fsat(NaN) as inexact")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8716>
(cherry picked from commit 4c3ad4d065)
2021-01-27 10:10:49 -08:00
Timur Kristóf
172ae30602 radv: Only enable sparse features on Polaris and newer.
On Fiji, the CTS image can cause a hang when these are enabled.
Let's enable them for Polaris and newer only, for now.

Gitlab: #4136
Fixes: 9f43b44bf0
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8646>
(cherry picked from commit 3c03fa5801)
2021-01-27 10:10:49 -08:00
Dylan Baker
032b9c4167 .pick_status.json: Update to 86ff78e8fe 2021-01-27 10:10:46 -08:00
Dylan Baker
59417ecc84 VERSION: bump for 21.0.0-rc3 2021-01-27 09:28:13 -08:00
Daniel Schürmann
bd506cb19c aco/optimizer: don't copy-prop logical phis
This is dangerous w.r.t. LCSSA-phis.

Totals from 746 (0.54% of 139391) affected shaders (Navi10):
CodeSize: 8592160 -> 8568156 (-0.28%); split: -0.30%, +0.02%
MaxWaves: 5172 -> 5171 (-0.02%); split: +0.02%, -0.04%
Instrs: 1653949 -> 1648489 (-0.33%); split: -0.36%, +0.03%
Cycles: 49474892 -> 49329224 (-0.29%); split: -0.33%, +0.03%
VMEM: 137574 -> 137421 (-0.11%); split: +0.18%, -0.29%
SMEM: 42391 -> 42439 (+0.11%); split: +0.12%, -0.01%
VClause: 26946 -> 26943 (-0.01%)
Copies: 130902 -> 126176 (-3.61%); split: -4.05%, +0.43%
Branches: 54891 -> 54556 (-0.61%); split: -0.64%, +0.03%
PreVGPRs: 53941 -> 53939 (-0.00%)

This has a slight effect on RA due to affinity changes.

Cc: 20.3
Cc: 21.0

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8260>
(cherry picked from commit cd870d1b6a)
2021-01-26 09:18:44 -08:00
Daniel Schürmann
215266234b aco/optimizer: don't propagate subdword temps of different size
It could happen that due to inconsistent copy-propagation

  v1 = p_parallelcopy v2b

instructions were left after optimization on GFX8.

Cc: 20.3
Cc: 21.0

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8260>
(cherry picked from commit 856fd4750d)
2021-01-26 09:18:38 -08:00
Caio Marcelo de Oliveira Filho
5d8a6fd48d nir: Add a data pointer to the callback in nir_remove_dead_variables
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8706>
(cherry picked from commit cb7352ae95)
2021-01-26 09:12:19 -08:00
Caio Marcelo de Oliveira Filho
96de6d7754 spirv: Don't remove variables used by resource indexing intrinsics
In Vulkan, for some variable modes, the generated NIR will have derefs
pointing to resource index intrinsics instead of the variable.  This
was letting nir_remove_dead_variables pass remove those variables,
which would lose information relevant for later passes after
spirv2nir.

Add a set to keep track of such variables and prevent them to be
removed when producing the NIR output.

Issue reported by Rhys.

Fixes: c4c9c780b1 ("spirv: Remove more dead variables")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8706>
(cherry picked from commit 10b3eecd36)
2021-01-26 09:10:55 -08:00
David McFarland
f0bb52cf52 radv: fix divide by zero with no tesselation params
Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7878>
(cherry picked from commit e3f56601e0)
2021-01-26 09:09:12 -08:00
Sagar Ghuge
72dcdac82b anv: Skip CCS ambiguate which preceed fast-clears
We can skip CCS ambiguate if followed by a fast clear within render
pass.

v2: (Jason)
- Check array layer as well since we only fast clear first layer and
  first LOD.
- Don't drop fast clear check while doing resolve operation.

Fixes: d5849bc840 "anv: Skip HiZ and CCS ambiguates which preceed fast-clears"
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6988>
(cherry picked from commit 001722b3a3)
2021-01-26 09:08:47 -08:00
Francisco Jerez
70887f253c intel/gen12: Fix memory corruption issues in fused Gen12 parts.
According to the BSpec page for MEDIA_VFE_STATE, on Gen12 platforms
"if a fused configuration has fewer threads than the native POR
configuration, the scratch space allocation is based on the number of
threads in the base native POR configuration".  However we currently
use the subslice count from devinfo->num_subslices[0], which only
includes the subslices currently enabled by the platform fusing.  This
leads to scratch space underallocation and occasional hangs.

The problem is likely to affect most Gen12 GPUs with less than 96 EUs.
GFXBench5 Aztec Ruins is able to reproduce the issue fairly reliably.

Fixes: 9e5ce30da7 "intel: fix the gen 12 compute shader scratch IDs"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8636>
(cherry picked from commit e2c5ef6cd6)
2021-01-26 09:08:46 -08:00
Icecream95
85bb7eff53 panfrost: Use normal malloc/free instead of ralloc for surfaces
Fixes a double-free in some Qt5 WebEngine apps (e.g. ghostwriter).

Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8678>
(cherry picked from commit 1d967132f3)
2021-01-26 09:08:45 -08:00
Sagar Ghuge
90f8855080 anv: Invalidate the correct AUX-TT entry
While invalidating the AUX-TT entries, we have to consider the surface
offset as well otherwise, we will end up invalidating another surface's
CCS portion.

For eg. when we have HiZ+CCS and STC_CCS enabled, both will use the CCS
portion allocated at the end of BO. While invalidating the CCS portion
of stencil buffer, we will end up invalidating the CCS portion that
belongs to the depth main surface and vice-versa, if the surface offset
is not considered.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4123
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Acked-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8677>
(cherry picked from commit dab229ef69)
2021-01-26 09:08:45 -08:00
Lionel Landwerlin
a9faff69f6 anv: fix invalid programming of BLEND_STATE
We can't enable Logic Op & Color Buffer Blend. The Vulkan spec seems
to say Logic Op discards blending.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3767
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8691>
(cherry picked from commit 998f38bd99)
2021-01-26 09:08:44 -08:00
Bas Nieuwenhuizen
fd5c91e656 radv: Use stricter HW resolve swizzle compat check.
D and linear are both DISPLAY micro tiling according to ac_surface
but don't work together. This fixes an issue with GFX9+.

This fixes the SkQP WritePixelsNonTexture_Gpu test.

Fixes: 69ea473eeb ("amd/addrlib: update to the latest version")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8665>
(cherry picked from commit 12ce72fcfc)

Conflicts:
	src/amd/vulkan/radv_meta_resolve.c
2021-01-26 09:08:43 -08:00
Christian Gmeiner
fcb61d4b46 etnaviv: handle NULL views in set_sampler_views
Passing NULL for the views parameter should be the same as passing an
array of NULL, according to the documentation. So let's respect that
detail.

This fixes a crash when using GALLIUM_HUD. The wrong handling of views
parameter was causing problems starting with
2813688f8d ("gallium/hud: don't use cso_context to restore VBs, constbuf 0 and sampler views").

Cc: <mesa-stable@lists.freedesktop.org>
Fixes: c9e8b49b88 ("etnaviv: gallium driver for Vivante GPUs")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8670>
(cherry picked from commit 81ab9fe2d0)
2021-01-26 09:05:13 -08:00
Eric Anholt
dacf8a517b gallium: Fix leak of shader images on context destruction.
Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8530>
(cherry picked from commit efff70e73f)
2021-01-26 09:05:11 -08:00
Eric Anholt
a132e464f8 panfrost: Stub out set_shader_images().
If PAN_MESA_DEBUG=deqp is set to enable testing, then we advertise shader
images to get GLES3.1, even though we don't have any of the shader image
funcs hooked up.  This caused breakage when cso started unbinding shader
images at context destruction.

Just stub out the function for now, you'll still segfault when creating an
image.

Cc: mesa-stable (for the next commit)
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8530>
(cherry picked from commit f259fcae83)
2021-01-26 09:05:11 -08:00
Eric Anholt
9a332e1a29 swr: Don't report support for shader images.
gallivm has images support, but this driver doesn't.

Cc: mesa-stable (for the upcoming shader image leak fix)
Acked-by: Jan Zielinski <jan.zielinski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8530>
(cherry picked from commit 9445c3d59f)
2021-01-26 09:05:10 -08:00
Mike Blumenkrantz
80302b96f4 zink: flag gfx pipeline dirty using newer mechanism
this wasn't updated during rebases

Fixes: 334759d850 ("zink: implement passthrough tcs shader injection")

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8696>
(cherry picked from commit c3719f3b9b)
2021-01-26 09:05:09 -08:00