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Author	SHA1	Message	Date
Mary Guillemard	a0826ad205	panfrost: Add cs_* helpers for v11 CSF instructions ... This adds all bit operations and an helper to indirectly wait on scorebards. Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35089>	2025-05-28 17:03:30 +00:00
Mary Guillemard	d0c76cd2ac	panvk: Depends on Panthor scoreboard information ... Instead of hardcoding scoreboard count and mask, we now derive those informations from Panthor CSIF properties. We still limit iters to 5 as we currently don't support more. Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35089>	2025-05-28 17:03:30 +00:00
Mary Guillemard	80b06fb82f	panfrost: Allow up to 16 for scoreboards on CSF instructions on v11+ ... The max value on v11+ is 16. Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35089>	2025-05-28 17:03:30 +00:00
Alyssa Rosenzweig	d696b19dd0	nir/lower_int64: add bitfield_reverse lowering ... now that we can represent 64-bit bitfield_reverse in NIR, we need a lowering for it as well. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35198>	2025-05-28 16:29:30 +00:00
Alyssa Rosenzweig	c3fb0645d8	nir/lower_alu: compact bitcount lowering ... while in the area. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35198>	2025-05-28 16:29:30 +00:00
Alyssa Rosenzweig	759dc70bde	nir: generalize bitfield_reverse bit size ... No reason we can't reverse other bit sizes, we just need to generalize the constant folding & bit size lowering. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35198>	2025-05-28 16:29:30 +00:00
Christian Gmeiner	2e6c565b77	vc4: Use nir_shader_intrinsics_pass(..) for vc4_nir_lower_blend(..) ... Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com> Reviewed-by: Juan A. Suarez <jasuarez@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35205>	2025-05-28 16:12:22 +00:00
Christian Gmeiner	f2b03202e7	vc4: Use nir_shader_intrinsics_pass(..) for vc4_nir_lower_io(..) ... Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com> Reviewed-by: Juan A. Suarez <jasuarez@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35205>	2025-05-28 16:12:22 +00:00
Alyssa Rosenzweig	d7c0355725	asahi: advertise ASTC HDR formats ... Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35132>	2025-05-28 14:49:06 +00:00
Erik Faye-Lund	be74e9ffaf	pan/lib: wire up ASTC HDR formats ... This exposes GL_KHR_texture_compression_astc_hdr, which makes a few piglit tests go from fail to pass. Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35132>	2025-05-28 14:49:06 +00:00
Erik Faye-Lund	d9dbf5cebf	panfrost: set decode_hdr when needed ... When using the HDR-formats, we need to set decode_hdr to actually get HDR values. Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35132>	2025-05-28 14:49:06 +00:00
Erik Faye-Lund	33ad5d447e	panfrost: correct texfeat-bit for ASTC LDR ... These formats don't depend on the ASTC HDR texfeat, they depend on the ASTC HDR texfeat. The ASTC HDR texfeat simply adds support for more endpoint encodings to these formats. Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35132>	2025-05-28 14:49:06 +00:00
Erik Faye-Lund	95d7df1ce3	gallium/st: enable KHR_texture_compression_astc_hdr when supported ... Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35132>	2025-05-28 14:49:06 +00:00
Erik Faye-Lund	fd42cdfc01	mesa/main: support astc_hdr formats ... This gets a bit annoying because Vulkan has separate format enums for the LDR and HDR ASTC formats, whereas OpenGL uses the same format enums, but allows additional color-endpoint encodings when HDR is supported. Either of these behaviors makes sense on their own, but since we share pipe_format definitions between the APIs, we need to resolve this. This patch does that by checking if the HDR extension is supported, and always using the HDR formats. This works, because the HDR formats are supersets of the LDR formats in terms of features. Not all of the LDR formats have HDR variants, either because they're sRGB or 3D, which either is nonsensical or just not exposed by the ASTC HDR extensions. So we only need to map a subset of the ASTC formats with this HDR-aware mapping. Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35132>	2025-05-28 14:49:06 +00:00
Erik Faye-Lund	6cd898dbc2	util/format: add util_format_is_astc_hdr()-helper ... This will be used later in the series. Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35132>	2025-05-28 14:49:06 +00:00
Erik Faye-Lund	ccc7833f16	util/format: add ASTC HDR formats ... These are just the float variations of the normal LDR formats. Not all LDR formats have an HDR variant. Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35132>	2025-05-28 14:49:06 +00:00
Daniel Stone	ae8704fbdb	ci/panfrost: Demote T720 to nightly runs only ... We only have two of these boards, and can't get more as they're EOL. Demote them to nightly until we can source different boards with this SoC, and more of them. Signed-off-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35200>	2025-05-28 12:48:45 +00:00
Mary Guillemard	8965e60118	panfrost: Fix varying descriptors on v12+ ... Since introduction of support for more than 16 varyings, support for v12+ has been broken on certain apps. This manifest with a black screen on all GL Core 1.x apps like glxgears or xonotic in legacy mode. The issue is a wrong buffer index being used on v12 for the varying descriptors. Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Fixes: cd2ca0ac22 ("panfrost: Enable more than 16 varyings on v9+") Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com> Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com> Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35201>	2025-05-28 12:16:35 +00:00
Marek Olšák	2b716972c6	radeonsi: enable 16-bit ALU, LDS, uniforms on gfx8 ... Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> Tested-by: Dieter Nützel Dieter@nuetzel-hh.de on gfx8 (Polaris 20) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34959>	2025-05-28 11:01:12 +00:00
Marek Olšák	45cbd60c3b	glsl,gallium: add an option not to lower mediump tex & image dst ... ACO doesn't support it for gfx8. Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> Tested-by: Dieter Nützel Dieter@nuetzel-hh.de on gfx8 (Polaris 20) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34959>	2025-05-28 11:01:12 +00:00
Marek Olšák	bd5d623674	glsl: fix sampler and image type checking in lower_precision ... Use the param type, not the referenced variable. The referenced variable can be a structure, which wouldn't be recognized as a sampler or image. Fixes: 733bee57eb - glsl: lower samplers with highp coordinates correctly Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> Tested-by: Dieter Nützel Dieter@nuetzel-hh.de on gfx8 (Polaris 20) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34959>	2025-05-28 11:01:12 +00:00
Marek Olšák	0dc5d649ea	winsys/amdgpu: fall back to a normal priority without root in the winsys ... Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>	2025-05-28 10:23:15 +00:00
Marek Olšák	2ef6aa5934	winsys/amdgpu: pass PIPE_CONTEXT_* flags to ctx_create ... instead of using our own flags; also REALTIME_PRIORITY is never used, so the relevant code is removed Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>	2025-05-28 10:23:15 +00:00
Marek Olšák	7f441beaf6	winsys/amdgpu: set the priority for gfx user queues ... Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>	2025-05-28 10:23:15 +00:00
Marek Olšák	6785e42511	winsys/amdgpu: add a high priority gfx queue ... Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>	2025-05-28 10:23:15 +00:00
Marek Olšák	59e93b02e0	winsys/amdgpu: add enums for queues using the fence rings ... Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>	2025-05-28 10:23:15 +00:00
Marek Olšák	4bf2a28334	winsys/amdgpu: fix running out of 32bit address space with high FPS ... Reproduced with gfxbench5 gl_tess_off. Fixes: 4d486888ee - winsys/amdgpu: rewrite BO fence tracking by adding a new queue fence system Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>	2025-05-28 10:23:14 +00:00
Marek Olšák	d9e681ee3f	winsys/amdgpu: use alt_fence for all video queues ... It's already used by VCN queues. This reduces the size of sequence numbers stored per BO. Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>	2025-05-28 10:23:14 +00:00
Marek Olšák	f75e54453f	winsys/amdgpu: print an error when we fail to allocate VA ... Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>	2025-05-28 10:23:14 +00:00
Samuel Pitoiset	8596150ae8	aco: implement bitfield_reverse for types other than 32-bits ... Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34583>	2025-05-28 09:52:12 +00:00
Daniel Schürmann	5b4d284493	aco/isel: use vector-aligned operands for image_bvh64_intersect_ray ... Totals from 93 (0.12% of 79377) affected shaders: (Navi48) MaxWaves: 1376 -> 1368 (-0.58%) Instrs: 3583500 -> 3581861 (-0.05%); split: -0.05%, +0.00% CodeSize: 18792300 -> 18785296 (-0.04%); split: -0.04%, +0.00% VGPRs: 8652 -> 8592 (-0.69%); split: -1.25%, +0.55% Latency: 20861347 -> 20834407 (-0.13%); split: -0.17%, +0.04% InvThroughput: 4032604 -> 4028020 (-0.11%); split: -0.14%, +0.03% VClause: 90507 -> 90525 (+0.02%); split: -0.01%, +0.03% Copies: 279429 -> 277839 (-0.57%); split: -0.58%, +0.01% Branches: 100260 -> 100251 (-0.01%) PreVGPRs: 8949 -> 8771 (-1.99%) VALU: 1955635 -> 1954053 (-0.08%); split: -0.08%, +0.00% SALU: 477347 -> 477329 (-0.00%); split: -0.01%, +0.01% VOPD: 69 -> 61 (-11.59%) Totals from 93 (0.12% of 79377) affected shaders: (Navi31) MaxWaves: 1376 -> 1374 (-0.15%) Instrs: 3442606 -> 3440344 (-0.07%); split: -0.07%, +0.00% CodeSize: 17801008 -> 17790476 (-0.06%); split: -0.07%, +0.01% VGPRs: 8652 -> 8556 (-1.11%); split: -1.25%, +0.14% Latency: 20590943 -> 20542279 (-0.24%); split: -0.27%, +0.03% InvThroughput: 3978133 -> 3969497 (-0.22%); split: -0.25%, +0.03% VClause: 91784 -> 91769 (-0.02%); split: -0.05%, +0.03% Copies: 277177 -> 275263 (-0.69%); split: -0.70%, +0.01% Branches: 100098 -> 100092 (-0.01%); split: -0.02%, +0.01% PreVGPRs: 9021 -> 8843 (-1.97%) VALU: 2001794 -> 1999893 (-0.09%); split: -0.10%, +0.00% SALU: 419504 -> 419559 (+0.01%); split: -0.01%, +0.02% VOPD: 77 -> 64 (-16.88%) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>	2025-05-28 09:24:17 +00:00
Rhys Perry	c50f9541e4	aco/tests: Add tests for vector-aligned operands ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>	2025-05-28 09:24:17 +00:00
Daniel Schürmann	b5382faa9c	aco/validate: validate register assignment of vector-aligned operands ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>	2025-05-28 09:24:17 +00:00
Daniel Schürmann	9091c3bf5b	aco/ra: add affinities for MIMG vector-aligned operands ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>	2025-05-28 09:24:17 +00:00
Daniel Schürmann	fb689f133e	aco/ra: handle register assignment of vector-aligned operands ... Vector-aligned operands are handled by temporarily allocating a vector-SSA value for the duration of the instruction. On completion of the register assignment, the individual operands are assigned to the reserved register space and, if necessary, parallelcopies are emitted. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>	2025-05-28 09:24:17 +00:00
Daniel Schürmann	92b1154397	aco/ra: Always rename copy-kill operands, even if the temporary doesn't match ... This makes it independent of whether the operand already got renamed or not. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>	2025-05-28 09:24:17 +00:00
Daniel Schürmann	4fad3514a9	aco/ra: only change registers of already handled operands in update_renames() ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>	2025-05-28 09:24:17 +00:00
Daniel Schürmann	51a2e1eb94	aco/ra: don't use kill-flags as indicator in get_reg_create_vector() ... We are about to re-use this function for vector-aligned operands. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>	2025-05-28 09:24:17 +00:00
Daniel Schürmann	3d8b355f22	aco/assembler: support vector-aligned operands on MIMG instructions ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>	2025-05-28 09:24:17 +00:00
Daniel Schürmann	8cb1700c74	aco/print_ir: print parenthesis around vector-aligned operands ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>	2025-05-28 09:24:16 +00:00
Daniel Schürmann	6aabcb02a1	aco/print_ir: only print 'lateKill' if requested via print_kill flag ... Also only print lateKill for actually killed operands. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>	2025-05-28 09:24:16 +00:00
Daniel Schürmann	a9645fdd89	aco: introduce concept of vector-aligned Operands ... Operand::isVectorAligned indicates that the Operand is part of a vector consisting of multiple operands. Therefore, it must reside in a register aligned with the next Operand. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>	2025-05-28 09:24:16 +00:00
Daniel Schürmann	a4fa3935fd	aco/live_var_analysis: set same lateKill flags for same operands ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>	2025-05-28 09:24:16 +00:00
Daniel Schürmann	ee0ee282b9	aco: simplify Operand() constructor ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34359>	2025-05-28 09:24:16 +00:00
Mary Guillemard	19531a0162	pan/csf: Fix typo in cs_trace_run_idvs2 ... This should have been a multiply not an add. Fix an assertion when running in tracing mode on panvk. Fixes: 79a1d98e1e ("pan/csf: make cs_builder.h usable from c++") Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35176>	2025-05-28 10:12:19 +02:00
Samuel Pitoiset	2ebfa64be7	radv: add radv_disable_hiz_his_gfx12 and enable for Mafia Definitive Edition ... This is a workaround for random GPU hangs with HiZ/HiS on GFX12 because the correct fix is complex and it will take time to be implemented properly. Mafia Definitive Edition is the first known game affected by this. Cc: mesa-stable Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13222 Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35182>	2025-05-28 07:20:26 +00:00
Marek Olšák	35c76bc7f7	nir/tcs_info: use range analysis to determine the range of tess levels ... Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35195>	2025-05-28 06:46:56 +00:00
Marek Olšák	24c3f30e4a	nir/tcs_info: gather which patch outputs are only read/written by invoc 0 ... Tested thoroughly by a shader test. Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35195>	2025-05-28 06:46:56 +00:00
Marek Olšák	a3632d7d88	nir/tcs_info: gather for all patch outputs whether they're written by all invocs ... This substantially rewrites the pass. It also makes it easier to read. Tested thoroughly by a shader test. Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35195>	2025-05-28 06:46:56 +00:00
Faith Ekstrand	6b265d9d7d	nvk: Use NAK by default on Kepler ... At this point it's way more correct than codegen. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34975>	2025-05-28 01:47:19 +00:00