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winsys/amdgpu: use alt_fence for all video queues

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It's already used by VCN queues.

This reduces the size of sequence numbers stored per BO.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>
This commit is contained in:
Marek Olšák 2025-04-30 20:05:41 -04:00 • committed by Marge Bot
parent f75e54453f
commit d9e681ee3f
2 changed files with 4 additions and 4 deletions
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6
src/gallium/winsys/amdgpu/drm/amdgpu_cs.cpp
View file

@ -877,9 +877,9 @@ static enum amd_ip_type amdgpu_cs_get_ip_type(struct radeon_cmdbuf *rcs)
static bool ip_uses_alt_fence(enum amd_ip_type ip_type)
{
/* The alt_fence path can be tested thoroughly by enabling it for GFX here. */
return ip_type == AMD_IP_VCN_DEC ||
ip_type == AMD_IP_VCN_ENC ||
ip_type == AMD_IP_VCN_JPEG;
return ip_type != AMD_IP_GFX &&
ip_type != AMD_IP_COMPUTE &&
ip_type != AMD_IP_SDMA;
}
static void amdgpu_cs_destroy(struct radeon_cmdbuf *rcs)

2
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
View file

@ -117,7 +117,7 @@ struct amdgpu_screen_winsys {
#define AMDGPU_FENCE_RING_SIZE 32
/* The maximum number of queues that can be present. */
#define AMDGPU_MAX_QUEUES 6
#define AMDGPU_MAX_QUEUES 3
/* This can use any integer type because the logic handles integer wraparounds robustly, but
* uint8_t wraps around so quickly that some BOs might never become idle because we don't