Commit graph

4387 commits

Author SHA1 Message Date
Samuel Pitoiset
ade66c1aeb radv: allow DCC MSAA fast clears if a FCE is needed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12180>
2021-08-09 09:27:52 +00:00
Samuel Pitoiset
f136838d1e radv: perform a FCE for MSAA images that might have been fast-cleared
FMASK_DECOMPRESS can't eliminate DCC fast clears. This will allow to
enable DCC MSAA fast clears that require a FCE.

Only supported on GFX10+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12180>
2021-08-09 09:27:52 +00:00
Samuel Pitoiset
3cfa3187cb radv: rework DCC, FMASK and FCE decompress path
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12180>
2021-08-09 09:27:52 +00:00
Timur Kristóf
74181ffcc5 radv: Write RSRC2_GS for NGGC when pipeline is dirty but not emitted.
The radv_emit_ngg_culling_state function won't write the
SPI_SHADER_PGM_RSRC2_GS register when it knows in advance that
radv_emit_graphics_pipeline will overwrite it anyway.

However, there is an unhandled case:

radv_emit_graphics_pipeline will not emit anything (including this
register) when the pipeline is already emitted. Hence, improve
the check in radv_emit_ngg_culling_state to consider this.

Fixes: 9a95f5487f
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12237>
2021-08-06 12:18:37 +02:00
Timur Kristóf
d911259c3a radv: Use ac_compute_late_alloc in radv_pipeline.
This aligns RADV with RadeonSI in how it handles late alloc,
making it easier for us to deal with deadlocks and such.

Also move setting the RSRC3 registers for VS, GS and NGG
into radv_pipeline.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11905>
2021-08-04 15:37:05 +00:00
Timur Kristóf
61eb3debcf radv: Don't toggle PC oversubscription for NGG culling.
We are going to add this directly to the pipeline.
If a pipeline has such a shader, NGG culling is turned on
most of the time, so it's not useful to toggle this setting.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11905>
2021-08-04 15:37:05 +00:00
Rhys Perry
39db5a569b radv: set image_dim and image_array intrinsic indices
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12190>
2021-08-04 12:09:07 +00:00
Samuel Pitoiset
ad83c06a5f radv: fix missing cache flushes when clearing HTILE levels on GFX10+
The driver should accumulate the cache flush bits because if it uses
CP DMA for clearing the last level, it won't flush.

Found by inspection.

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12170>
2021-08-03 12:59:57 +00:00
Samuel Pitoiset
ebea075feb radv: fix selecting the first active CU when profiling with SQTT
Fixes: d26bcc0f5c ("radv: always select the first active CU when profiling with SQTT")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12167>
2021-08-03 12:30:41 +00:00
Timothy Arceri
a9ed4538ab nir: add indirect loop unrolling to compiler options
This is where it should be rather than having to pass it into the
optimisation pass every time.

It also allows us to call the loop analysis pass without having to
duplicate these options which we will do later in this series.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12064>
2021-08-03 10:54:50 +00:00
Rob Clark
6edf0d8e90 driconfig: Add support for device specific config
Add support for driconf overrides on a per-device level, for cases
where we don't want to override behavior for all devices supported
by a particular driver.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12135>
2021-08-02 16:37:24 -07:00
Samuel Pitoiset
57ff4caf7f radv: init radv_image::l2_coherent when creating the layout
Otherwise, it might not be correctly initialized for Android.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12103>
2021-07-30 17:06:26 +00:00
Samuel Pitoiset
87b0962fef radv: do not use radeon_set_context_reg_seq() for only one register
radeon_set_context_reg() is a shortcut for that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12099>
2021-07-30 17:05:38 +02:00
Samuel Pitoiset
f693b94d2f radv: reduce number of emitted DWORDS for contiguous context registers
radeon_set_context_reg() emits 3 DWORDS, while
radeon_set_context_reg_seq() + 2 values only needs 4 DWORDS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12099>
2021-07-30 17:05:35 +02:00
Pierre-Eric Pelloux-Prayer
3914bd457b amd/registers: fix fields conflict detection
The existing code handled the case where the new definition of the
same field was larger than the old one.
This commit adds a check to handle the reverse case: the new def
is smaller than the old one (= so writing using the merged macro
would affect the next fields).

The affected fields are:
* LGKM_CNT (in SQ_WAVE_IB_STS)
* DONUT_SPLIT (in VGT_TESS_DISTRIBUTION)
* HEAD_QUEUE (in GDS_GWS_RESOURCE)

DONUT_SPLIT is the only one used by radeonsi/radv.

Fixes: e6184b0892 ("amd/registers: scripts for processing register descriptions in JSON")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12063>
2021-07-30 08:50:38 +00:00
Alejandro Piñeiro
476dc3c050 vulkan: add vk_spec_info_to_nir_spirv util method
All vulkan drivers have been copying anv's code to convert
VkSpecializationInfo into nir_spirv_specialization.

Recently there was a Vulkan spec change on allowed values for
VkSpecializationInfo, and all drivers got affected.

This commits creates a new helper, and uses it on all Vulkan Mesa
drivers.

v2: use (uint8_t*) castings, instead of void*, to avoid C2036 with
    MSVC (detected by the CI, inspired on what radv was doing)

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12047>
2021-07-29 03:28:52 +00:00
Samuel Pitoiset
72f55cf7c4 radv: implement VK_EXT_shader_atomic_float2
Some floating atomic instructions are not available on GFX8-9.
No LLVM support.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12060>
2021-07-27 08:44:36 +02:00
Samuel Pitoiset
0497588eac radv: allow unused VkSpecializationMapEntries
Fixes future CTS: dEQP-VK.pipeline.spec_constant.*.basic.*unused_*

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12062>
2021-07-26 14:09:09 +02:00
Georg Lehmann
c6bcafcc07 radv: Use c_msvc_compat_args.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11610>
2021-07-23 20:28:58 +00:00
Jason Ekstrand
e83fe65cd8 radv,radeonsi: Do cube size divide-by-6 lowering in NIR
No point in carrying all this code around twice each in two back-ends.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12005>
2021-07-22 14:22:35 -05:00
Timur Kristóf
6e17931d21 radv: Use pre-computed viewport transform for NGG culling state.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Mike Blumenkrantz
c9a478f1cd radv: remove unused variable from radv_emit_viewport
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Mike Blumenkrantz
a2ef92d7a5 radv: pre-calculate viewport transforms
this requires more storage in the viewport struct, but it avoids
the need to repeatedly calculate the same transform if e.g., a meta
operation occurs, which can save about 5% cpu in some cases

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Mike Blumenkrantz
1e13cb1965 radv: merge si_write_viewport into radv_emit_viewport
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Timur Kristóf
d07e5bde75 radv: Remove num_viewports from radv_skip_ngg_culling.
NGG culling is not compiled into shaders that can use multiple
viewports, so it's not necessary to check it here.

Fixes: 9a95f5487f
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11910>
2021-07-16 13:00:36 +00:00
Timur Kristóf
aa24740370 radv: Don't compile NGG culling into shaders that write viewport index.
We don't support NGG culling with multiple viewports yet.

Fixes: f30e4351de
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11910>
2021-07-16 13:00:36 +00:00
Samuel Pitoiset
0b637919a8 radv: fix specifying the stencil layout for separate depth/stencil layouts
The Vulkan spec has been updated few months ago again and pNext is
always honored if present.

Found this with vkd3d-proton which implemented separate depth/stencil
layouts recently.

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11903>
2021-07-16 09:20:58 +02:00
Samuel Pitoiset
cadf2d63b7 radv: report APUs as discrete GPUs for Red Dead Redemption 2
On APUs, we fake heaps to simulate a dGPU setup because it seems to
have the maximum compatibility. Though, some applications like RDR2
still only looks at GTT if the driver reports an iGPU which means it
will only use 1/3rd of total memory available.

This is currently behind a drirc option because it might have
implications for other apps but we might want to extend this later
if everything is fine.

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11891>
2021-07-16 07:01:45 +00:00
Samuel Pitoiset
7a1cc56e40 radv: fix bounds checking for zero vertex stride on GFX6-7
GFX6 and GFX10+ have similar logic.

This fixes test_zero_vertex_stride from vkd3d-proton on
Pitcairn (GFX6) and on Bonaire (GFX7).

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11904>
2021-07-16 08:30:07 +02:00
Timur Kristóf
19c8283729 radv: Use 128-sized vertex grouping for NGG shaders.
This matches what RadeonSI also does.
It seems to improve performance especially with NGG culling shaders.

Eg. in Doom Eternal this gives me +5ish fps.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11810>
2021-07-15 16:13:04 +00:00
Samuel Pitoiset
1ea156f44c radv: only init the TC-compat ZRANGE metadata for the depth aspect
With separate depth/stencil layouts, if the depth aspect is first
initialized and then cleared, the ZRANGE_PRECISION metadata might
be different than 0. Initializing it again for the stencil aspect
will overwrite the value.

Fixes rendering glitches with Scarlet Nexus on GFX8-9.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5052
Cc: 21.1 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11883>
2021-07-15 07:21:50 +00:00
Timur Kristóf
8341af5109 radv, aco, ac/nir: Tweak position export scheduling for NGG culling.
The result is about +5-ish fps in Doom Eternal.

It turns out that the location of position exports matters more
than we thought, and it's actually better to keep them at the bottom
for culling shaders rather than schedule it up to the top.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10525>
2021-07-13 23:56:33 +00:00
Timur Kristóf
d18920e03a radv: Run algebraic optimizations before NGG lowering.
This makes culling shaders more efficient because they split the
shader in two parts. It is better to optimize before this split
happens.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10525>
2021-07-13 23:56:33 +00:00
Timur Kristóf
f30e4351de radv: Support NGG culling with new perftest environment variable.
Currently we don't enable it on any chip by default, but
we plan to enable it soon on GFX10.3 when we are comfortable
with its performance.

RADV_PERFTEST=nggc environment variable enables it on GFX10+ GPUs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10525>
2021-07-13 23:56:33 +00:00
Timur Kristóf
9a95f5487f radv: New shader args for NGG culling settings and viewport.
Add new shader arguments in RADV for:
- NGG culling settings
- Viewport transform

These will be used by NGG culling shaders.

Additionally, some tweaks are made to some config registers
in order to make culling shaders more efficient.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10525>
2021-07-13 23:56:33 +00:00
Timur Kristóf
ed163a44b6 radv: Expose radv_get_viewport_xform in radv_private.h
We need to emit viewport transform information for culling shaders.
This is used for small primitive culling.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10525>
2021-07-13 23:56:33 +00:00
Samuel Pitoiset
ee79b87c62 radv: lower primitive shading rate in NIR
This allows more potential compiler optimizations if the value is a
constant or from a scalar load.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11579>
2021-07-12 17:54:07 +00:00
Samuel Pitoiset
29f264f258 ac,radv: implement the cs_regalloc_hang HW bug workaround
Might fix spurious failures on GFX6 and some GFX7 chips.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11675>
2021-07-09 13:37:37 +00:00
Jason Ekstrand
d4b482d378 android: Drop the Android.mk build system
Android.mk files haven't really been supported by Mesa devs for a long
time.  Most of us have been willing to update Makefile.sources if we
remember and sometimes we try to blind code some Android.mk for a new
generator.  However, the reality is that it breaks regularly and ends up
being maintained by the Android community.  To address this problem
another approach was implemented in !10183 utilizing the maintained
meson build system.  The old Android.mk files are no longer required.

This commit was created with the following commands:

    git rm **/Android.mk
    git rm **/Android.*.mk
    git rm **/Makefile.sources
    git rm CleanSpec.mk

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4487
Acked-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9728>
2021-07-08 14:44:02 -05:00
Marek Olšák
66f254b4e6 radeonsi,radv: fix a late alloc deadlock with <= 6 CUs per SA
We should always prevent 1 CU from executing VS and GS waves
to prevent a deadlock.

Fixes: c377f45c18 "radeonsi/gfx10: rewrite late alloc computation"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>
2021-07-08 18:37:41 +00:00
Connor Abbott
e4e79de2a4 nir/subgroups: Support > 1 ballot components
Qualcomm has a mode with a subgroup size of 128, so just emitting larger
integer operations and then lowering them later isn't an option. This
makes the pass able to handle the lowering itself, so that we don't have
to go down to 64-thread wavefronts when ballots are used.

(The GLSL and legacy SPIR-V extensions only support a maximum of 64
threads, but I guess we'll cross that bridge when we come to it...)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>
2021-07-08 16:02:41 +00:00
Connor Abbott
90819b9b0e nir/subgroups: Replace lower_vote_eq_to_ballot with lower_vote_eq
Lower it to a vote instead of a ballot. This was only used for AMD, and
in that case they're pretty much the same. However Qualcomm has a vote
builtin, which we want to use instead of ballots.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>
2021-07-08 16:02:41 +00:00
Timur Kristóf
4fcb7e96b8 radv: Set parameter cache oversubscription according to the PC lines.
This matches how RadeonSI also sets this register.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11711>
2021-07-08 16:54:29 +02:00
Timur Kristóf
32fafa43ae radv: Allow enabling vertex grouping, fix NGG info with it disabled.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11711>
2021-07-08 16:54:29 +02:00
Timur Kristóf
fd64c18214 radv: Move radv_optimize_nir_algebraic to a separate function.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11711>
2021-07-08 16:54:29 +02:00
Timur Kristóf
00d11c2065 radv: Add last_vgt_api_stage and use it to simplify some code.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11711>
2021-07-08 16:54:26 +02:00
Mike Blumenkrantz
a4713ddb56 radv: implement VK_EXT_multi_draw
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11532>
2021-07-06 13:16:56 +00:00
Mike Blumenkrantz
ba30adce07 radv: add a gfx10 bug workaround for NOT_EOP
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11532>
2021-07-06 13:16:56 +00:00
Mike Blumenkrantz
d9132fcb50 radv: split indexed draw cases based on whether drawid is used
fewer conditionals in the draw loop = less overhead

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11532>
2021-07-06 13:16:56 +00:00
Mike Blumenkrantz
5aaf45f5e1 radv: determine if hardware can emit NOT_EOP before emitting
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11532>
2021-07-06 13:16:56 +00:00