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Author SHA1 Message Date
Thomas H.P. Andersen
9c207d4f89 tgsi: remove unused tgsi_shader_info.uses_subgroup_info 
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
 2023-07-19 12:41:27 +00:00
Thomas H.P. Andersen
68d0c847bb tgsi: remove unused tgsi_shader_info fields 
uses_thread_id
uses_block_id
uses_block_size

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
 2023-07-19 12:41:27 +00:00
Thomas H.P. Andersen
402f5c5407 tgsi: remove unused tgsi_shader_info.uses_drawid 
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
 2023-07-19 12:41:27 +00:00
Thomas H.P. Andersen
436e59e3d9 tgsi: remove unused tgsi_shader_info fields 
Removes:
uses_persp_opcode_interp_centroid
uses_persp_opcode_interp_offset
uses_persp_opcode_interp_sample
uses_linear_opcode_interp_centroid
uses_linear_opcode_interp_offset
uses_linear_opcode_interp_sample

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
 2023-07-19 12:41:27 +00:00
Thomas H.P. Andersen
6c513ef4fd tgsi: remove unused tgsi_shader_info fields 
Removes:
uses_persp_center
uses_persp_centroid
uses_persp_sample
uses_linear_center
uses_linear_centroid
uses_linear_sample

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
 2023-07-19 12:41:27 +00:00
Thomas H.P. Andersen
76b0e7b25c tgsi: remove unused tgsi_shader_info.reads_tess_factors 
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
 2023-07-19 12:41:27 +00:00
Thomas H.P. Andersen
9050b10627 svga: remove unused struct field 
This will allow further cleanup in tgsi_shader_info

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
 2023-07-19 12:41:27 +00:00
Thomas H.P. Andersen
29673ac8d0 tgsi: remove unused tgsi_shader_info.reads_samplemask 
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
 2023-07-19 12:41:27 +00:00
Thomas H.P. Andersen
ad2c811884 tgsi: remove unused tgsi_shader_info.reads_position 
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
 2023-07-19 12:41:27 +00:00
Thomas H.P. Andersen
1f1ffd5b1d tgsi: remove unused tgsi_shader_info.colors_written 
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
 2023-07-19 12:41:27 +00:00
Thomas H.P. Andersen
9684fbc87d tgsi: remove unused tgsi_shader_info.colors_read 
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
 2023-07-19 12:41:27 +00:00
Thomas H.P. Andersen
849065b9f3 tgsi: remove unused tgsi_shader_info.num_memory_instructions 
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
 2023-07-19 12:41:27 +00:00
Thomas H.P. Andersen
64ce4669a3 tgsi: remove unused tgsi_shader_info.array_max 
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
 2023-07-19 12:41:27 +00:00
Thomas H.P. Andersen
8807f0ec3e tgsi: remove unused tgsi_shader_info.num_tokens 
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
 2023-07-19 12:41:26 +00:00
Karmjit Mahil
6b6102f2ff pvr: Fix writing query availability write out 
The query value was accidentally being written as the availability
value. Queries that were available but of value `0` would never
become available.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24209>
 2023-07-19 12:22:30 +00:00
Karmjit Mahil
a4bdf2de0f pvr: Fix occlusion query unaccounted for user fences 
User provided fences can never have a source stage for occlusion
queries as the occlusion query job is internal to the driver. So
at vkQueueSubmit the user's VkFence could be signalled before the
queries had completed.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24209>
 2023-07-19 12:22:30 +00:00
Karmjit Mahil
2b685fb09e pvr: Allow query stage for barrier sub cmds 
The function is accounting for the occlusion query job so changing
the assert to allow it.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24209>
 2023-07-19 12:22:30 +00:00
Karmjit Mahil
0ba29bf641 pvr: Use the correct size for the unified store allocation 
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24209>
 2023-07-19 12:22:30 +00:00
Frank Binns
0137de917b pvr: cleanup SPM EOT dynarray after upload 
Fixes a memory leak found with Valgrind.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Fixes: ad0ca7a879 ("pvr: Compile SPM EOT shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24208>
 2023-07-19 12:06:32 +00:00
M Henning
f39df8fe2d nv50/ir: Remove SpillSlot 
Since nothing ever reads this data.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
 2023-07-19 11:47:10 +00:00
M Henning
42f5f9cb8f nv50/ir: Remove dead loop from assignSlot 
This loop can never execute. On entry we have offset = offsetBase and
offsetBase >= stackSize, so the condition offset < stackSize is always
false. The git history suggests that this was always broken this way.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
 2023-07-19 11:47:10 +00:00
M Henning
3c0f8aec84 nv50/ir: Remove Function.stackPtr 
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
 2023-07-19 11:47:10 +00:00
M Henning
cd2c314ee0 nv50/ir: Remove ArgumentMovesPass 
We only use OP_CALL for builtins at this point, so no need for this.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
 2023-07-19 11:47:10 +00:00
M Henning
1032d5c836 nv50/ir: Drop nir_jump_return handling 
This is always lowered before this point.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
 2023-07-19 11:47:10 +00:00
Dr. David Alan Gilbert
69101c72f3 rusticl: Wire the 'start' and 'end' profilng times up 
We use the timestamp pipe queries to retrieve times from the
device, hopefully close to the execution of the code.

For now we use the End value for complete as well.

Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24101>
 2023-07-19 10:29:25 +00:00
Dr. David Alan Gilbert
4a44dd1654 rusticl: Wrap pipe query reads 
Take a query we previously created and read it's result.
The type of the result is usually implicitly known; for now
just handle the query we use in 64 bit.

This is safe because the trait bindings ensure that
when we create a query with PipeQueryGen we embed the type
of the result in the PipeQuery, and that produces the correct
result type.

Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24101>
 2023-07-19 10:29:25 +00:00
Dr. David Alan Gilbert
52e53938c3 rusticl: Wrap pipe queries 
Pipe queries are asynchronous state reads, you create a query
and sometime later retrieve the result.

Wrap the underlying basic calls and types and provide a type
(PipeQuery) to handle the lifetype of the query.  Note the pipe context
used for the query must live at last as long as the query.

Queries are created by calls to the PipeQueryGen, a wrapper
that figures out the return type and wraps that in the intermediate
that's returned.   A typical use is:

  query_start = PipeQueryGen::<{pipe_query_type::PIPE_QUERY_TIMESTAMP}>::new(ctx);

Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24101>
 2023-07-19 10:29:25 +00:00
Dr. David Alan Gilbert
c893fa1fcd rusticl: Wire the 'submit' profiling time up 
Set it from the timestamp when it's taken out of the queue and
submitted, and wire the APU up to read it.

Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24101>
 2023-07-19 10:29:25 +00:00
Dr. David Alan Gilbert
85ca349be0 rusticl: Wire the 'queued' profiling time up 
Set it from the timestamp when it's added to the queue, and wire
the API up to read it.

Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24101>
 2023-07-19 10:29:24 +00:00
Dr. David Alan Gilbert
6052e58bf6 rusticl/core: Add profiling time storage (queued) to event 
Add the first, of a few, profiling time values to the Event,
with access methods.  This is defined as

   'when the command identified by event is enqueued in a command-queue
    by the host'

Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24101>
 2023-07-19 10:29:24 +00:00
Karol Herbst
a944a8eba9 nvc0: initial Ada enablement 
Cc: 23.2 <mesa-stable>
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24226>
 2023-07-19 09:08:16 +00:00
Philipp Zabel
f626605cbf etnaviv: fix segfault after compile failure 
Do not try to determine the shader stage from the compiled shader
variant, which may be NULL after compile failure. Instead, get it
from the NIR shader.

Fixes a segfault when trying to evaluate etna_shader_stage(NULL)
after compile failure.

Suggested-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Fixes: 3d49619071 ("etnaviv: add support for performance warnings")
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24178>
 2023-07-19 08:46:22 +00:00
Honglei Huang
b246f96573 virgl: Enable vp9 hardware decode 
Add vp9 fill function in fill_picture_desc to enable vp9 decoding.

Signed-off-by: Honglei Huang <honglei1.huang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
 2023-07-19 07:06:38 +00:00
Boyuan Zhang
d4220c14cc virgl: Implement vp9 hardware decode 
Implement vp9 hardware decode by filling vp9 picture desc.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
 2023-07-19 07:06:38 +00:00
Boyuan Zhang
7eff5cdbac virgl: Add vp9 picture desc 
Define vp9 picture and slice parameters.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
 2023-07-19 07:06:38 +00:00
Honglei Huang
15a2b1797b virgl/video: Add jpeg buf start code check 
Add jpeg start code check to fix the issue that
double header adding in virgl video codec.

Signed-off-by: Honglei Huang <honglei1.huang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
 2023-07-19 07:06:38 +00:00
Honglei Huang
9cbb7cb13b virgl/video: Add more pipe type in virgl formats convert table 
Add Y8_400_UNORM, YUYV, Y8_U8_V8_444_UNORM,
R8G8_R8B8_UNORM into virgl_formats_conv_table to fix
the resource create fail issue.

Signed-off-by: Honglei Huang <honglei1.huang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
 2023-07-19 07:06:38 +00:00
Honglei Huang
2b6301e870 virgl/video: Add support for hevc10bit decoding. 
Add P010 CONV_FORMAT to support virgl hevc10bit decoding.

Signed-off-by: Honglei Huang <honglei1.huang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
 2023-07-19 07:06:38 +00:00
Honglei Huang
e1b8e4d7fc virgl/video: Add support for jpeg decoding 
Implement for virgl jpeg decoding.

Signed-off-by: Honglei Huang <honghuan@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
 2023-07-19 07:06:38 +00:00
Honglei Huang
dad4b79ee0 virgl/video: Add support for vc1 decoding 
Implement for virgl vc1 decoding.

Signed-off-by: Honglei Huang <honglei1.huang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
 2023-07-19 07:06:37 +00:00
Honglei Huang
deafeab1ee virgl/video: Add support for mpeg12 decoding 
Implement for mpeg12 virgl video decoding.

Signed-off-by: Honglei Huang <honglei1.huang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
 2023-07-19 07:06:37 +00:00
Faith Ekstrand
61a90c2968 intel/vec4: Drop support for nir_register 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24104>
 2023-07-19 02:11:57 +00:00
Faith Ekstrand
39b5bb0809 intel/fs: Drop support for nir_register 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24104>
 2023-07-19 02:11:57 +00:00
Faith Ekstrand
ce75c3c3fe intel: Switch to intrinsic-based registers 
Results on HSW (vec4 only):

    total instructions in shared programs: 2978400 -> 2974135 (-0.14%)
    instructions in affected programs: 77870 -> 73605 (-5.48%)
    helped: 143
    HURT: 48
    helped stats (abs) min: 1 max: 100 x̄: 30.22 x̃: 9
    helped stats (rel) min: 0.03% max: 30.49% x̄: 8.02% x̃: 6.39%
    HURT stats (abs)   min: 1 max: 4 x̄: 1.19 x̃: 1
    HURT stats (rel)   min: 0.08% max: 16.67% x̄: 3.71% x̃: 3.23%
    95% mean confidence interval for instructions value: -26.69 -17.97
    95% mean confidence interval for instructions %-change: -6.24% -3.90%
    Instructions are helped.

    total cycles in shared programs: 45345924 -> 44742666 (-1.33%)
    cycles in affected programs: 29083466 -> 28480208 (-2.07%)
    helped: 4785
    HURT: 3879
    helped stats (abs) min: 2 max: 8072 x̄: 276.00 x̃: 24
    helped stats (rel) min: 0.02% max: 54.43% x̄: 7.78% x̃: 1.95%
    HURT stats (abs)   min: 2 max: 14736 x̄: 184.95 x̃: 20
    HURT stats (rel)   min: 0.02% max: 97.00% x̄: 7.69% x̃: 1.53%
    95% mean confidence interval for cycles value: -83.49 -55.77
    95% mean confidence interval for cycles %-change: -1.16% -0.55%
    Cycles are helped.

    total spills in shared programs: 1093 -> 539 (-50.69%)
    spills in affected programs: 772 -> 218 (-71.76%)
    helped: 74
    HURT: 0

    total fills in shared programs: 760 -> 757 (-0.39%)
    fills in affected programs: 66 -> 63 (-4.55%)
    helped: 3
    HURT: 0

Results on TGL (all stages):

    total instructions in shared programs: 21486982 -> 21488266 (<.01%)
    instructions in affected programs: 2245938 -> 2247222 (0.06%)
    helped: 1288
    HURT: 1385
    helped stats (abs) min: 1 max: 93 x̄: 4.05 x̃: 2
    helped stats (rel) min: 0.02% max: 3.82% x̄: 0.61% x̃: 0.46%
    HURT stats (abs)   min: 1 max: 134 x̄: 4.69 x̃: 2
    HURT stats (rel)   min: <.01% max: 5.59% x̄: 0.65% x̃: 0.44%
    95% mean confidence interval for instructions value: 0.13 0.83
    95% mean confidence interval for instructions %-change: <.01% 0.08%
    Instructions are HURT.

    total cycles in shared programs: 809326677 -> 809475669 (0.02%)
    cycles in affected programs: 447781659 -> 447930651 (0.03%)
    helped: 1924
    HURT: 1994
    helped stats (abs) min: 1 max: 74567 x̄: 1217.49 x̃: 10
    helped stats (rel) min: <.01% max: 38.44% x̄: 1.09% x̃: 0.17%
    HURT stats (abs)   min: 1 max: 76426 x̄: 1249.47 x̃: 8
    HURT stats (rel)   min: <.01% max: 137.11% x̄: 1.64% x̃: 0.17%
    95% mean confidence interval for cycles value: -125.61 201.67
    95% mean confidence interval for cycles %-change: 0.12% 0.48%
    Inconclusive result (value mean confidence interval includes 0).

    LOST:   4
    GAINED: 4

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24104>
 2023-07-19 02:11:57 +00:00
Faith Ekstrand
abb6188a04 intel/vec4: Add support for new-style registers 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24104>
 2023-07-19 02:11:57 +00:00
Faith Ekstrand
f783eb9ebd intel/vec4: Assume get_nir_dest() provides a sane write-mask 
It should be providing a write mask that is all the channels.  Drop the
one case for load_input where we stomp this for no good reason.  Also,
make ALU write-masking AND with the existing mask.  This prepares us for
the next patch where we convert to new-style registers.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24104>
 2023-07-19 02:11:57 +00:00
Faith Ekstrand
b8209d69ff intel/fs: Add support for new-style registers 
The old ones still work for now.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24104>
 2023-07-19 02:11:57 +00:00
Timothy Arceri
c64ad299e4 glsl: fix validation of ES vertex attribs 
From OpenGL ES 3.0 spec, page 56:

    "Binding more than one attribute name to the same location
     is referred to as aliasing, and is not permitted in OpenGL
     ES Shading Language 3.00 vertex shaders. LinkProgram will
     fail when this condition exists. However, aliasing is
     possible in OpenGL ES Shading Language 1.00 vertex shaders.
     This will only work if only one of the aliased attributes
     is active in the executable program, or if no path through
     the shader consumes more than one attribute of a set of
     attributes aliased to the same location. A link error can
     occur if the linker determines that every path through the
     shader consumes multiple aliased attributes, but implemen-
     tations are not required to generate an error in this case."

So here we make sure to allow the optimisations before validation
for earlier ES shader versions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

Fixes: 80c001013c ("glsl: do vs attribute validation in NIR linker")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9342
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24205>
 2023-07-19 00:43:26 +00:00
Mike Blumenkrantz
28b07a7bd2 ci: bump VVL to 1.3.257 
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24214>
 2023-07-18 23:43:16 +00:00
Eric Engestrom
0f557ffa26 ci: move lavapipe files rules to src/gallium/drivers/lavapipe/ci/gitlab-ci.yml 
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
 2023-07-18 23:07:52 +00:00