Commit graph

204818 commits

Author SHA1 Message Date
Yiwei Zhang
99834aa50c vulkan/android: fix to not append GRALLOC_USAGE_HW_COMPOSER bit
The composer usage bit is automatically added by the surface consumer
side when the consumer is SurfaceFlinger. e.g. if the swapchain is
connected with a media encoder surface, the consumer side would append
encoder usage bit instead.

Fixes: c406d53858 ("vulkan/android: Add common vkGetSwapchainGrallocUsage{2}ANDROID")
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35785>
(cherry picked from commit 495156079c)
2025-07-16 16:23:09 +02:00
Sviatoslav Peleshko
ff529f9582 brw/disasm: Fix Gfx11 3src-instructions dst register disassembly
The conversion from bit value to register file type is already done
by the brw_eu_inst_3src_a1_dst_reg_file in the FFC macro now, so doing it
again produced incorrect results.

Fixes: e7179232 ("intel/brw: Move encoding of Gfx11 3-src inside the inst helpers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13141
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35960>
(cherry picked from commit 8d22eb960b)
2025-07-16 16:23:09 +02:00
Calder Young
c84e0fbebb iris: Fix issue with conditional dispatching
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35946>
(cherry picked from commit a39779e695)
2025-07-16 16:23:09 +02:00
Mel Henning
50cb84b7a2 meson: Allow unnecessary_transmutes for bindgen
Otherwise I get hundreds of "unnecessary transmute" warnings
on rustc 1.88.0

Cc: mesa-stable
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35874>
(cherry picked from commit b9a9f6cd53)
2025-07-16 16:23:09 +02:00
LingMan
1f865568e8 meson: Streamline silencing of warnings in bindgen generated code
Everyone was doing roughly the same.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34969>
(cherry picked from commit 3fbee8bae6)
2025-07-16 16:23:09 +02:00
Lionel Landwerlin
a4fd95c97c anv: do not rely on sampler objects for pipeline compilation
Descriptor set layout lifetime can be shorter than what the
implementation requires. One example is :
  * create descriptor set layout
  * create graphics pipeline library
  * destroy descriptor set layout
  * link optimize library in a final pipeline

The last step might need the descriptor set layout information again.

We've so far worked around this by taking a reference on the
descriptor set layout in the pipelines. But we forgot that descriptor
set layouts have pointers to samplers (for immutable & embedded
samplers).

We could take a reference to samplers but that sucks for various
reasons :
  - it consumes dynamic state heap space
  - it could cause issues with capture-replay placement

So instead we copy the information from the samplers that might be
needed in cases like link optimization. This includes :
  - ycbcr conversion state (used for NIR lowering)
  - embedded sampler data (to recreate the sampler)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35955>
(cherry picked from commit 67e452669e)
2025-07-16 16:23:09 +02:00
Lionel Landwerlin
48b38a86f0 anv: rework embedded sampler hashing
Create a hashing key on all samplers so we can just copy that anywhere
we need it. That key already contains the needed parameters for
embedded samplers, so the sha1 stuff can go away.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35955>
(cherry picked from commit 98bc185376)
2025-07-16 16:23:09 +02:00
Marek Olšák
3e24ded7c6 glsl: fix a possible crash in gl_nir_lower_xfb_varying
If the last block is empty, nir_block_last_instr returns NULL, which
sets the cursor to NULL, which crashes.

I think this can't crash currently because if xfb is present, there is
always at least 1 output store in the last block due to
lower_io_vars_to_temporaries, but that won't be true after we stop
calling it in a later commit.

Fixes: fa9cee4247 - glsl: implement lower_xfb_varying() as a NIR pass

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35945>
(cherry picked from commit 9083e8b984)
2025-07-16 16:23:09 +02:00
Autumn Ashton
e30e214b1a radv: Fix handling of NULL pColorAttachmentLocations in vkCmdSetRenderingAttachmentLocations
From the Vulkan spec:
`If pColorAttachmentLocations is NULL, it is
equivalent to setting each element to its index
within the array.`

Use similar logic to what we do in
CmdSetRenderingInputAttachmentIndices to handle
this behaviour properly.

Signed-off-by: Autumn Ashton <misyl@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35948>
(cherry picked from commit 1ceded0c83)
2025-07-16 16:23:09 +02:00
Konstantin Seurer
63d1d89791 llvmpipe: Use the correct field to decide if coroutines are used
Fixes: 92083fc ("llvmpipe: Do not use coroutines when they are unnecessary")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26282>
(cherry picked from commit d519f917e1)
2025-07-16 16:23:09 +02:00
Mike Blumenkrantz
8f0fd8d08c zink: always insert current batch sparse semaphore into sparse wait chain
this avoids desync in the case where a batch performs multiple distinct
sparse commit operations

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35978>
(cherry picked from commit f335158cfa)
2025-07-16 16:23:09 +02:00
Patrick Lerda
17bf730fb8 r600: fix emit_ssbo_store() wrmask compatibility
This issue was generating unwanted write accesses that
could overwrite previous operations.

Note: This functionality could also be tested with
nir_lower_wrmasks. This problem seems to only affect
the ssbos.

This change was tested on cypress, barts and cayman. Here are the tests fixed:
khr-gl4[3-6]/compute_shader/pipeline-pre-vs: fail pass
khr-gl4[5-6]/direct_state_access/queries_functional: fail pass
khr-gl4[5-6]/es_31_compatibility/shader_image_load_store/advanced-cast-cs: fail pass
khr-gl4[5-6]/es_31_compatibility/shader_image_load_store/advanced-cast-fs: fail pass
khr-gl4[5-6]/es_31_compatibility/shader_storage_buffer_object/advanced-switchbuffers-cs: fail pass
khr-gl4[5-6]/es_31_compatibility/shader_storage_buffer_object/advanced-switchprograms-cs: fail pass
khr-gl4[5-6]/es_31_compatibility/shader_storage_buffer_object/basic-operations-case1-cs: fail pass
khr-gl4[3-6]/shader_storage_buffer_object/advanced-switchbuffers-cs: fail pass
khr-gl4[3-6]/shader_storage_buffer_object/advanced-switchprograms-cs: fail pass
khr-gl4[3-6]/shader_storage_buffer_object/basic-operations-case1-cs: fail pass
khr-gl4[4-6]/texture_buffer/texture_buffer_max_size: fail pass
khr-gles31/core/compute_shader/pipeline-pre-vs: fail pass
khr-gles31/core/shader_image_load_store/advanced-cast-cs: fail pass
khr-gles31/core/shader_image_load_store/advanced-cast-fs: fail pass
khr-gles31/core/shader_storage_buffer_object/advanced-switchbuffers-cs: fail pass
khr-gles31/core/shader_storage_buffer_object/advanced-switchprograms-cs: fail pass
khr-gles31/core/shader_storage_buffer_object/basic-operations-case1-cs: fail pass
khr-gles31/core/texture_buffer/texture_buffer_max_size: fail pass
khr-glesext/texture_buffer/texture_buffer_max_size: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35830>
(cherry picked from commit 9e5d11bff3)
2025-07-16 16:23:09 +02:00
Mike Blumenkrantz
b033b5e179 zink: fix submit_count disambiguation for bo usage checks
also improve docs for submit_count to avoid similar errors

Fixes: 61b0955308 ("zink: always check submit_count to disambiguate when checking/waiting")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35940>
(cherry picked from commit 3925e53efe)
2025-07-16 16:23:08 +02:00
Mike Blumenkrantz
d70e3bfd79 zink: fix acquire semaphore sync
the semaphore stage is VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT,
so the src access barrier must also use this in order to ensure it happens
after the acquire

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35940>
(cherry picked from commit 69b5abee14)
2025-07-16 16:23:08 +02:00
Mike Blumenkrantz
487dd57dab zink: don't modify the u_foreach_bit64 bit inside the loop in loop_io_var_mask()
this breaks the macro and causes infinite loops on patch locations in release builds

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35922>
(cherry picked from commit ef0bf50ae9)
2025-07-16 16:23:08 +02:00
Erik Faye-Lund
93e505c931 panfrost: limit sample_shading to bifrost and later
We haven't wired this up in the Midgard compiler, so we can't expose
sample shading on Midgard GPUs. This all seems fixable, because the KILL
instruction can update the coverage without the kill-flag (yeah, a bit
confusing naming), but until someone puts in the time to wire up that,
let's just disable the functionality to avoid crashes.

Fixes: 6bba718027 ("panfrost: Advertise SAMPLE_SHADING")
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35881>
(cherry picked from commit 504e511c44)
2025-07-16 16:23:08 +02:00
Caleb Callaway
cef387f1b7 iris: ISP invalidate at end of compute batches
We're now re-emitting push constants at the
start of compute batches, so we can avoid the
overhead of restoring them.

CC: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35873>
(cherry picked from commit 6f38d58db3)
2025-07-16 16:23:08 +02:00
Caleb Callaway
a7e8b3f785 iris: re-emit push constants at compute batch start
Per Ken Graunke, corruption issues with push
constants for render batches on Gen12 graphics
have been observed and worked around by re-emitting
push constants at the start of the batch buffer.
We're seeing similar issues with compute batches,
so we'll apply the same work-around.

Fixes corruption reported in Blender on ADL/RPL

CC: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35873>
(cherry picked from commit 8fd008a45f)
2025-07-16 16:23:08 +02:00
Yiwei Zhang
a50e474842 anv: avoid leaking private binding for aliased wsi image
Aliased wsi image has to share the same private binding with the
original wsi image for memory consistency. If the private binding
exists, it needs to be released before being overridden.

Fixes: d85a9d658f ("anv/image: Call into WSI to create swapchain images")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35893>
(cherry picked from commit b21e62b71a)
2025-07-16 16:23:08 +02:00
Mary Guillemard
519c415c7d pan/genxml: Fix wrong size for compute size workgroup
Fix annoying warnings when decoding CSF.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: 486c341769 ("panfrost: Add architecture description XML for v10")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35909>
(cherry picked from commit a3272cd0ce)
2025-07-16 16:23:08 +02:00
Erik Faye-Lund
2d9f5c174b st/pbo: use sized nir-types for download-path
The Midgard compiler only deals with sized NIR types for image loads and
stores. Since we already have nir_get_nir_type_for_glsl_base_type()
which can provide us with the corresponding sized type, let's just use
that, and drop the extra table.

This fixes the following piglits on Mali-T760:
- spec/ext_texture_compression_s3tc/getteximage-targets 2d s3tc
- spec/ext_texture_compression_s3tc/getteximage-targets cube s3tc

Fixes: 9123ee0f18 ("st/mesa/pbo: Set src type on image_store")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35882>
(cherry picked from commit 96d124092f)
2025-07-16 16:23:08 +02:00
Samuel Pitoiset
caf05cba12 ac/surface: select a different swizzle mode for ASTC formats on GFX12
It seems only 4KiB swizzle works fine with ASTC.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34877>
(cherry picked from commit 2af3ef9305)
2025-07-16 16:23:08 +02:00
José Roberto de Souza
b379dca31d anv: Do not emit batch_emit_fast_color_dummy_blit() for video engine
Wa_16018063123 don't apply to video engine also video engine don't
support XY_FAST_COLOR_BLT.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Fixes: ec43c20182 ("anv: implement dummy blit for Wa_16018063123")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35700>
(cherry picked from commit 926e6a94ad)
2025-07-16 16:23:08 +02:00
José Roberto de Souza
a52ae19823 anv: Flush before invalidate aux map in copy and video engines
BSpec: 43904
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 46f5359238 ("anv: Invalidate aux map for copy/video engine")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35700>
(cherry picked from commit 4618a99a4c)
2025-07-16 16:23:08 +02:00
José Roberto de Souza
57c189dbc8 anv: Read the correct register for aux table invalidation when in GPGPU mode in render engine
For 3D or GPGPU modes the same render engine should be used, CCS
register should only be used when using compute engine.

Fixes: 46f5359238 ("anv: Invalidate aux map for copy/video engine")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35700>
(cherry picked from commit e68f81eaf6)
2025-07-16 16:23:08 +02:00
Faith Ekstrand
56d41c6a9e nak: Surface handles are not allowed to be rZ
The chances of this happening are near zero with the way we do surface
ops today but I have seen it in the wild and this is apparently a rule.
The hardware throws an illegal instruction encoding if it sees 255.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35895>
(cherry picked from commit 19bee26056)
2025-07-16 16:23:07 +02:00
Samuel Pitoiset
d1581108b8 ac/surface: use align with NPOT for estimating surface size
ac_estimate_size() triggers an assertion because the block size isn't
aligned to a power of two for ASTC formats.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35879>
(cherry picked from commit cb6f2d9409)
2025-07-16 16:23:07 +02:00
Eric Engestrom
7dd9208c43 freedreno/ci: fix a750-piglit-cl rules
Fixes: 5b3f7de99f ("ci/freedreno: Introduce OpenCL testing for Adreno 618, 660, and 750")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35888>
(cherry picked from commit 32fe81a02b)
2025-07-16 16:23:07 +02:00
Mike Blumenkrantz
76dda44a19 aux/trace: always finish dumping draw/dispatch calls before triggering them
this avoids deadlocks

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35769>
(cherry picked from commit f946167e30)
2025-07-16 16:23:07 +02:00
Samuel Pitoiset
3888ef933a radv: disable RB+ with E5B9G9R9 to workaround failures on GFX10.3-GFX11.5
This looks like a hw bug on GFX10.3-GFX11.5 because RB+ seems to only
work as expected when all channels (RGBA) are written. With that format,
RGB channels must be all set or unset but setting the A channel is
legal so far.

This will reduce rendering performance with that format but it's the
less intrusive solution for now. This might be revisited in the near
future, also with more VKCTS coverage.

This has been tested and verified on GFX10.3 (NAVI21) and GFX11
(NAVI31) and GFX12 (NAVI48), unfortunately I don't have GFX11.5 but
let's assume it's broken there too.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13371
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35631>
(cherry picked from commit 10ef9c6a80)
2025-07-16 16:23:07 +02:00
Samuel Pitoiset
4dac50e381 radv: stop disabling the alpha optimization with E5B9G9R9 and RB+
This old workaround was added due to test failures with VKCTS but it
turns out the tests were broken. Color writemask for E5B9G9R9 must be
all RGB or none and some tests are testing various RGB channels which
is illegal.

See https://gitlab.khronos.org/Tracker/vk-gl-cts/-/issues/5821.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35631>
(cherry picked from commit 7017b25d6a)
2025-07-16 16:23:07 +02:00
Caio Oliveira
580c4c56e9 brw: Use the right width in brw_nir_apply_key for BS shaders
Fixes: 23c7142cd6 ("anv: disable SIMD16 for RT shaders")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35798>
(cherry picked from commit c733f07378)
2025-07-16 16:23:07 +02:00
Rhys Perry
05364ea153 aco/ra: fix repeated compact_linear_vgprs() in get_reg()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: b7738de4f9 ("aco/ra: rework linear VGPR allocation")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13431
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35838>
(cherry picked from commit dce1d4ad4c)
2025-07-16 16:23:07 +02:00
Boris Brezillon
1a3d54dab2 panvk: Lower maxImageDimension{2D,3D,Cube} to match the HW caps
Maximum texture dimension is 2^16, but we're limited by the 32-bit
fields that are used to pass strides/sizes in various descriptors.
Assuming RGBA32_FLOAT is the biggest format we support, that gives us a
16k-1 image size for 2D and cube map, and 512 for 3D.

Change our GetPhysicalDeviceImageFormatProperties2() implementation so
that smaller formats can still advertise bigger image sizes.

Fixes: d5ed77800e ("panvk: Fix GetPhysicalDeviceProperties2() to report accurate info")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35555>
(cherry picked from commit e25a91d919)
2025-07-16 16:23:07 +02:00
Eric Engestrom
2b8877baff meson: only run symbols-check if nm is available
And drop the redundant check from symbols-check.py, which was actually
masking all kinds of issues.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35891>
(cherry picked from commit 4be493862d)
2025-07-16 16:23:07 +02:00
Eric Engestrom
a8b6bbc5a1 bin/symbols-check: document new platform symbols exported since symbols-check was broken
The `pthread_mutexattr_*` symbols probably shouldn't be exported, but
let's fix that later so that we can at least get symbols-check to run
again ASAP.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35891>
(cherry picked from commit f350803fb3)
2025-07-16 16:23:07 +02:00
Eric Engestrom
951751fe1c bin/symbols-check: sort platform symbols
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35891>
(cherry picked from commit f06fff8148)
2025-07-16 16:23:07 +02:00
Eric Engestrom
a0875f4eb0 bin/symbols-check: ignore version of platform symbols
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35891>
(cherry picked from commit 3d9b76db8e)
2025-07-16 16:23:07 +02:00
Eric Engestrom
94bd0d9a23 bin/symbols-check: ignore nm lines that don't have a symbol name
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35891>
(cherry picked from commit 5672230c19)
2025-07-16 16:23:07 +02:00
Eric Engestrom
8d4df0c45d bin/symbols-check: fix fields length condition before accessing fields
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35891>
(cherry picked from commit e626636e90)
2025-07-16 16:23:07 +02:00
Yiwei Zhang
41d9e42b27 meson: drop vdrm from virgl and venus
Currently neither virgl nor venus uses vdrm. One big blocker is neither
of them has adopted drm_syncobj yet.

Fixes: 1a6fc7006a ("meson: split subdir for virtio/vdrm and virtio/vulkan")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35933>
(cherry picked from commit 60eebe964d)
2025-07-16 16:23:06 +02:00
Eric Engestrom
b959f2416c meson: split subdir for virtio/vdrm and virtio/vulkan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35723>
(cherry picked from commit 1a6fc7006a)
2025-07-16 16:23:06 +02:00
Eric Engestrom
db3d2531cc virtio: move inc_virtio up one folder
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35723>
(cherry picked from commit 6f8c4a7ce1)
2025-07-16 16:23:06 +02:00
Eric Engestrom
ed07445ba4 .pick_status.json: Mark 485b520cf2 as denominated 2025-07-16 16:23:06 +02:00
Eric Engestrom
fe8dc9b6a6 .pick_status.json: Mark 0a581e7408 as denominated 2025-07-16 16:23:06 +02:00
Eric Engestrom
7edc8d913c .pick_status.json: Mark 94f42bb201 as denominated 2025-07-16 16:23:06 +02:00
Eric Engestrom
99011f4e8a .pick_status.json: Mark 2f5ff9788a as denominated 2025-07-16 16:23:06 +02:00
Eric Engestrom
3e1ea7faf3 .pick_status.json: Mark 6ad0b59cc8 as denominated 2025-07-16 16:23:06 +02:00
Eric Engestrom
29d50c5fdf .pick_status.json: Mark 85e4a19ed1 as denominated 2025-07-16 16:23:06 +02:00
Eric Engestrom
eb2f1e0858 .pick_status.json: Mark abe23e1cd0 as denominated 2025-07-16 16:23:06 +02:00