Commit graph

169403 commits

Author SHA1 Message Date
Marek Olšák
96913bbf3e ac/surface: force linear image layout for chips not supporting image opcodes
Image opcodes will be emulated.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:53 +00:00
Marek Olšák
8277e6fda3 radeonsi: always use ffma32 on gfx940
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:53 +00:00
Marek Olšák
72354667cb radeonsi: use COMPUTE_DISPATCH_SCRATCH_BASE on gfx940
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:53 +00:00
Marek Olšák
d3b03fedd8 amd: add initial code for gfx940
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:53 +00:00
Marek Olšák
46639eb056 amd: add gfx940 register definitions
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:53 +00:00
Eric Engestrom
91a6c9cccf Revert "broadcom/ci: run gl jobs on arm64, just like vk"
This reverts commit ba4eeaf435.

Looks like we have a lot of memory issues on arm64; revert the pre-merge
CI to armhf until we've been able to figure out the problem and fix it.

Closes https://gitlab.freedesktop.org/mesa/mesa/-/issues/8788

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22335>
2023-04-06 14:34:06 +00:00
Alyssa Rosenzweig
2242bb703e nv50,nvc0: Use u_pipe_screen_get_param_defaults
Other than nouveau, every single Gallium driver relies on
u_pipe_screen_get_param_defaults to get the default values of CAPs.

For the driver, this is much more concise. Unsupported new features -- or
supported features that virtually all Gallium drivers support -- do not need to
written out explicitly. Their absence (or presence) is implied as the default.
If there's any doubt over whether the CAP is exposed, it's easy to check in
u_pipe_screen_get_param_defaults.

For the Gallium tree in general, this brings a number of benefits:

* Unused CAPs are easy to delete, because there is only a single place
  (u_pipe_screen_get_param_defaults) where they are referenced and need to be
  deleted from.

* New CAPs are easy to introduce, for the same reason.

* It's straightforward to audit which drivers support (or don't support) a given
  CAP by grepping for the name (for example, when determining whether a CAP is
  unused and can be garbage collected, or a CAP is so widely supported that it
  can be made default.). You still need to check the source code in case it's
  conditionally exposed (common for layered drivers) but the search space is
  limited to drivers that reference the CAP by name.

Unfortunately, all of these benefits rely on all Gallium drivers cooperating.
The status quo is much less nice:

* Unused CAPs need to be deleted both from common code, and also specially from
  nouveau. Why is nouveau special?

* New CAPs need to be added both to common code, and also specially to nouveau.
  Again, why is nouveau special?

* When grepping for CAPs, nouveau (only) needs to be ignored, since it's
  spurious.  Unless sometimes it's not, in which case you need to open nouveau
  source code anyway to check.

Compounding on the fun, you have to do the special nouveau step twice, once for
nvc0 and once for nv50.

Why might it be benefical to list CAPs explicitly instead of relying on the
defaults?

* Maybe easier auditing nouveau driver for CAP correctness? In practice this has
  not been an issue for any of the drivers I've worked on, especially because
  the defaults are quite reasonable.

* Maybe forcing people adding CAPs to think about nouveau specially? This isn't
  fair to the tree in general, why should nouveau get this special
  treatment? Instead, CAPs are generally added to gate functionality that may
  not be supported on all drivers, and the default is disabling the new
  functionality until a developer for a given driver can wire it up. There's
  already no expectation that the person adding CAPs needs to also add the
  functionality to nouveau (if that's even possible) -- unless the CAP is being
  added for the particular nouveau's benefit of course -- so this isn't helpful.

* Maybe forcing people removing CAPs to think about nouveau specially? Similar
  issues apply here, and it's not clear how this would even work.

* Maybe keeping novueau developers aware of CAP churn? Again nouveau should not
  be special here and it isn't sustainable to do this for every driver. So, if
  this is something that nouveau developers want to do -- and they choose not to
  follow Gallium-tagged merge requests -- then the git log of
  src/gallium/include/pipe/p_defines.h or indeed
  src/gallium/auxiliary/util/u_screen.c may be consulted.

So, without an excellent reason why nouveau should be treated specially, and
with several reasons why it should not, let's bring nouveau in line with the
rest of Gallium and rely on the defaults.

I've left in CAPs with attached comments even when they are returning the
default value to preserve information from before the commit. Otherwise, this
commit aims to remove explicit cases that match the default value, as other
drivers generally aim to do.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22245>
2023-04-06 14:13:00 +00:00
Guilherme Gallo
fe60fa898e Revert "ci: disable Collabora's LAVA lab for maintance"
This reverts commit 86ad0356b6.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22329>
2023-04-06 08:49:23 -03:00
Tapani Pälli
44053c0947 intel/common: limit the amount of SLM with Wa_14017341140
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22307>
2023-04-06 10:54:47 +00:00
Rohan Garg
e21cca78ea anv,blorp,iris: Set PreferredSLMAllocationSize on gfx125+
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22307>
2023-04-06 10:54:47 +00:00
Rohan Garg
3b6dbf8902 intel/genxml: Add the preferred slm size enum for gen125
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22307>
2023-04-06 10:54:46 +00:00
Anuj Phogat
606a39f9d1 intel/genxml/125: Add preferred SLM allocation size field
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22307>
2023-04-06 10:54:46 +00:00
Jesse Natalie
767c5425da CI/windows: Increase timeout for build container job
These jobs can take upwards of 40 minutes just to upload
the built container images...

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22320>
2023-04-06 09:14:22 +00:00
Jesse Natalie
24fce05f3f CI/windows: Update headers and Agility redist to 1.710.0-preview
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22320>
2023-04-06 09:14:22 +00:00
Timothy Arceri
5a29af262c glsl: move some GL ES checks to the NIR linker
Eventually we should aim to remove the GLSL IR linker.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22305>
2023-04-06 08:07:35 +00:00
Timothy Arceri
bf8f11a2de mesa: add _mesa_is_api_gles2() helper
The glsl compiler has been reworked to avoid passing gl_context around
so that we can avoid expensive recompiles across the code base for
minor changes. This helper will help us avoid passing gl_context around
where its otherwise unrequired.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22305>
2023-04-06 08:07:35 +00:00
Sergi Blanch Torne
86ad0356b6 ci: disable Collabora's LAVA lab for maintance
This is to inform you of some planned downtime in the LAVA lab as follows:

    Start: 2023-04-06 07:30 GMT
    End: 2023-04-06 09:00 GMT

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22185>
2023-04-06 06:04:57 +00:00
Chia-I Wu
a38de4c011 radv: disable tc_compatible_cmask on GFX9 in some cases
There seems to be issues when sample count > 2 on GFX9.  More precisely,
CTS has issues when sample count > 2.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21615>
2023-04-06 05:27:01 +00:00
Chia-I Wu
bd5fb29db6 radv: add RADV_FMASK_COMPRESSION_PARTIAL
RADV_FMASK_COMPRESSION_PARTIAL means the fmask is decompressed but not
expanded.  It is desired for sampling when the cmask is not
TC-compatible.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21615>
2023-04-06 05:27:01 +00:00
Chia-I Wu
3cf7ac4e9c radv: rework radv_layout_fmask_compressed
Rename radv_layout_fmask_compressed and make it return an enum.  We will
add partial compression (fmask decompressed and not expanded) in a
following commit.

Drop the check for VK_IMAGE_USAGE_STORAGE_BIT and
VK_IMAGE_USAGE_TRANSFER_DST_BIT.  When transitioning to
VK_IMAGE_LAYOUT_GENERAL, we should decompress and expand FMASK even when
those usage bits are not set.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21615>
2023-04-06 05:27:01 +00:00
Emma Anholt
8e84a23697 ci/zink: Disable a630 portal-2-v2 due to kernel OOMs.
It's been popular for flakes due to oomkilling or kernel kmalloc failure
recently.  Is it ultimately the source of running out of memory?  Who
knows, but hopefully it's at least a big part of the problem.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
ffa867b535 tgsi: Drop TGSI_OPCODE_DFRACEXP.
This is no longer emitted by nir_to_tgsi, so let's drop it.  This unlocks
some more TGSI DCE, since now all instructions have a single dest, but
that's a project for another day.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
ba5bc2677f glsl: Drop PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED.
All drivers should now be using the appropriate NIR lowering, so we can
drop this pile of code.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
7325f699db glsl: Drop frontend lowering of 32-bit frexp.
All the users should now be calling the appropriate NIR lowering function.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
fca4857091 nir_to_tgsi: Always lower frexp_exp/sig.
The GLSL frontend was already lowering 32-bit frexp, so only 64-bit frexp
is possible as an op in the incoming NIR.  However, svga and nouveau don't
set PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED, leaving just r600's
non-default TGSI mode potentially using it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
3f2328c629 panfrost/midgard: Enable nir_lower_frexp.
Needed for dropping the GLSL frontend lowering.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
094b5a71d7 agx: Enable nir_lower_frexp.
Needed for Vulkan, and for dropping GLSL frontend lowering for the deqp
coverage override case.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
862235ecaa v3d: Lower frexp in the GL compiler like we do in Vulkan.
Needed for dropping GLSL's frontend lowering.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
04c31c6ada zink: Enable nir_lower_frexp.
This will enable GLSL to drop its frexp lowering in the frontend.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
7c57061b77 nouveau: Enable frexp lowering in the backend.
This would be desired for NVK using this backend, but also for getting
lowering out of the GLSL frontend.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
3a336a8ffd nouveau: Add missing nir_opt_algebraic_late.
This was needed for nir_lower_frexp, but it's a win anyway.  shader-db
results:

total gpr in shared programs: 1143621 -> 1143502 (-0.01%)
gpr in affected programs: 33918 -> 33799 (-0.35%)

total instructions in shared programs: 7829415 -> 7820124 (-0.12%)
instructions in affected programs: 1204967 -> 1195676 (-0.77%)

total bytes in shared programs: 71802760 -> 71717352 (-0.12%)
bytes in affected programs: 11031888 -> 10946480 (-0.77%)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
f2228902ed ir3: Move turnip's nir_lower_frexp to the shared compiler.
We had NIR lowering for Vulkan, and rely on GLSL's lowering in the
frontend, but this will let us drop the GLSL lowering.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
f1ea6c1b40 intel: Always call nir_lower_frexp.
We have NIR lowering for Vulkan, and rely on GLSL's lowering in the
frontend, but this will let us drop the GLSL lowering.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
fb60edf4e9 state_tracker: Lower frexp before lowering doubles.
We don't have softfp64 for frexp, it has been lowered in GLSL up until
now.  I didn't bother splitting out 32 from 64 because it's not worth any
effort.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
261c1f9ee1 glsl/softfp64: Add fisfinite lowering.
This is generated by nir_lower_frexp, and if we leave fisfinite in place
then the late algebraic pass lowering it to this pattern will cause an
un-lowered fabs64 to be emitted.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Emma Anholt
7ff899dd6e glsl/softfp64: GC the temp vars after we lower them to SSA.
They don't serve any purpose other than taking up memory and cluttering
your compiler output at this point.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:00 +00:00
Emma Anholt
2a33ea95d6 glsl: Retire ldexp lowering in favor of the nir lowering flag.
Compilers need to set the nir flag anyway for vulkan, so just pass ldexp
through to NIR and let that handle it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:00 +00:00
Emma Anholt
675f4ff596 zink: Add mapping for nir_op_ldexp, but disable it for 64-bit's sake.
We previously had GLSL do ldexp lowering to bitops, but NIR can do it
instead.  It's tempting to just pass the NIR op through to the host Vulkan
driver, but to do that we'd need to split up NIR's flag between 32 and
64-bit support, and that's not worth anyone's time for an op we've never
seen used.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:00 +00:00
Emma Anholt
46bf687882 glsl: Move ForceGLSLAbsSqrt handling to glsl-to-nir.
Cutting more GLSL lowering pass in favor of nir builder.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:00 +00:00
Mike Blumenkrantz
a73c28fdce radv: fix leak of nir from retained shaders
if shaders are found in the app cache above, execution will goto done:
and the nir must still be freed

Fixes: 03d2bd6042 ("radv: ensure to retain NIR shaders for GPL libs found in the cache")

fixes #8786

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22317>
2023-04-06 01:53:28 +00:00
Eric Engestrom
e6c84b8a00 panfrost: assign the correct create_for_resource from the start
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22322>
2023-04-05 23:15:35 +00:00
Rob Clark
66d4dbd960 util/disk_cache: Move blob_put_cb to the async queue
Move deflate and put to the queue for the blob cache case.  This moves
the overhead out of the app thread when storing new shaders.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22248>
2023-04-05 20:25:04 +00:00
Rob Clark
dab1bd5a77 util/disk_cache: Use queue state to skip put
If we move the blob-cache path into the async queue, then
path_init_failed is no longer a good way to check if puts
should be a no-op.  But fortunately checking if the queue
is initialized is, and is a more obvious check because
what it is guarding is a util_queue_add_job().

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22248>
2023-04-05 20:25:04 +00:00
Rob Clark
213627e94b util/disk_cache: Add NONE type
Add an explicit enum for the DISK_CACHE_NONE type so that we don't
confuse with the MULTI_FILE case on android when the blob-cache is
used.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22248>
2023-04-05 20:25:04 +00:00
Rob Clark
afb350906e util/disk_cache: Split out queue initialization
Split out a helper to initialize the queue, as we'll want to re-use this
for the blob-cache case.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22248>
2023-04-05 20:25:04 +00:00
Jordan Justen
eef7a117a1 intel/compiler: Support fmul_fsign opt for fp64 when int64 isn't supported
MTL support fp64, but not int64. The fsign(double(x))*FOO optimization
would try to use a 64-bit int xor operation to conditionally toggle
the sign bit off the result.

Since this only affects high bit of the result, we can do a 32-bit
move of the low dword, and a 32-bit xor on the high dword.

Fixes dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.modf_denorm_flush_to_zero
on MTL.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22259>
2023-04-05 18:48:21 +00:00
Timur Kristóf
7abd8c499b radv/amdgpu: Remove can_patch and chained submit code path.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22220>
2023-04-05 17:10:25 +00:00
Timur Kristóf
6aa518ea86 radv: Chain cmd buffers in queue code when possible, not in winsys.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22220>
2023-04-05 17:10:25 +00:00
Timur Kristóf
c876e99aa4 radv/amdgpu: Unchain CS array in queue code not in winsys.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22220>
2023-04-05 17:10:25 +00:00
Timur Kristóf
44f7e42665 radv/amdgpu: Walk chained CS objects for BO list.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22220>
2023-04-05 17:10:25 +00:00