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radeonsi: use COMPUTE_DISPATCH_SCRATCH_BASE on gfx940

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Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
This commit is contained in:
Marek Olšák 2022-10-21 15:59:36 -04:00 • committed by Marge Bot
parent d3b03fedd8
commit 72354667cb
2 changed files with 6 additions and 2 deletions
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7
src/gallium/drivers/radeonsi/si_compute.c
View file

@ -405,7 +405,8 @@ static bool si_setup_compute_scratch_buffer(struct si_context *sctx, struct si_s
}
if (sctx->compute_scratch_buffer != shader->scratch_bo && scratch_needed) {
if (sctx->gfx_level < GFX11) {
if (sctx->gfx_level < GFX11 &&
(sctx->family < CHIP_GFX940 || sctx->screen->info.has_graphics)) {
uint64_t scratch_va = sctx->compute_scratch_buffer->gpu_address;
if (!si_shader_binary_upload(sctx->screen, shader, scratch_va))
@ -507,7 +508,9 @@ static bool si_switch_compute_shader(struct si_context *sctx, struct si_compute
S_00B8A0_INST_PREF_SIZE(si_get_shader_prefetch_size(shader)));
}
if (sctx->gfx_level >= GFX11 && shader->scratch_bo) {
if ((sctx->gfx_level >= GFX11 ||
(sctx->family >= CHIP_GFX940 && !sctx->screen->info.has_graphics)) &&
shader->scratch_bo) {
radeon_set_sh_reg_seq(R_00B840_COMPUTE_DISPATCH_SCRATCH_BASE_LO, 4);
radeon_emit(sctx->compute_scratch_buffer->gpu_address >> 8);
radeon_emit(sctx->compute_scratch_buffer->gpu_address >> 40);

1
src/gallium/drivers/radeonsi/si_shader.c
View file

@ -2358,6 +2358,7 @@ bool si_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *compi
/* Add the scratch offset to input SGPRs. */
if (sel->screen->info.gfx_level < GFX11 &&
(sel->screen->info.family < CHIP_GFX940 || sel->screen->info.has_graphics) &&
shader->config.scratch_bytes_per_wave && !si_is_merged_shader(shader))
shader->info.num_input_sgprs += 1; /* scratch byte offset */