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Author SHA1 Message Date
Vincent Lejeune
6db2e9fdb0 radeon/llvm: Add a predicated JUMP instruction 
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
 2012-08-15 21:07:13 +00:00
Vincent Lejeune
8263408a91 radeon/llvm: Support for predicate bit 
Tom Stellard:
  - A few changes to predicate register defs

Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
 2012-08-15 21:07:13 +00:00
Vincent Lejeune
8f597d57e9 r600g: Glue to handle predicate aware output from llvm 
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
 2012-08-15 21:07:13 +00:00
Vincent Lejeune
72f7632c6b r600g: Fix instruction group merge when there are predicated insts. 
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
 2012-08-15 21:07:13 +00:00
Vincent Lejeune
56227f875b radeon/llvm: Do not use PV/PS if PRED_SEL does not match 
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
 2012-08-15 21:07:13 +00:00
Vincent Lejeune
da676eab93 r600g: Add support for predicates 
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
 2012-08-15 21:07:13 +00:00
Christian König
cf76edd300 radeonsi: move ps sampler state into PM4 stream 
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2012-08-15 22:13:19 +02:00
Christian König
ec5b698525 radeonsi: move ps sampler views into PM4 stream 
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2012-08-15 22:13:19 +02:00
Christian König
54de6f452c radeonsi: move vertex state descriptors into PM4 stream 
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2012-08-15 22:13:19 +02:00
Christian König
f2c95d93db radeonsi: add shader data infrastructure 
With this we can embed data for the shaders (like resource
descriptors) into the PM4 stream.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2012-08-15 22:13:19 +02:00
Christian König
4444b9d1ec radeon/llvm: add support to fetch temps as vectors 
Necessary for texture fetches with temp regs as source on SI.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2012-08-15 22:13:19 +02:00
Tom Stellard
b6051bc785 radeon/llvm: Remove AMDGPUUtil.cpp 2012-08-15 18:35:26 +00:00
Apostolos Bartziokas
040c2e0456 radeon/llvm: Cleanup AMDGPUUtil.cpp 2012-08-15 18:35:25 +00:00
Tom Stellard
3aaa209293 radeon/llvm: Lower loads from USE_SGPR adddress space during DAG lowering 2012-08-15 18:35:25 +00:00
Tom Stellard
40c41fe890 radeon/llvm: Add live-in registers during DAG lowering 
Psuedo instructions emulating live-in registers have been removed
and their corresponding intrinsics are now being lowered during DAG
lowering.
 2012-08-15 18:35:25 +00:00
Tom Stellard
f3480f9234 radeon/llvm: Lower store_output intrinsic during DAG lowering 2012-08-15 18:35:25 +00:00
Tom Stellard
a76a0f7422 radeon/llvm: Force VTX_READ instructions to use same reg for src and dst 
I was seeing some GPU hangs that seemed to be cause by ALU instructions
writing to the same register used as the source for VTX_READ.  Adding
this constraint to the VTX_READ instructions avoids this situation.
 2012-08-15 18:35:25 +00:00
Marek Olšák
97b4b97b2f radeonsi: fix build breakage after u_blitter changes 2012-08-15 20:03:37 +02:00
Marek Olšák
e0cc61bd91 gallium/u_blitter: document custom meta helpers 2012-08-15 19:20:58 +02:00
Marek Olšák
b3b5bb9ddb r600g: disable handling of DISCARD_RANGE 
https://bugs.freedesktop.org/show_bug.cgi?id=53130
 2012-08-15 19:20:58 +02:00
Marek Olšák
44f14ebd7b r600g: implement timestamp query and get_timestamp hook 
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2012-08-15 19:20:58 +02:00
Marek Olšák
1932bc8aae r600g: enable MSAA on evergreen by default 
v2: add the DRM version check
 2012-08-15 19:20:58 +02:00
Marek Olšák
870af19d70 r600g: implement copying between MSAA textures 2012-08-15 19:20:58 +02:00
Marek Olšák
0f86915c53 r600g: implement MSAA color resolve 2012-08-15 19:20:58 +02:00
Marek Olšák
94b634eca0 r600g: implement MSAA depth-stencil decompression and resolve 
and integer textures, which are resolved the same as depth, I think.
 2012-08-15 19:20:58 +02:00
Marek Olšák
6d3ad2dd2b r600g: implement TXQ_LZ opcode 2012-08-15 19:20:57 +02:00
Marek Olšák
4b78df9c81 r600g: implement MSAA rendering and texturing for evergreen and cayman 2012-08-15 19:20:57 +02:00
Marek Olšák
a01791add0 r600g: implement set_sample_mask 2012-08-15 19:20:57 +02:00
Marek Olšák
6517225078 r600g: implement alpha-to-coverage 2012-08-15 19:20:57 +02:00
Marek Olšák
26cb887ea2 r600g: implement alpha-to-one 2012-08-15 19:20:57 +02:00
Marek Olšák
4f21595276 r600g: remove support for 3-channel colorbuffers 
We have no sampler support for them.
 2012-08-15 19:20:57 +02:00
Marek Olšák
2f14202f52 configure.ac: bump libdrm_radeon requirement to 2.6.38 2012-08-15 19:20:57 +02:00
Marek Olšák
a7f4d3b740 winsys/radeon: print error if CS is overflowed 
and don't submit the CS to the kernel.
 2012-08-15 19:20:57 +02:00
Marek Olšák
dc5e61d884 gallium/u_blitter: implement X and Y texture flipping 2012-08-15 19:20:57 +02:00
Marek Olšák
825b45366d gallium/u_blitter: implement blitting multisample resources 
It can blit only one sample at a time (it should be called in a loop).
 2012-08-15 19:20:57 +02:00
Marek Olšák
dacf5dc9ac gallium: add TGSI support for multisample textures 
The only allowed instructions are TXQ_LZ and TXF.

TXQ_LZ is like TXQ, but without the LOD parameter (which is always zero
with MSAA textures)

The 3rd or the 4th texcoord component in TXF should contain the sample index
for a 2D_MSAA or 2D_ARRAY_MSAA texture, respectively.
 2012-08-15 19:20:57 +02:00
Marek Olšák
ba53573a8b gallium/tgsi: fix TGSI text parser 
The problem was that the string matching succeeded e.g. for "2D" when there
was actually "2D_MSAA" and then failed parsing "_MSAA".

To prevent similar failures in the future, let's fix this kind of error
everywhere.
 2012-08-15 19:20:57 +02:00
Marek Olšák
b7c4ee21c5 gallium/u_blit: set dst format from pipe_resource, not pipe_surface 
We use it to decide whether we can use resource_copy_region.

NOTE: This is a candidate for the 8.0 branch.
 2012-08-15 19:20:57 +02:00
Marek Olšák
1a17c42344 gallium: make pipe_box signed in order to represent flipped blits 
This will be used by u_blitter.
 2012-08-15 19:20:57 +02:00
Marek Olšák
03b78ceb50 st/mesa: don't clamp fragment color with integer colorbuffer 2012-08-15 19:20:57 +02:00
Marek Olšák
e06d6168cb mesa: flush vertices in test_framebuffer_completeness 2012-08-15 19:20:57 +02:00
Michel Dänzer
538085c5d4 st/egl: Fix up for ClientVersion -> ClientMajorVersion rename. 
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53513

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
 2012-08-15 10:49:39 +02:00
Jordan Justen
b3900ed5ad i965: add ARB_texture_rgb10_a2ui support 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
 2012-08-14 17:07:42 -07:00
Jordan Justen
091eb15b69 meta: allow CopyTexSubImage on integer formats 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
 2012-08-14 17:07:42 -07:00
Jordan Justen
6671d0dad3 mesa ReadPixels: handle signed/unsigned integer clamping 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
 2012-08-14 17:07:42 -07:00
Jordan Justen
f7333b6345 mesa pack: handle packed integer formats with clamping 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
 2012-08-14 17:07:42 -07:00
Jordan Justen
1a814217c3 mesa unpack: call _mesa_problem when unpack function is not available 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
 2012-08-14 17:07:42 -07:00
Jordan Justen
b3dd048cbb mesa texstore: handle signed/unsigned integer clamping 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
 2012-08-14 17:07:42 -07:00
Jordan Justen
7208505d30 mesa GetTexImage: handle signed/unsigned integer clamping 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
 2012-08-14 17:07:42 -07:00
Jordan Justen
7ef270867c mesa pack: handle uint and int clamping properly 
Rename _mesa_pack_rgba_span_int to _mesa_pack_rgba_span_from_uints.
Add _mesa_pack_rgba_span_from_ints.

These separate routines allow the integer clamping to be handled
properly for signed versus unsigned integers.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
 2012-08-14 17:07:42 -07:00