Commit graph

8839 commits

Author SHA1 Message Date
Jesse Natalie
92dcaf7deb dxil: Remove custom SSBO lowering
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:37 +00:00
Jesse Natalie
ecfbc16f61 dxil: Delete load_ubo_dxil intrinsic
Instead of splitting unaligned UBO loads while still using derefs,
and then lowering load_ubo to load_ubo_dxil in lower_loads_stores_to_dxil,
use lower_mem_access_bit_sizes and lower_ubo_vec4 to handle load size and
alignment restrictions while converting to load_ubo_vec4 instead, which
has the same semantics as load_ubo_dxil.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3842
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
f121d8fe12 microsoft/compiler: Un-lower shared/scratch to derefs
Derefs have index-based access semantics, which means we don't need
custom intrinsics to encode an index instead of a byte offset.

Remove the "masked" store intrinsics and just emit the pair of atomics
directly. This massively reduces duplication between scratch, shared,
and constant, while also moving more things into nir so more optimizations
can be done.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
f9b0382faf microsoft/compiler: Emit const accesses as load_deref
There's a few changes in here that are very inter-related.

First, we stop lowering load_deref on shader_temp to load_ptr_dxil,
and just leave it as load_deref. In order for that to work, we need
the derefs to be in a shape that's acceptable to DXIL, so the only
current producer of shader_temp loads (the CLC frontend) needs to
run some lowering passes on them first.

The DXIL backend is augmented to just write out deref indices while
walking a deref chain, which will get combined in the load op into
a GEP instruction. For non-mesh/raytracing shaders, these are required
to be single-level scalar arrays, but the complexity here is preparation
for when we don't need to do that anymore.

Additionally, the const lookups are changed from using a hash table
to just putting an index on the variable.

All of this together is enough to enable the authored-forever-ago test
which uses indirect array access into a const packed struct. The
load_ptr_dxil handling didn't deal with packed structs / unaligned
accesses, but now that we're in a logical address space with derefs
instead of physical, there's no alignment to deal with anymore and
the fact that it's packed goes out the window.

This removes one custom DXIL intrinsic.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
fba82797d7 nir: Optimize unpacking 16 bit values that were originally packed
I was seeing u2u64 still in my final shader after pack/unpack were
lowered, which sounds to me like some other optimizations are missing
for detecting the post-lowering pack/unpack patterns, but let's at
least add some patterns for the simple cases.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
663d957480 nir: Fix constant expression for unpack_64_4x16
Cc: Mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
c70d94a889 nir_lower_mem_access_bit_sizes: Support unaligned stores via a pair of atomics
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8282
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
082eba6165 nir_lower_mem_access_bit_sizes: Move options into a struct
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
4217353e2d nir_lower_mem_access_bit_sizes: Add a bit_size input to the callback
We'd like to use this callback to adjust loads and stores from things
that are unsupported to things that are supported, but if the input
is already supported, we'd prefer not to change it. Rather than making
up a bit size that'd work and doing a bunch of pack/unpack bit math,
only return a different bit size if the input one doesn't work for us
(i.e. can't load enough memory or just an unsupported size entirely).

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
e77fe70b1e nir_lower_ubo_vec4: Delete an invalid assert
This pass handles 16-component 8-bit loads, 8-component 16-bit loads,
and 2-component 64-bit loads. The number of components for the fallback
case doesn't need to be 4.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
bb311ce370 nir: Allow atomics as non-complex uses for var-splitting passes
The var splitting pass can rearrange the variables as long as their
position in memory doesn't matter. For block-arranged variables,
or things like memcpys or casts, the layout matters, but atomics
don't imply anything about the layout of the overall variable, so
don't treat them as "complex" for this use case.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
cf9ea94958 nir_split_struct_vars: Support more modes and constant initializers
Idiomatic DXIL has constants contained within global variables rather
than a big blob of data. Doing this allows us to have 16-bit and 64-bit
data as well, where normally bitcasts would be disallowed on variable
GEP chains.

Unfortunately, DXIL validation requires SOA to be turned into AOS,
which means we need to split structs. We want to be able to run this
on nir_var_mem_constant variables which have constant initializers,
so add a bit of logic to handle that case, and relax the mode validation.
There's nothing special about the modes it was set up to handle.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
c0e41e9b3e vtn: Set is_null_constant
Note that pointers are not considered to be nir null constants, since
a null pointer value might not be 0s.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
4edfb67fd4 nir: Add is_null_constant to nir_constant
Indicates that the values contained within are 0s, regardless of
type. Enables some optimizations.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Jesse Natalie
009d2de88f nir_opt_constant_folding: Fix nir_deref_path leak
Cc: Mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Alyssa Rosenzweig
5c1d614256 nir: Add interleave_agx instruction
While this is a generic bit twiddling ALU instruction, it's especially useful
for address calculations, since the architecture's tiled textures use Morton
coding within the tiles.

This will be used when lowering image_texel_address on AGX, as part of the image
atomics implementation. I don't know if there's any other neat uses I could
detect with opt_algebraic, this doesn't seem like an operation a shader would
open-code... Maybe useful for BVH building or something...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23513>
2023-06-12 20:09:53 +00:00
Alyssa Rosenzweig
d1b94a11bd nir/lower_tex: Use nir_steal_tex_src
The find-remove-use pattern is quite natural for texture lowering :)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23513>
2023-06-12 20:09:53 +00:00
Alyssa Rosenzweig
36e779e4a9 nir/builder: Add steal_tex_src helper
I have this in the AGX compiler but I want to use it in more places.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23513>
2023-06-12 20:09:53 +00:00
Sviatoslav Peleshko
08e95f8f8e nir/lower_shader_calls: Fix cursor if broken after nir_cf_extract() call
Fixes: e2dadda3 ("Revert "nir/lower_shader_calls: put inserted instructions into a dummy block")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8978
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22884>
2023-06-11 00:29:49 +00:00
Mykhailo Skorokhodov
40042ed25a nir: Rematerialize derefs after opt_dead_cf
Adding `nir_rematerialize_derefs_in_use_blocks_impl`
solves some cases when 'opt_dead_cf()' generates
a phi instruction for the first argument
of the `deref_store` intrinsic.

Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Lionel Landwerlin's avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6742
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22983>
2023-06-09 21:35:21 +00:00
Alyssa Rosenzweig
5a55ef2fd1 nir: Add AGX atomic intrinsics
This is a piece of cake with unified atomics :-) This will let us do our
addressing math tricks nice and easily.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
2023-06-09 12:06:00 +00:00
Caio Oliveira
4f9a23e339 spirv: Use vtn_translate_scope for OpReadClockKHR
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23508>
2023-06-08 21:21:47 +00:00
Caio Oliveira
089a0cf4ef spirv: Refactor and rename scope translation helper
This will make the change from nir_scope to mesa_scope
later less noisy.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23508>
2023-06-08 21:21:47 +00:00
Karol Herbst
90b8666ff2 clc: relax spec constant validation
Multiple values can have multiple spec constants assigned and vtn handles
this just fine. So just drop that assert as we need it to run SyCL
kernels.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9037
Fixes: a699844ffb ("microsoft/clc: Parse SPIR-V specialization consts into metadata")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23512>
2023-06-08 17:22:47 +00:00
Yonggang Luo
1eda220f18 compiler: use align instead glsl_align and remove glsl_align
#include "util/u_math.h" when necessary to call align function

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23421>
2023-06-08 06:41:21 +00:00
Yonggang Luo
4134f9ac09 util: Do not use align as variable name
Because align is also a function in u_math.h

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23421>
2023-06-08 06:41:21 +00:00
Daniel Schürmann
be9f4a80b8 nir: add nir_intrinsic_resume_shader_address_amd
This intrinsic returns a pointer to the end of the shader
and is intended for stitched binaries.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Daniel Schürmann
03c4b5b0cc nir,amd: add nir_intrinsic_store_[scalar|vector]_arg_amd to overwrite inputs
This intrinsic must only be used at top-level CF in order
to not break SSA properties.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
2023-06-08 00:37:03 +00:00
Caio Oliveira
0f54621564 compiler/types: Make key in subroutine_name more effective
Use the string itself as a key for searching -- and the internal
allocated name as a key when storing.

Because record_key_hash doesn't consider the name field, which is
the only used field for a SUBROUTINE type, the hash key was always
the same for all types.  Using the name fixes this.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23277>
2023-06-07 23:01:59 +00:00
Samuel Pitoiset
98bb7e10e7 nir: add nir_intrinsic_load_rasterization_primitive_amd
For VK_KHR_fragment_shader_barycentric, AMD needs to know the primitive
topology in the fragment shader but with fast-link GPL this is unknown
at compile time and it needs to be passed dynamically.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Samuel Pitoiset
0358a23012 nir: add nir_intrinsic_load_provoking_vtx_amd
Will be used to load provoking vertex info from the hardware to
determine the provoking vertex ID.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
2023-06-07 14:40:35 +00:00
Yonggang Luo
b687fa4ccb vulkan: move nir_convert_ycbcr into vulkan runtime
This only used by vulkan drivers and depends on vulkan util, so do the move to decouple
nir from vulkan utils

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23444>
2023-06-07 08:42:03 +00:00
Caio Oliveira
d0b7cf192b spirv: Add workaround for OpImageQueryLevels with Multi-sampled images
Warn and replace the query with the constant value 1.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9148
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23407>
2023-06-07 02:06:55 +00:00
Yonggang Luo
568209f57d compiler: Remove redundant struct glsl_type in nir_types.h
The struct glsl_type already declared in glsl_types.h

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23420>
2023-06-07 00:33:33 +00:00
Yonggang Luo
9e8135e936 compiler: Remove the need include "util/glheader.h" and "util/ralloc.h" in glsl_types.h
These includes can be moved into .cpp files and down-stream headers

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23420>
2023-06-07 00:33:33 +00:00
Yonggang Luo
1b836a52ea mesa, compiler: Move gl_texture_index to glsl_types.h
This move is done for decouple glsl_types.h from src/mesa/*

This is achieved by move gl_texture_index from src/mesa/main/menums.h to src/compiler/shader_enums.h
And move ATOMIC_COUNTER_SIZE,MAX_VERTEX_STREAMS from src/mesa/main/config.h to src/compiler/shader_enums.h

Move include main/[config|menums].h into glsl/glsl_parser_extras.h from glsl_types.h
As now glsl_types.h should not include headers from src/mesa/*

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23420>
2023-06-07 00:33:33 +00:00
Yonggang Luo
ab73f717d9 compiler: Move can_implicitly_convert_to helper to glsl module from glsl_types.h
This move is done for decouple glsl_types from glsl_parser_extras

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23420>
2023-06-07 00:33:33 +00:00
Yonggang Luo
f9860a84b3 compiler: Combine duplicated implementation of is_gl_identifier into glsl_types.h
As glsl_types.cpp also called is_gl_identifier, so move it into glsl_types.h,
this will help the decouple glsl_types.h from src/compiler/glsl/*

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23420>
2023-06-07 00:33:33 +00:00
Caio Oliveira
60664285a9 nir/print: Do not print raw values
In many cases the raw value is not really helpful,
since we only work with enums and the raw value is
already printed for indices without special printing.

If an index benefits from having special printing AND the
raw value, we can include the printing of the raw value
as part of its handler.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23375>
2023-06-06 21:50:34 +00:00
Alyssa Rosenzweig
99a00e2247 treewide: Use nir_trim_vector more
Via Coccinelle patches

    @@
    expression a, b, c;
    @@

    -nir_channels(b, a, (1 << c) - 1)
    +nir_trim_vector(b, a, c)

    @@
    expression a, b, c;
    @@

    -nir_channels(b, a, BITFIELD_MASK(c))
    +nir_trim_vector(b, a, c)

    @@
    expression a, b;
    @@

    -nir_channels(b, a, 3)
    +nir_trim_vector(b, a, 2)

    @@
    expression a, b;
    @@

    -nir_channels(b, a, 7)
    +nir_trim_vector(b, a, 3)

Plus a fixup for pointless trimming an immediate in RADV and radeonsi.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23352>
2023-06-06 18:52:25 +00:00
Alyssa Rosenzweig
68eda9456f treewide: Use nir_tex_src_for_ssa
Via Coccinelle patch:

    @@
    expression a, b, c;
    @@

    -a.src = nir_src_for_ssa(b);
    -a.src_type = c;
    +a = nir_tex_src_for_ssa(c, b);

    @@
    expression a, b, c;
    @@

    -a.src_type = c;
    -a.src = nir_src_for_ssa(b);
    +a = nir_tex_src_for_ssa(c, b);

Plus manual fixups, including...

* a few identity swizzles changed to nir_trim_vector in TTN and prog-to-nir to
  fix the Coccinelle-botched formatting, and similarly a pointless nir_channels
* collapsing a now-pointless temp in vtn

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23352>
2023-06-06 18:52:25 +00:00
Alyssa Rosenzweig
3863280399 nir: Add and use nir_tex_src_ssa
This makes texture instructions a lot less annoying to construct, especially in
cases where the deref-based helpers don't work.

I only converted core NIR, not the drivers. Since it was by hand.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23352>
2023-06-06 18:52:24 +00:00
Ian Romanick
7ef45e661f intel/fs: Add constant propagation for ADD3
v2: Require that the constant value be representable as either uint16_t
or int16_t. Suggested by Matt.

v3: Remove redundant patterns. Noticed by Matt.

shader-db:

DG2
total instructions in shared programs: 23103767 -> 23103577 (<.01%)
instructions in affected programs: 51822 -> 51632 (-0.37%)
helped: 98 / HURT: 15

total cycles in shared programs: 842347714 -> 842380017 (<.01%)
cycles in affected programs: 1942595 -> 1974898 (1.66%)
helped: 97 / HURT: 32

Nearly all of the affected shaders (around 9,900) are shaders in
Cyberpunk 2077. It's about an even split between vertex and fragment
shaders. The majority of the remaining affected shaders (3,600) are
from Strange Brigade. This was also a nearly even split between
fragment and vertex.

All but two of the lost shaders are SIMD32 fragment shaders in
Cyberpunk 2077. The other two are SIMD32 fragment shaders in Dota2.

fossil-db:

DG2
Instructions in all programs: 196379107 -> 196248608 (-0.1%)
helped: 13467 / HURT: 1210

Cycles in all programs: 13931355281 -> 13929955971 (-0.0%)
helped: 11801 / HURT: 2922

Lost: 90

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
2023-06-06 06:10:53 +00:00
Ian Romanick
7b34808649 nir/algebraic: Fixup iadd3 related patterns
There should not be any isub at this point due to lowerings that happened
ages before getting to late algebraic.

shader-db:

DG2
total instructions in shared programs: 23103769 -> 23103767 (<.01%)
instructions in affected programs: 65 -> 63 (-3.08%)
helped: 1 / HURT: 0

total cycles in shared programs: 842348074 -> 842347714 (<.01%)
cycles in affected programs: 28572 -> 28212 (-1.26%)
helped: 3 / HURT: 0

One compute shader in Assassin's Creed Odyssey was affected.

fossil-db:

DG2
Instructions in all programs: 196400668 -> 196400676 (+0.0%)
helped: 8 / HURT: 5

Cycles in all programs: 13931740724 -> 13931758003 (+0.0%)
helped: 8 / HURT: 7

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23262>
2023-06-06 06:10:53 +00:00
Caio Oliveira
60a00f246b nir/print: Print 0 when mem_modes or resource_intel have no values
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23376>
2023-06-06 01:23:18 +00:00
Erik Faye-Lund
6d142078bc nir: use generated immediate comparison helpers
This makes the code a bit less verbose, so let's use the helpers.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23393>
2023-06-05 13:40:08 +00:00
Erik Faye-Lund
82465f1418 nir: generate nir_{cmp}_imm variants
We have a couple of open-coded variants of these, but let's generate all
of them for completeness.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23393>
2023-06-05 13:40:07 +00:00
Erik Faye-Lund
28b1c5bca1 nir: use nir_i{ne,eq}_imm helpers
We already have these, so let's use them more.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23393>
2023-06-05 13:40:07 +00:00
Friedrich Vock
87ac5d7d0a nir: Remove unnecessary assert in nir_before_src
This condition can occur in the wild (more specifically in RT shader
call lowering), and it is handled correctly.

Cc: mesa-stable

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22536>
2023-06-03 10:26:02 +00:00
Friedrich Vock
ee2764d5e8 nir: Rematerialize derefs in use blocks before repairing SSA
nir_repair_ssa_impl may insert phi nodes for any deref, but if the deref mode is uniform, validation fails.
To fix this, rematerialize the derefs in the blocks they are used to avoid generating phi nodes for them.

Cc: mesa-stable

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22536>
2023-06-03 10:26:01 +00:00