Commit graph

3841 commits

Author SHA1 Message Date
Jason Ekstrand
8ee88948e3 vulkan: Move vk_device to its own file
Things are going to start getting more complicated so let's avoid the
single mega-file approach.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8676>
2021-02-01 18:54:24 +00:00
Jason Ekstrand
7e76c0ea82 radv: Properly clean up vk_device
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8676>
2021-02-01 18:54:24 +00:00
Jason Ekstrand
8d6cf9e1c2 vulkan/meson: Add missing dependencise on vk_extensions_gen.py
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8676>
2021-02-01 18:54:23 +00:00
Bas Nieuwenhuizen
1eaefe6cfd radv: Do not hash vk_object_base in descriptor set layout.
It contains potentially pointer-y stuff.

Fixes: 178adfa6a8 ("radv: use the base object struct types")
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8809>
2021-02-01 17:03:43 +00:00
Samuel Pitoiset
e870796113 radv: prefer CP DMA for GTT buffer copies/clears on dGPUs due to slow PCIe
The CP DMA bandwidth is always better than PCIe, so I think wasting
compute resources is not a good idea. This is only enabled on GFX10+
because untested on older gens and also because RadeonSI does that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8763>
2021-02-01 12:26:20 +00:00
Samuel Pitoiset
f5a02d16a6 radv/winsys: move the initial BO domain to radeon_winsys_bo
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8763>
2021-02-01 12:26:20 +00:00
Samuel Pitoiset
718c4726f3 radv: fix centroid with VRS coarse shading
Ported from RadeonSI.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8775>
2021-01-29 12:53:15 +00:00
Samuel Pitoiset
c092ff2f2f radv: re-disable TC-compat HTILE for D32S8 on all generations
This actually introduced some VRS related regressions and some others.

Fixes: cc5b6a0e89 ("radv: enable TC-compat HTILE with D32S8 and MSAA on GFX9+")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8777>
2021-01-29 13:29:32 +01:00
Bas Nieuwenhuizen
d938fcefb9 radv: Expose VK_KHR_workgroup_memory_explicit_layout.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8752>
2021-01-29 00:05:36 +01:00
Rhys Perry
2f2a9f253e radv,ac/nir: implement non-uniform get_ssbo_size
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3711
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7969>
2021-01-27 13:00:33 +00:00
Samuel Pitoiset
741c0b1605 radv: enable TC-compat HTILE for mipmaps on GFX10+
Mipmaps+layers should be investigated and mipmaps support added
for previous gens (GFX8-9).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8124>
2021-01-27 09:19:09 +01:00
Samuel Pitoiset
5417c6690e radv: teach radv_htile_enabled() about the number of HTILE levels
This is the main function that enables/disables HTILE for mipmaps.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8124>
2021-01-27 09:19:09 +01:00
Samuel Pitoiset
13f34e65ba radv: add support for fast clearing levels of the HTILE buffer
This can probably be optimized further by checking if the levels
are contiguous in memory.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8124>
2021-01-27 09:19:09 +01:00
Samuel Pitoiset
6576033b20 radv: remove mipmaps related assertions when initializing HTILE
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8124>
2021-01-27 09:02:17 +01:00
Samuel Pitoiset
d47b13c028 radv: do not decompress/resummarize levels without HTILE
It's completely useless to decompress or resummarize levels that
are not compressed using HTILE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8124>
2021-01-27 09:02:17 +01:00
Samuel Pitoiset
e7d898a268 radv: check if HTILE is enabled per-level instead of the entire image
With HTILE mipmaps support, we should check if the base level
currently in use supports compression.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8124>
2021-01-27 09:02:17 +01:00
Samuel Pitoiset
8f1db7401a radv: use the image view range when fast clearing depth
This doesn't change behevior since the driver currently doesn't
support HTILE for mipmaps and also because we can only clear the
whole array layers at once. This improves consistency regarding
the fast clear color path.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8124>
2021-01-27 09:02:17 +01:00
Timur Kristóf
3c03fa5801 radv: Only enable sparse features on Polaris and newer.
On Fiji, the CTS image can cause a hang when these are enabled.
Let's enable them for Polaris and newer only, for now.

Gitlab: #4136
Fixes: 9f43b44bf0
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8646>
2021-01-26 16:56:35 +00:00
Samuel Pitoiset
f01ea0aef8 radv: remove unused EMPTY constant in radv_descript_set.c
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8711>
2021-01-26 17:31:07 +01:00
Samuel Pitoiset
fbeca9df87 radv: remove stub() macros
They are unused since sparse texture is implemented.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8711>
2021-01-26 17:31:05 +01:00
Samuel Pitoiset
64ed873405 radv: remove radv_util.h
util_bitcount() is already defined in src/util/bitscan.h.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8711>
2021-01-26 17:31:03 +01:00
David McFarland
e3f56601e0 radv: fix divide by zero with no tesselation params
Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7878>
2021-01-26 15:14:33 +00:00
Samuel Pitoiset
23461897fe radv: add support for emitting PS_DONE/CS_DONE on GFX6-8
On GFX6, EOS events are always emitted with EVENT_WRITE_EOS.
On GFX7+, EOS events are emitted with EVENT_WRITE_EOS on the
graphics queue, and with RELEASE_MEM on the compute queue.

Fixes: 9c65f1f111 ("radv: synchronize Cmd{Set,Write}Event() using PS_DONE/CS_DONE events")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8710>
2021-01-26 09:26:58 +00:00
James Park
cbcb9e7e1b radv: Fix struct initialization for MSVC
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7793>
2021-01-26 09:16:15 +00:00
James Park
28c4960ca5 radv: Use typed outarray API
MSVC cannot perform GCC __typeof__ for C code. (C++ has decltype.)

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7793>
2021-01-26 09:16:15 +00:00
James Park
6992f5419a radv: Disable calibrated timestamps on Windows
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7793>
2021-01-26 09:16:15 +00:00
James Park
2e81ed2a47 radv: Pointer arithmetic on char/uint8_t, not void
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7793>
2021-01-26 09:16:15 +00:00
James Park
879b5f41f4 radv: Modify radv_descriptor_set for MSVC legality
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7793>
2021-01-26 09:16:15 +00:00
James Park
c0b4b8fc74 radv: Stub sections that don't have _WIN32 support
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7793>
2021-01-26 09:16:15 +00:00
James Park
146e326275 radv: Remove unnecessary headers
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7793>
2021-01-26 09:16:14 +00:00
James Park
b7db6ceb9a radv: Use linker pragma to simulate weak functions
MSVC has an undocumented feature that can act as GCC weak functions.

Also fix warnings about returning a value from void functions.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7793>
2021-01-26 09:16:14 +00:00
Bas Nieuwenhuizen
12ce72fcfc radv: Use stricter HW resolve swizzle compat check.
D and linear are both DISPLAY micro tiling according to ac_surface
but don't work together. This fixes an issue with GFX9+.

This fixes the SkQP WritePixelsNonTexture_Gpu test.

Fixes: 69ea473eeb ("amd/addrlib: update to the latest version")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8665>
2021-01-25 20:53:16 +00:00
Samuel Pitoiset
9c65f1f111 radv: synchronize Cmd{Set,Write}Event() using PS_DONE/CS_DONE events
This is probably rarely used but it can be easily implemented now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8650>
2021-01-25 17:22:08 +00:00
Samuel Pitoiset
bb8f87088c radv,aco: fix shifting input VGPRs for the LS VGPR init bug on GFX9
We were incorrectly shifting the input VGPRs for the instance ID
for chips affected by the LS VGPR init bug (ie. Vega10 and Raven).

When there is no HS threads, the hardware loads the LS VGPR
starting from VGPR 0, so they should be shifted by two.

This fixes some sort of vertex explosion with Squad, Visage, Barn
Finders and probably more titles that use tessellation. Note that
only Vega10 and Raven were affected by this bug.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4129
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3311
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Diego Viola <diego.viola@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8694>
2021-01-25 17:10:44 +00:00
Samuel Pitoiset
7f1ad0538f radv: enable sparseImageInt64Atomics/sparseImageFloat32Atomics
This should be supported. Note that CTS doesn't have tests for
sparseImageFloat32Atomics.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8643>
2021-01-25 16:00:50 +00:00
Connor Abbott
219b84fd5f radv/meta: Use sized types for nir_tex_instr::dest_type
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7989>
2021-01-25 11:21:42 +01:00
Samuel Pitoiset
093b3f6e1f radv: only decompress the depth/stencil aspect that needs to be resolved
For depth/stencil images, the driver was decompressing both aspects
while it should be enough to only decompress the one that's going
to be resolved.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8561>
2021-01-22 18:16:19 +00:00
Samuel Pitoiset
7683ff1420 radv: use a workgroup size of 8x8 for FMASK color expand
Probably better for access patterns.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8642>
2021-01-22 17:05:17 +00:00
Samuel Pitoiset
b4f551d41b radv: use the range aspect mask in FMASK color expand
Instead of harcoding it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8642>
2021-01-22 17:05:17 +00:00
Samuel Pitoiset
4d30de140e radv: add multi-layer support to FMASK color expand
For better performance for layered MSAA images.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8642>
2021-01-22 17:05:17 +00:00
Samuel Pitoiset
3ef89b245e radv: fix separate depth/stencil layout in render pass
We used to select the stencil layout even if we should have selected
the depth/stencil one.

Fixes: e4c8491bdf ("radv: implement VK_KHR_separate_depth_stencil_layouts")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8552>
2021-01-22 15:54:18 +00:00
Samuel Pitoiset
f6755eee0c radv: enable SQTT support on GFX10.3
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8616>
2021-01-22 14:25:16 +00:00
Samuel Pitoiset
aedcaff356 ac,radv: add SQTT support on GFX10.3
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8616>
2021-01-22 14:25:16 +00:00
Samuel Pitoiset
5b5cd18853 radv: inhibit clock gating when tracing with SQTT
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8616>
2021-01-22 14:25:16 +00:00
Samuel Pitoiset
c40ea24ee0 radv: fix overflow when computing the SQTT buffer size
With RADV_THREAD_TRACE_BUFFER_SIZE=1073741824, the computed size
will overflow and be 4096 instead of 4294967296.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8616>
2021-01-22 14:25:16 +00:00
Rhys Perry
9f389af35f radv: sink load_ssbo
fossil-db (GFX10.3):
Totals from 11485 (8.24% of 139391) affected shaders:
SGPRs: 1032456 -> 1033696 (+0.12%); split: -0.69%, +0.81%
VGPRs: 815332 -> 807448 (-0.97%); split: -1.04%, +0.07%
SpillSGPRs: 18014 -> 13497 (-25.07%); split: -28.28%, +3.20%
SpillVGPRs: 1821 -> 1749 (-3.95%)
CodeSize: 101194172 -> 101235028 (+0.04%); split: -0.06%, +0.10%
Scratch: 198656 -> 178176 (-10.31%)
MaxWaves: 86703 -> 87219 (+0.60%); split: +0.67%, -0.07%
Instrs: 19224250 -> 19238562 (+0.07%); split: -0.05%, +0.13%
Cycles: 1486045388 -> 1487481292 (+0.10%); split: -0.03%, +0.13%
VMEM: 2040484 -> 2127647 (+4.27%); split: +6.64%, -2.37%
SMEM: 724060 -> 674966 (-6.78%); split: +1.22%, -8.00%
VClause: 312375 -> 314735 (+0.76%); split: -0.26%, +1.02%
SClause: 702274 -> 711991 (+1.38%); split: -0.77%, +2.15%
Copies: 1413440 -> 1422782 (+0.66%); split: -0.45%, +1.11%
Branches: 658696 -> 658838 (+0.02%); split: -0.12%, +0.14%
PreSGPRs: 884666 -> 879736 (-0.56%); split: -1.30%, +0.74%
PreVGPRs: 777374 -> 769947 (-0.96%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6490>
2021-01-21 18:07:03 +00:00
Rhys Perry
af4c6605a8 radv: use nir_opt_access
fossil-db (GFX10.3):
Totals from 3231 (2.32% of 139391) affected shaders:
SGPRs: 168654 -> 167454 (-0.71%); split: -0.72%, +0.00%
VGPRs: 152352 -> 152416 (+0.04%)
CodeSize: 13872836 -> 13806376 (-0.48%); split: -0.50%, +0.02%
MaxWaves: 36640 -> 36634 (-0.02%)
Instrs: 2639959 -> 2626852 (-0.50%); split: -0.52%, +0.03%
Cycles: 77706000 -> 77496792 (-0.27%); split: -0.28%, +0.01%
VMEM: 809496 -> 790847 (-2.30%); split: +2.06%, -4.36%
SMEM: 267843 -> 253187 (-5.47%); split: +0.76%, -6.23%
VClause: 61353 -> 60426 (-1.51%); split: -1.86%, +0.35%
SClause: 95409 -> 92355 (-3.20%); split: -3.24%, +0.04%
Copies: 194951 -> 196702 (+0.90%); split: -0.53%, +1.43%
Branches: 84320 -> 84331 (+0.01%); split: -0.00%, +0.02%
PreSGPRs: 110162 -> 110203 (+0.04%); split: -0.04%, +0.07%
PreVGPRs: 127021 -> 127037 (+0.01%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6490>
2021-01-21 18:07:03 +00:00
Rhys Perry
dc19fe0e9f radv,aco: use deref_buffer_array_length
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3993
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8163>
2021-01-21 11:53:12 +00:00
Daniel Schürmann
e10779a9f0 radv: don't vectorize shift operations
Currently, these cannot be vectorized as in NIR
shift operands are 32bit while for 16bit-vectorization
they need to be 16bit.

No fossildb changes.

Fixes: fcd2ef23e5 ('radv: vectorize 16bit instructions')

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8612>
2021-01-21 11:44:00 +00:00
Samuel Pitoiset
085e2ce3d4 radv: fix a sync issue with geometry shader primitives query on GFX10+
When NGG is used, the hw can't know the number of geometry shader
primitives. To fix that, the NGG geometry shader accumulates itself
the number of primitives by using an atomic operation directly to GDS.

Then, begin/query copy the start/stop values from GDS to the
query pool buffer using a PS_DONE event. This was actually wrong
because PS_DONE is completely asynchronous to everything and executed
when the preceding draws finish pixel shaders.

Fix this by using a COPY_DATA packet which is synced with CP. This
fixes random failures on Sienna Cichlid with
dEQP-VK.query_pool.statistics_query.*.geometry_shader_primitives.*.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8590>
2021-01-21 08:15:43 +01:00