fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-22 02:40:11 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

radv: enable TC-compat HTILE with D32S8 and MSAA on GFX9+

Browse source 
Only GFX8 has some depth/stencil resolve failures.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8562>
This commit is contained in:
Samuel Pitoiset 2021-01-18 16:02:56 +01:00 • committed by Marge Bot
parent 60ead6e04b
commit cc5b6a0e89
1 changed files with 2 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
src/amd/vulkan/radv_image.c
View file

@ -96,7 +96,8 @@ radv_use_tc_compat_htile_for_image(struct radv_device *device,
/* FIXME: for some reason TC compat with 2/4/8 samples breaks some cts
* tests - disable for now.
*/
if (pCreateInfo->samples >= 2 && format == VK_FORMAT_D32_SFLOAT_S8_UINT)
if (device->physical_device->rad_info.chip_class < GFX9 &&
pCreateInfo->samples >= 2 && format == VK_FORMAT_D32_SFLOAT_S8_UINT)
return false;
/* GFX9 supports both 32-bit and 16-bit depth surfaces, while GFX8 only