Commit graph

13792 commits

Author SHA1 Message Date
Lionel Landwerlin
4ac900b5bf anv/genxml: use special genX video pack files
Before:

   30453 ./build/src/intel/genxml/gen125_pack.h

After:

   17026 ./build/src/intel/genxml/gen125_pack.h
   21589 ./build/src/intel/genxml/gen125_video_pack.h

The idea is to have fewer line to parse in each genX_*.c file.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34276>
2025-04-01 00:03:56 +03:00
Lionel Landwerlin
4fdf5618f9 intel/genxml: add MI_FLUSH_DW to blitter engine
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34276>
2025-04-01 00:03:53 +03:00
Lionel Landwerlin
79a463e40b intel/genxml: define post-sync operations for MI_FLUSH_DW
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34276>
2025-04-01 00:03:50 +03:00
Lionel Landwerlin
d4899b0486 intel/genxml: fixup engine filtering
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34276>
2025-04-01 00:03:47 +03:00
Lionel Landwerlin
04b6eeba63 intel/genxml: add more engine tagging on instructions
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34276>
2025-04-01 00:03:42 +03:00
Lionel Landwerlin
891965a471 intel/genxml: remove ISA fields
Those are for the compiler afaict.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34276>
2025-04-01 00:03:07 +03:00
Caio Oliveira
71ae31dbd8 intel/executor: Allow selecting a device to use
Some checks are pending
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Add a command line option `-d DEVICE` to select
a device either by index or by substring of the
name.

Use `-d list` to print available devices.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34267>
2025-03-31 19:20:10 +00:00
Caio Oliveira
9b2b3255e1 intel/executor: Use getopt for command line arguments
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34267>
2025-03-31 19:20:10 +00:00
irql-notlessorequal
5d6b6c376f hasvk: Advertise VK_KHR_maintenance5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34298>
2025-03-31 16:56:13 +00:00
irql-notlessorequal
b1fe67f118 hasvk: Implement VK calls and formats.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34298>
2025-03-31 16:56:13 +00:00
irql-notlessorequal
f08c87e2b0 hasvk: Implement VkPipelineCreateFlags2KHR support
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34298>
2025-03-31 16:56:13 +00:00
irql-notlessorequal
0d6d23a54f hasvk: Pre-plumbing needed for VK_KHR_maintenance5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34298>
2025-03-31 16:56:13 +00:00
irql-notlessorequal
255166a349 elk: always write the VUE header
ELK equivalent of !34211, also required to avoid potential rendering errors with hasvk.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34298>
2025-03-31 16:56:13 +00:00
irql-notlessorequal
fe7e0fd4f1 elk: ensure VUE header writes in HS/DS/GS stages
ELK equivalent of !34041, required to avoid potential rendering errors with VK_KHR_maintenance5

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34298>
2025-03-31 16:56:13 +00:00
Hyunjun Ko
ae75376c8f anv: Move rateControlMode to the video session.
Some checks are pending
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Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34250>
2025-03-31 04:25:14 +00:00
Lionel Landwerlin
47cfc77085 anv: expose VK_KHR_maintenance8 support
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
2025-03-29 02:15:19 +00:00
Lionel Landwerlin
7fca7cc721 anv: wire VkAccessFlagBits3KHR flags in internal helpers
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
2025-03-29 02:15:18 +00:00
Lionel Landwerlin
23de5abcb5 anv: enable non uniform texture offset lowering
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
2025-03-29 02:15:18 +00:00
Lionel Landwerlin
4346210ae6 brw: move texture offset packing to NIR
That way we can deal with upcoming non constant values for
VK_KHR_maintenance8.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
2025-03-29 02:15:18 +00:00
Lionel Landwerlin
67ae49dede intel: move lower_texture to brw
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
2025-03-29 02:15:18 +00:00
Lionel Landwerlin
86773b2ba6 brw: don't lower tg4 offsets without LOD
The problem this fixes is currently hidden because of the order in
which we run nir_lower_tex & intel_nir_lower_texture. The issue is
that nir_lower_tex removes the LOD source in some cases and the second
run of nir_lower_tex can add it back.

This is also only needed on Gfx12.5+ if the LOD is present.

Finally move all of the texture lowering to the postprocess phase. No
need to run this multiple times.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
2025-03-29 02:15:18 +00:00
Lionel Landwerlin
b87dccc64c elk: stop using intel_nir_lower_texture
It's not doing anything.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138>
2025-03-29 02:15:18 +00:00
Caio Oliveira
63224f64cc brw: Remove adjust_block_ips and brw_inst::remove() with defer
Now that the brw_ip_ranges analysis is being used, there's no
need to track start_ip/end_ips in the blocks as they are mutate.  And
also no need to call adjust_block_ips at the end of some passes.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34012>
2025-03-29 00:25:51 +00:00
Caio Oliveira
8057cfc49d brw: Use brw_ip_ranges in liveness analysis
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34012>
2025-03-29 00:25:51 +00:00
Caio Oliveira
a6b0783375 brw: Use brw_ip_ranges in scheduling / regalloc
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34012>
2025-03-29 00:25:51 +00:00
Caio Oliveira
3659d36087 brw: Use brw_ip_ranges in passes
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34012>
2025-03-29 00:25:50 +00:00
Caio Oliveira
10660f5adf brw: Add analysis for block IP ranges
Calculate the IP ranges of the shader as an analysis pass.  This will
later replace the existing tracking of start_ip/end_ip as the blocks are
changed (and the defer/adjust scheme to avoid too much churn when that
happen).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34012>
2025-03-29 00:25:50 +00:00
Caio Oliveira
fd6045cca9 brw: Track total_instructions in a shader
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34012>
2025-03-29 00:25:50 +00:00
Caio Oliveira
7224b653b5 brw: Use block's num_instructions in scoreboard tests
Stop using the start_ip / end_ip, these are not really important for
those tests.  What the test care was the number of instructions in the
block to check for changes and ensure we can peek at them by index.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34012>
2025-03-29 00:25:50 +00:00
Caio Oliveira
1139ede508 brw: Track num_instructions in a block
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34012>
2025-03-29 00:25:50 +00:00
Caio Oliveira
abe8d35cb8 brw: Remove brw_cfg::dump()
It was used by the pass tests to verify output with TEST_DEBUG=1,
replace it with brw_print_instructions().

The output is slightly different (not printing IP, not reordering the
blocks), we can add those features as we need, but given the usage was
already very reduced, don't bother with that until need arises.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34012>
2025-03-29 00:25:50 +00:00
Dave Airlie
737d66379d anv: expose VK_KHR_video_maintenance2
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34204>
2025-03-28 21:18:00 +00:00
Dave Airlie
af560cd680 anv/video: don't write to params if not set.
This should probably be done different, params should probably be considered immutable,
and this should be moved into the command buffer, also this gets set on decode paths as well
which might not make sense.

Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34204>
2025-03-28 21:18:00 +00:00
Dave Airlie
e4981731be anv/video: convert to common parameters retrieval code
Reviewed-by: Lynne <dev@lynne.ee>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34204>
2025-03-28 21:18:00 +00:00
Michael Cheng
169e7acee1 vulkan: add leaves and ir_leaves sizes to encode for utrace.
Some checks are pending
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Expose number of leaves and ir_leaves to the debug marker for encode.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34200>
2025-03-28 18:25:40 +00:00
Kenneth Graunke
51c67ad7cf brw: Avoid regioning restrictions for u2u16/i2i16 narrowing conversions
Cuts 0.83% of instructions on Alchemist in affected fossil-db shaders
(nearly all of which are in parallel-rdp).

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31833>
2025-03-28 13:40:07 +00:00
Kenneth Graunke
86f8b8860e brw: Use a smaller type for masked sub-32-bit shift values
Cuts 0.14% of instructions on Alchemist in affected fossil-db shaders
(all of which are in parallel-rdp).

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31833>
2025-03-28 13:40:07 +00:00
Kenneth Graunke
2e108afb8c brw: Skip unnecessary UNDEFs for comparisons
For example, SIMD16 W/UW fills an entire REG_SIZE so UNDEF isn't needed.

No change in fossil-db.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31833>
2025-03-28 13:40:07 +00:00
Kenneth Graunke
771e65b0db brw: Emit UNDEF as needed in SSA-style builder helpers
Should prevent regressions in a future commit.
fossil-db does show small changes, but it ends up a wash at 0.0%.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31833>
2025-03-28 13:40:07 +00:00
Kenneth Graunke
b89e269a46 brw: Make a helper to emit UNDEF for temporaries containing small types
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31833>
2025-03-28 13:40:07 +00:00
Daniel Stone
f6f085f50a ci: Re-enable trace jobs with updated Piglit
mesa/piglit!996 fixed up Piglit to allow us to do trace downloads again,
so we can now bring these jobs back. The fdno trace jobs hosted at
Google are still disabled whilst we try to fix their nginx.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34245>
2025-03-28 13:00:14 +00:00
Rohan Garg
c6757cb8f0 isl: enable CPB compression
Some checks are pending
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Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10760
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>
2025-03-28 04:38:09 +00:00
Rohan Garg
5d2a6b23de anv: separate fast clear handling for compressed CPS
CPS surfaces are marked as stencil compressed internally and
should use the fast clear depth stencil path for clearing when possible

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>
2025-03-28 04:38:09 +00:00
Rohan Garg
dadd84f5a8 anv: no need to handle transitions for CPB surfaces
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>
2025-03-28 04:38:09 +00:00
Rohan Garg
80f9b61f02 anv: CPB surfaces that are used as color attachments or for stores cannot be compressed
This particular scenario indicates that the CPB will be written to using
a fragment shader, disable compression to ensure the correct data is
read back from the surface later.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>
2025-03-28 04:38:09 +00:00
Rohan Garg
ceba312ebd anv,blorp,isl: handle compressed CPS surfaces through the depth stencil hw
Compressed CPS surfaces operations such as copies and clears need to be
handled through the depth stencil hw to ensure that the aux data is
handled correctly.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>
2025-03-28 04:38:09 +00:00
Rohan Garg
6f4c23100a anv: refactor add_aux_surface_if_supported to use a common variable
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>
2025-03-28 04:38:09 +00:00
Sagar Ghuge
191d1e7345 intel/compiler: Don't lower 64bit data memory access on LSC
Some checks are pending
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Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34189>
2025-03-28 03:07:56 +00:00
Jordan Justen
f73132f121 intel/dev: Ignore hwconfig difference due to WA 18040209780
Some checks are pending
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Apparently hwconfig has not implemented this workaround.

This warning was noted on MTL and ADL.

> INTEL_HWCONFIG_TOTAL_GS_THREADS (336) != devinfo->max_gs_threads (312)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34243>
2025-03-27 14:52:59 -07:00
Jordan Justen
cdf95273e1 tools/intel_dev_info: Print hwconfig discrepancies
Previously we were printing this information whenever the driver
started, but that proved to noisy.

For example, if running thousands of tests, this would cause thousands
of warnings messages to be printed. (Assuming the driver was built in
debug mode.)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34243>
2025-03-27 14:52:54 -07:00