fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-06 02:58:05 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

brw: Use a smaller type for masked sub-32-bit shift values

Browse source 
Cuts 0.14% of instructions on Alchemist in affected fossil-db shaders
(all of which are in parallel-rdp).

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31833>
This commit is contained in:
Kenneth Graunke 2024-10-22 23:07:44 -07:00 • committed by Marge Bot
parent 2e108afb8c
commit 86f8b8860e
1 changed files with 9 additions and 9 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

18
src/intel/compiler/brw_from_nir.cpp
View file

@ -1700,9 +1700,9 @@ brw_from_nir_emit_alu(nir_to_brw_state &ntb, nir_alu_instr *instr,
*/
case nir_op_ishl:
if (instr->def.bit_size < 32) {
bld.SHL(result,
op[0],
bld.AND(op[1], brw_imm_ud(instr->def.bit_size - 1)));
bld.SHL(result, op[0],
bld.AND(subscript(op[1], BRW_TYPE_UW, 0),
brw_imm_uw(instr->def.bit_size - 1)));
} else {
bld.SHL(result, op[0], op[1]);
}
@ -1710,9 +1710,9 @@ brw_from_nir_emit_alu(nir_to_brw_state &ntb, nir_alu_instr *instr,
break;
case nir_op_ishr:
if (instr->def.bit_size < 32) {
bld.ASR(result,
op[0],
bld.AND(op[1], brw_imm_ud(instr->def.bit_size - 1)));
bld.ASR(result, op[0],
bld.AND(subscript(op[1], BRW_TYPE_UW, 0),
brw_imm_uw(instr->def.bit_size - 1)));
} else {
bld.ASR(result, op[0], op[1]);
}
@ -1720,9 +1720,9 @@ brw_from_nir_emit_alu(nir_to_brw_state &ntb, nir_alu_instr *instr,
break;
case nir_op_ushr:
if (instr->def.bit_size < 32) {
bld.SHR(result,
op[0],
bld.AND(op[1], brw_imm_ud(instr->def.bit_size - 1)));
bld.SHR(result, op[0],
bld.AND(subscript(op[1], BRW_TYPE_UW, 0),
brw_imm_uw(instr->def.bit_size - 1)));
} else {
bld.SHR(result, op[0], op[1]);
}