Commit graph

91382 commits

Author SHA1 Message Date
Dave Airlie
8bd7d8c042 radv: expose integrated device type for APUs.
This just sets the vulkan device type depending on whether
this is an APU or GPU.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
(cherry picked from commit 2890a71158)
2017-06-14 12:47:58 +01:00
Bas Nieuwenhuizen
ffb46c8826 radv: Dirty all descriptors sets when changing the pipeline.
Sets could have been ignored during previous descriptor set flush
due to the shader not using them and therefore no SGPR being assigned.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: ae61ddabe8 "radv: move userdata sgpr ownership to compiler side."
(cherry picked from commit 4415a46be2)

Conflicts:
	src/amd/vulkan/radv_cmd_buffer.c
	src/amd/vulkan/radv_meta.c
2017-06-14 12:47:58 +01:00
Bas Nieuwenhuizen
c8226d3782 radv: Set both compute and graphics SGPRS on descriptor set flush.
We clear the descriptors_dirty array afterwards, so the SGPRs for
the other pipeline don't get updated on the flush for that other
draw/dispatch, so we have to make sure we do it immediately.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: ae61ddabe8 "radv: move userdata sgpr ownership to compiler side."
(cherry picked from commit 5fb8bb3065)
[Emil Velikov: drop radv_flush_indirect_descriptor_sets hunk - missing
in branch]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/vulkan/radv_cmd_buffer.c
2017-06-14 12:47:57 +01:00
Tapani Pälli
6f062ba893 egl: fix _eglQuerySurface in EGL_BUFFER_AGE_EXT case
Specification states that in case of error, value should not be
written, patch changes buffer age queries to return -1 in case of
error so that we can skip changing the value.

In addition, small change to droid_query_buffer_age to return 0
in case buffer does not have a back buffer available.

Fixes:
   dEQP-EGL.functional.negative_partial_update.not_postable_surface

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 8fac894f9b)
2017-06-14 12:47:57 +01:00
Tim Rowley
891dafc8e7 swr: relax c++ requirement from c++14 to c++11
Remove c++14 generic lambda to keep compiler requirement at c++11.

No regressions on piglit or vtk test suites.

Tested-by: Chuck Atkins <chuck.atkins@kitware.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

CC: mesa-stable@lists.freedesktop.org
(cherry picked from commit 0b80b02502)
2017-06-14 12:47:57 +01:00
Marek Olšák
2a7279fa8f radeonsi: disable the patch ID workaround on SI when the patch ID isn't used (v2)
The workaround causes a massive performance decrease on 1-SE parts.
(Cape Verde, Hainan, Oland)

The performance regression is already part of 17.0 and 17.1.

v2: check tess_uses_prim_id

Cc: 17.0 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 391673af7a)
[Emil Velikov: s/tcs_tes_uses_prim_id/tess_uses_prim_id/]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-14 12:47:43 +01:00
Jason Ekstrand
ae960d7dee i965: Mark depth surfaces as needing a HiZ resolve after blitting
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
(cherry picked from commit 5097fcbfdc)
2017-06-14 10:40:22 +01:00
Jason Ekstrand
3a193c009b i965: Perform HiZ flush/stall prior to HiZ resolves
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit acbd02450b)
2017-06-14 10:40:22 +01:00
Jason Ekstrand
4889bb6af3 i965: Move the pre-depth-clear flush/stalls to intel_hiz_exec
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit acb9a2ef8f)
2017-06-14 10:40:22 +01:00
Jason Ekstrand
845c238ce2 i965/blorp: Take a layer range in intel_hiz_exec
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit 252b004a51)
2017-06-14 10:40:22 +01:00
Thomas Hellstrom
67acca073a dri3/GLX: Fix drawable invalidation v2
A number of internal VMware apitrace traces image comparisons fail with
dri3 because the viewport transformation becomes incorrect after an X
drawable resize. The incorrect viewport transformation sometimes persist
until the second draw-call after a swapBuffer.

Comparing with the dri2 glx code there are a couple of places where dri2
invalidates the drawable in the absence of server-triggered invalidation,
where dri3 doesn't do that. When these invalidation points are added to
dri3, the image comparisons become correct.

v2:
Addressed review comment by Michel Dänzer.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-and-tested-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit 1253d58983)
2017-06-14 10:40:22 +01:00
Marek Olšák
7b10ed6a12 radeonsi: fix a GPU hang with tessellation on 2-CU configs
Only harvested Stoney has 2 CUs. Tested on 2-CU Stoney and Fiji forced
to 2 CUs.

Cc: 17.0 17.1 <mesa-stable@lists.freedesktop.org>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
(cherry picked from commit 6c655cfeb4)
2017-06-14 10:40:22 +01:00
Marek Olšák
5a8d7ef65a st/mesa: don't load cached TGSI shaders on demand
This fixes a performance issue with the shader cache that delayed Gallium
shader create calls until draw calls.

I'd like this in stable, but it's not a showstopper.

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit 2ec50f98a9)
2017-06-14 10:40:22 +01:00
Lyude
98564569d0 nvc0: disable BGRA8 images on Fermi
BGRA8 image stores on Fermi don't work, which results in breaking
PBO downloads, such that they always return 0x0. Discovered this
through a glamor bug, and confirmed it does indeed break a good number
of piglit tests such as spec/arb_pixel_buffer_object/pbo-read-argb8888

Fixes: 8e7893eb53 ("nvc0: add support for BGRA8 images")
Signed-off-by: Lyude <lyude@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 245912b684)
2017-06-14 10:40:22 +01:00
Brian Paul
6348a02e27 xlib: fix glXGetCurrentDisplay() failure
glXGetCurrentDisplay() has been broken for years and nobody noticed until
recently.  This change adds a new XMesaGetCurrentDisplay() that the GLX
emulation API can call, just as we did for glXGetCurrentContext().

Tested by hacking glxgears to call glXGetCurrentContext() before and
after glXMakeCurrent() to verify the return value is NULL beforehand and
the same as the opened display afterward.

Also tested by Tom Hudson with his tests programs.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100988
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Tom Hudson <tom.hudson.phd@gmail.com>
Signed-off-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit c6ba85a8c0)
2017-06-14 10:40:22 +01:00
Jose Fonseca
c24bdf046e automake: Link all libGL.so variants with -Bsymbolic.
We were linking src/glx with -Bsymbolic, but not the classic/gallium X11
libGL.so.

But it's always a good idea to build all libGL.so and all DRI drivers
with -Bsymbolic, otherwise they might resolve symbols from the 3rd party
application executable or shared libraries, which is _never_ what we
want.

In particular, this can happen when intercepting OpenGL calls with
apitrace, before
63194b2573

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit ce5e83b8a0)
2017-06-14 10:40:22 +01:00
Chad Versace
15b5e5996a i965/dri: Fix bad GL error in intel_create_winsys_renderbuffer()
This function never occurs in the callchain of a GL function. It occurs
only in the callchain of eglCreate*Surface and the analogous paths for
GLX.  Therefore, even if a  thread does have a bound GL context,
emitting a GL error here is wrong. A misplaced GL error, when no GL
call is made, can confuse clients.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit 9d996e94fb)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/mesa/drivers/dri/i965/intel_fbo.c
2017-06-14 10:39:50 +01:00
Lucas Stach
8cfaa8ad66 etnaviv: always do cpu_fini in transfer_unmap
The cpu_fini() call pushes the buffer back into the GPU domain, which needs
to be done for all buffers, not just the ones with CPU written content. The
etnaviv kernel driver currently doesn't validate this, but may start to do
so at a later point in time. If there is a temporary resource the fini needs
to happen before the RS uses this one as the source for the upload.

Also remove an invalid comment about flushing CPU caches, cpu_fini takes
care of everything involved in this.

Fixes: c9e8b49b88 ("etnaviv: gallium driver for Vivante GPUs")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
(cherry picked from commit cab5996c26)
2017-06-14 09:49:45 +01:00
Juan A. Suarez Romero
4908b1e909 docs: add sha256 checksums for 17.1.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-05 21:15:43 +00:00
Juan A. Suarez Romero
97f6404e50 docs: add release notes for 17.1.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-05 20:27:24 +00:00
Juan A. Suarez Romero
eada8963c1 Update version to 17.1.2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-05 20:15:30 +00:00
Jason Ekstrand
ae55ab84b5 anv: Require vertex buffers to come from a 32-bit heap
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 39adea9330)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-03 20:37:13 +02:00
Juan A. Suarez Romero
57cdaa3dcc Revert "cherry-ignore: anv: Require vertex buffers to come from a 32-bit heap"
This reverts commit b3e48a07c0.
2017-06-03 20:37:13 +02:00
Jason Ekstrand
2c23389922 i965: Rework Sandy Bridge HiZ and stencil layouts
Sandy Bridge does not technically support mipmapped depth/stencil.  In
order to work around this, we allocate what are effectively completely
separate images for each miplevel, ensure that they are page-aligned,
and manually offset to them.  Prior to layered rendering, this was a
simple matter of setting a large enough halign/valign.

With the advent of layered rendering, however, things got more
complicated.  Now, things weren't as simple as just handing a surface
off to the hardware.  Any miplevel of a normally mipmapped surface can
be considered as just an array surface given the right qpitch.  However,
the hardware gives us no capability to specify qpitch so this won't
work.  Instead, the chosen solution was to use a new "all slices at each
LOD" layout which laid things out as a mipmap of arrays rather than an
array of mipmaps.  This way you can easily offset to any of the
miplevels and each is a valid array.

Unfortunately, the "all slices at each lod" concept missed one
fundamental thing about SNB HiZ and stencil hardware:  It doesn't just
always act as if you're always working with a non-mipmapped surface, it
acts as if you're always working on a non-mipmapped surface of the same
size as LOD0.  In other words, even though it may only write the
upper-left corner of each array slice, the qpitch for the array is for a
surface the size of LOD0 of the depth surface.  This mistake causes us
to under-allocate HiZ and stencil in some cases and also to accidentally
allow different miplevels to overlap.  Sadly, piglit test coverage
didn't quite catch this until I started making changes to the resolve
code that caused additional HiZ resolves in certain tests.

This commit switches Sandy Bridge HiZ and stencil over to a new scheme
that lays out the non-zero miplevels horizontally below LOD0.  This way
they can all have the same qpitch without interfering with each other.
Technically, the miplevels still overlap, but things are spaced out
enough that each page is only in the "written area" of one LOD.

Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
(cherry picked from commit 10903d2289)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-02 23:04:01 +02:00
Jason Ekstrand
f967ae7b3f anv: Advertise both 32-bit and 48-bit heaps when we have enough memory
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 50d0eb5096)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-02 23:04:01 +02:00
Jason Ekstrand
de8ebbcf1e anv: Refactor memory type setup
This makes us walk over the heaps one at a time and add the types for
LLC and !LLC to each heap.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 34581fdd4f)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-02 23:04:01 +02:00
Jason Ekstrand
2562b3252b anv: Make supports_48bit_addresses a heap property
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit b83b1af6f6)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_device.c
2017-06-02 23:04:01 +02:00
Jason Ekstrand
86a8854b11 anv: Stop setting BO flags in bo_init_new
The idea behind doing this was to make it easier to set various flags.
However, we have enough custom flag settings floating around the driver
that this is more of a nuisance than a help.  This commit has the
following functional changes:

 1) The workaround_bo created in anv_CreateDevice loses both flags.
    This shouldn't matter because it's very small and entirely internal
    to the driver.

 2) The bo created in anv_CreateDmaBufImageINTEL loses the
    EXEC_OBJECT_ASYNC flag.  In retrospect, it never should have gotten
    EXEC_OBJECT_ASYNC in the first place.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 00df1cd9d6)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_allocator.c
	src/intel/vulkan/anv_device.c
	src/intel/vulkan/anv_queue.c
2017-06-02 23:04:01 +02:00
Jason Ekstrand
0f042901e3 anv: Add valid_bufer_usage to the memory type metadata
Instead of returning valid types as just a number, we now walk the list
and check the buffer's usage against the usage flags we store in the new
anv_memory_type structure.  Currently, valid_buffer_usage == ~0.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f7736ccf53)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_device.c
	src/intel/vulkan/anv_private.h
2017-06-02 23:04:01 +02:00
Jason Ekstrand
15bc6d4d21 anv: Determine the type of mapping based on type metadata
Before, we were just comparing the type index to 0.  Now we actually
look the type up in the table and check its properties to determine what
kind of mapping we want to do.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 92325a7efc)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/intel/vulkan/anv_device.c
	src/intel/vulkan/anv_private.h
2017-06-02 23:04:01 +02:00
Jason Ekstrand
0aa1e6acde anv: Set EXEC_OBJECT_ASYNC when available
Reviewed-by: Chad Versace <chadversary@chromium.org>
(cherry picked from commit 35e626bd0e)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Squashed with:

anv/tests: Create a dummy instance as well as device

This fixes crashes caused by 35e626bd0e
which made us start referencing the instance in the allocators.  With
this commit, the tests now happily pass again.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100877
Tested-by: Vinson Lee <vlee@freedesktop.org>
(cherry picked from commit 6ef1bd4fa5)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-02 23:04:01 +02:00
Juan A. Suarez Romero
b7b3c0fce7 Revert "cherry-ignore: anv: [...]"
Revert "cherry-ignore: anv: Refactor memory type setup"
This reverts commit eab4a503a0.

Revert "cherry-ignore: anv: Add valid_bufer_usage to the memory type metadata"
This reverts commit c31e814a85.

Revert "cherry-ignore: anv: Advertise both 32-bit and 48-bit heaps when we have enough memory"
This reverts commit e391144853.

Revert "cherry-ignore: anv: Make supports_48bit_addresses a heap property"
This reverts commit dbadd06632.

Revert "cherry-ignore: anv: Stop setting BO flags in bo_init_new"
This reverts commit 07867f72cf.

Revert "cherry-ignore: anv: Determine the type of mapping based on type metadata"
This reverts commit 9299466b83.
2017-06-02 23:03:47 +02:00
Juan A. Suarez Romero
eab4a503a0 cherry-ignore: anv: Refactor memory type setup 2017-06-01 10:09:44 +02:00
Juan A. Suarez Romero
c31e814a85 cherry-ignore: anv: Add valid_bufer_usage to the memory type metadata 2017-06-01 10:09:44 +02:00
Juan A. Suarez Romero
7a636d8ff1 cherry-ignore: radv: fix regression in descriptor set freeing 2017-06-01 10:09:44 +02:00
Juan A. Suarez Romero
b3e48a07c0 cherry-ignore: anv: Require vertex buffers to come from a 32-bit heap 2017-06-01 10:09:44 +02:00
Juan A. Suarez Romero
e391144853 cherry-ignore: anv: Advertise both 32-bit and 48-bit heaps when we have enough memory 2017-06-01 10:09:44 +02:00
Juan A. Suarez Romero
dbadd06632 cherry-ignore: anv: Make supports_48bit_addresses a heap property 2017-06-01 10:09:44 +02:00
Juan A. Suarez Romero
07867f72cf cherry-ignore: anv: Stop setting BO flags in bo_init_new 2017-06-01 10:09:44 +02:00
Juan A. Suarez Romero
9299466b83 cherry-ignore: anv: Determine the type of mapping based on type metadata 2017-06-01 10:09:43 +02:00
Juan A. Suarez Romero
103ec6e231 cherry-ignore: radeonsi: load patch_id for TES-as-ES when exporting for PS 2017-06-01 10:09:43 +02:00
Ian Romanick
f1d487f4f0 r100: Use _mesa_get_format_base_format in radeon_update_wrapper
The wrapper is for a renderbuffer around a texture.  Textures can have
formats (e.g., 3) that aren't valide for API generated renderbuffers.
_mesa_base_fbo_format will return 0, but _mesa_get_format_base_format
will return the base format of RGB.

Fixes a crashes in piglit tests fbo-alphatest-formats (all subtests
pass) and fbo-colormask-formats (some subtests pass, some fail).

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 303b47f253)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 10:09:43 +02:00
Ian Romanick
57b38cc077 r100,r200: Don't assume glVisual is non-NULL during context creation
Thanks to EGL_MESA_configless_context, the visual pointer can be NULL.

Fixes a segfault (or assertion failure) in piglit's
egl-configless-context test.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit c24881d39c)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 10:09:43 +02:00
Ian Romanick
ca8481c41c r100: Don't assume that the base mipmap of a texture exists
Fixes crashes in piglit's gl-1.2-texture-base-level.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 2dcec62075)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 10:09:43 +02:00
Tapani Pälli
5b81c0524b egl/android: fix segfault within swap_buffers
Function droid_swap_buffers may get called without dri2_surf->buffer set,
in these cases we don't have a back buffer set either. Patch fixes segfault
seen with 3DMark that uses android.opengl.GLSurfaceView for rendering it's UI.

backtrace:
   #00 pc 00013f88  /system/lib/egl/libGLES_mesa.so (droid_swap_buffers+104)
   #01 pc 000117b2  /system/lib/egl/libGLES_mesa.so (dri2_swap_buffers+50)
   #02 pc 000058b2  /system/lib/egl/libGLES_mesa.so (eglSwapBuffers+386)
   #03 pc 00011329  /system/lib/libEGL.so (eglSwapBuffersWithDamageKHR+553)
   #04 pc 000118e7  /system/lib/libEGL.so (eglSwapBuffers+55)
   #05 pc 000754dc  /system/lib/libandroid_runtime.so

Note, this is v1 as v2 caused dEQP regressions.

Fixes: 2acc69d ("EGL/Android: Add EGL_EXT_buffer_age extension")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f347bac30f)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 10:09:43 +02:00
Juan A. Suarez Romero
ed38bcedfb Revert "android: fix segfault within swap_buffers"
This reverts commit 4d4558411d.

See https://lists.freedesktop.org/archives/mesa-stable/2017-June/006408.html

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 10:09:43 +02:00
Nicolas Boichat
012c198bb7 configure.ac: Also match -androideabi tuple
On ARM Android platforms, the host_os tuple should be linux-androideabi,
so let's match both -android and -androideabi (or any other
-android* tuple) to determine if we should do an Android build.

Reviewed-by: Chad Versace <chadversary@chromium.org>
(cherry picked from commit f6ac3d0db6)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:10 +02:00
Nicolai Hähnle
1534330eba st/mesa: remove redundant stfb->iface checks
stfb->iface is always non-NULL for an st_framebuffer. These checks
were incorrect, relying on out-of-bounds memory access in the
surface-less case of EGL_KHR_surfaceless_context.

v2: remove redundant stread check (Marek)

Reviewed-by: Marek Olšák <marek@olsak@amd.com> (v2)
(cherry picked from commit 9d346af322)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:10 +02:00
Bartosz Tomczyk
580a2e6c15 mesa: Avoid leaking surface in st_renderbuffer_delete
v2: add comment in code

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100741
Fixes: a5e733c6b5 mesa: drop current draw/read buffer when ctx is released
Reviewed-by: Rob Clark <robdclark@gmail.com> (v1)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit fd6c2a3f3e)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-01 04:25:10 +02:00
Bas Nieuwenhuizen
ce2b96dd8b radv: Reserve space for descriptor and push constant user SGPR setting.
flush_compute_state doesn't reserve a large chunk, so these need their own reservation.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
(cherry picked from commit 18efb404cf)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

Conflicts:
	src/amd/vulkan/radv_cmd_buffer.c
2017-06-01 04:25:10 +02:00