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i965/blorp: Take a layer range in intel_hiz_exec

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Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
Jason Ekstrand 2017-06-05 11:46:22 -07:00
parent f9fd976e8a
commit 252b004a51
5 changed files with 16 additions and 18 deletions
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13
src/mesa/drivers/dri/i965/brw_blorp.c
View file

@ -1007,7 +1007,8 @@ gen6_blorp_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
*/
void
intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
unsigned int level, unsigned int layer, enum blorp_hiz_op op)
unsigned int level, unsigned int start_layer,
unsigned int num_layers, enum blorp_hiz_op op)
{
const char *opname = NULL;
@ -1026,12 +1027,14 @@ intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
break;
}
DBG("%s %s to mt %p level %d layer %d\n",
__func__, opname, mt, level, layer);
DBG("%s %s to mt %p level %d layers %d-%d\n",
__func__, opname, mt, level, start_layer, start_layer + num_layers - 1);
if (brw->gen >= 8) {
gen8_hiz_exec(brw, mt, level, layer, op);
for (unsigned a = 0; a < num_layers; a++)
gen8_hiz_exec(brw, mt, level, start_layer + a, op);
} else {
gen6_blorp_hiz_exec(brw, mt, level, layer, op);
for (unsigned a = 0; a < num_layers; a++)
gen6_blorp_hiz_exec(brw, mt, level, start_layer + a, op);
}
}

3
src/mesa/drivers/dri/i965/brw_blorp.h
View file

@ -70,7 +70,8 @@ brw_blorp_resolve_color(struct brw_context *brw,
void
intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
unsigned int level, unsigned int layer, enum blorp_hiz_op op);
unsigned int level, unsigned int start_layer,
unsigned int num_layers, enum blorp_hiz_op op);
void gen4_blorp_exec(struct blorp_batch *batch,
const struct blorp_params *params);

10
src/mesa/drivers/dri/i965/brw_clear.c
View file

@ -208,13 +208,11 @@ brw_fast_clear_depth(struct gl_context *ctx)
}
if (fb->MaxNumLayers > 0) {
for (unsigned layer = 0; layer < depth_irb->layer_count; layer++) {
intel_hiz_exec(brw, mt, depth_irb->mt_level,
depth_irb->mt_layer + layer,
BLORP_HIZ_OP_DEPTH_CLEAR);
}
intel_hiz_exec(brw, mt, depth_irb->mt_level,
depth_irb->mt_layer, depth_irb->layer_count,
BLORP_HIZ_OP_DEPTH_CLEAR);
} else {
intel_hiz_exec(brw, mt, depth_irb->mt_level, depth_irb->mt_layer,
intel_hiz_exec(brw, mt, depth_irb->mt_level, depth_irb->mt_layer, 1,
BLORP_HIZ_OP_DEPTH_CLEAR);
}

4
src/mesa/drivers/dri/i965/intel_mipmap_tree.c
View file

@ -1991,7 +1991,7 @@ intel_miptree_slice_resolve(struct brw_context *brw,
if (!item || item->need != need)
return false;
intel_hiz_exec(brw, mt, level, layer, need);
intel_hiz_exec(brw, mt, level, layer, 1, need);
intel_resolve_map_remove(item);
return true;
}
@ -2027,7 +2027,7 @@ intel_miptree_all_slices_resolve(struct brw_context *brw,
if (map->need != need)
continue;
intel_hiz_exec(brw, mt, map->level, map->layer, need);
intel_hiz_exec(brw, mt, map->level, map->layer, 1, need);
intel_resolve_map_remove(map);
did_resolve = true;
}

4
src/mesa/drivers/dri/i965/intel_mipmap_tree.h
View file

@ -1001,10 +1001,6 @@ intel_miptree_unmap(struct brw_context *brw,
unsigned int level,
unsigned int slice);
void
intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
unsigned int level, unsigned int layer, enum blorp_hiz_op op);
bool
intel_miptree_sample_with_hiz(struct brw_context *brw,
struct intel_mipmap_tree *mt);