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Author SHA1 Message Date
Samuel Pitoiset
89ea983df9 radv/meta: inline radv_copy_buffer() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33599>
 2025-02-19 10:30:36 +00:00
Samuel Pitoiset
0323ed1022 radv: use radv_copy_memory() for accel structure updates 
VK_KHR_acceleration_structure requires the BDA feature to be enabled
and this enables the global BO list.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33599>
 2025-02-19 10:30:36 +00:00
Samuel Pitoiset
a659771e68 radv/meta: use radv_copy_memory() for the FMASK copy 
The BOs are already added in radv_CmdCopyImage2KHR().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33599>
 2025-02-19 10:30:36 +00:00
Samuel Pitoiset
361a598b4c radv: use radv_CmdDispatchIndirect() in the accel struct path 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33599>
 2025-02-19 10:30:36 +00:00
Samuel Pitoiset
a03e391aa3 vulkan: constify vk_acceleration_structure_get_va() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33599>
 2025-02-19 10:30:36 +00:00
Konstantin Seurer
e93592dc62 lavapipe: Remove uniform inlining 
This broke with the descriptor rework and it will never work because
uniform buffers are bindless now.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
00e98d74b1 gallivm/nir/soa: Properly skip empty else branches 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
08b972781a gallivm/nir/soa: Skip bounds checking for in-bounds access 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
bd88edcf81 gallivm: Only guard tex/image ops if the exec mask can be zero 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
d9db40208d lavapipe: Lower push constants in NIR 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
a57e8b2e97 gallivm/nir/soa: Use divergence analysis 
Emitting scalar instructions reduces compile time.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
8225ad3c89 nir/divergence_analysis: Handle load_const_buf_base_addr_lvp 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
b5a3caf17c gallivm/nir/soa: Do not lower vectors to llvm arrays 
There are no dynamic swizzles so it is enough to apply them during
translation. This also gets rid of the extract/insertvalue spam.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
a576e7ca9c lavapipe: Optimize buffer robustness 
Annotating access that does not need bounds checking allows the backend
to omit bounds checking which results in code that compiles and runs
faster.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
c60b39d8ac nir: Do not emit amul if it is unsupported 
The driver woiuld have to run nir_opt_algebraic before instruction
selection.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
7905029629 nir: Rename in-bounds-agx to in-bounds 
This will be used by lavapipe for skipping bounds checking when
robustness is disabled.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
92083fc70d llvmpipe: Do not use coroutines when they are unnecessary 
Speeds up compilation and it should also run faster.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
28c594701e lavapipe: Initialize the compiler options of the noop fs 
Crashes divergence analysis.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
cc6e43c049 lavapipe: Lower descriptor sets in NIR 
This moves lowering vulkan resource indices out of gallivm into
lavapipe where it should be.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
66b3879618 lavapipe: Move nir passes to a new directory 
The number of lavapipe nir passes keeps growing so it's a good idea to
add some separation before it becomes a mess.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
2208379628 gallivm/nir/soa: Select more IO to gather/scatter intrinsics 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:11 +00:00
Konstantin Seurer
29a4886cc8 gallivm/nir/soa: Implement robusst uniform loads without controlflow 
Loading from a "zero" address instead speeds up compilation.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:10 +00:00
Konstantin Seurer
178e91956c gallivm/nir/soa: Lower bools to i1 
Lowering them to 32 bit integers increases compile time by a lot because
llvm will optimize them to i1.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:10 +00:00
Konstantin Seurer
ce0d8b7038 gallivm/nir/soa: Remove the dependency on lp_bld_nir.c 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:10 +00:00
Konstantin Seurer
e88190a09f gallivm/nir/aos: Remove the dependency on lp_bld_nir.c 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:10 +00:00
Konstantin Seurer
daad0f8a91 gallivm: Split nir prepasses into aos/soa 
The soa backend will work on very different looking NIR in the future.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32963>
 2025-02-19 09:54:10 +00:00
Samuel Pitoiset
efa23ef664 radv: fix adding the BO for unaligned SDMA copies to the cmdbuf list 
It shouldn't be only added at creation time.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33600>
 2025-02-19 07:29:27 +00:00
Guilherme Gallo
8af7f8b7fe ci: Remove cargo symlink workaround 
Symlinking $CARGO_HOME to /usr/local/bin made rustup uninstaller delete
the entire folder, causing mysterious build errors, so let's do the
traditional .cargo/env sourcing to make rustup available to the rest of
the build scripts.

Also make sure that required scripts run the shell's rcfile to be able
to setup the PATH correctly.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33519>
 2025-02-19 05:08:53 +00:00
Guilherme Gallo
a663f97d2d ci: Properly clean up rustup 
Use `rustup self uninstall -y` instead of manually removing folders to
ensure a proper cleanup of the rustup installation, including cargo and
init command injections in shell rc files.

Failing to do so can cause issues, such as bash failing to run in a `set
-e` environment due to a missing `$HOME/.cargo/env`, for example.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33519>
 2025-02-19 05:08:53 +00:00
Yiwei Zhang
e488b5e45e venus: support VK_KHR_global_priority 
as well as the prior versions promoted from.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33594>
 2025-02-19 04:06:58 +00:00
Yiwei Zhang
696ee859ef venus: support VK_KHR_map_memory2 
This is purely on the driver side.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33594>
 2025-02-19 04:06:58 +00:00
Yiwei Zhang
f69a0201da venus: support VK_EXT_pipeline_robustness 
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33594>
 2025-02-19 04:06:57 +00:00
Yiwei Zhang
e027f2afc1 venus: support VK_EXT_pipeline_protected_access 
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33594>
 2025-02-19 04:06:57 +00:00
Yiwei Zhang
ea8a396b91 venus: support VK_KHR_shader_float_controls2 
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33594>
 2025-02-19 04:06:56 +00:00
Yiwei Zhang
82408f81b4 venus: support VK_KHR_shader_subgroup_rotate 
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33594>
 2025-02-19 04:06:56 +00:00
Faith Ekstrand
eb27cbf25a nvk: Use suld.constant for EDB uniform texel buffers 
In 2183bc73a6 ("nvk: Use suld for EDB uniform texel buffers"), we
started using suld instead of tld for EDB uniform texel buffers because
we needed it for correctness.  However, it's slow as mud.  Using
suld.constant seems to fix the performance regression.  I don't know if
it's quite tld performance, but it's close.

Backport-to: 25.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33612>
 2025-02-18 19:53:52 -06:00
Faith Ekstrand
ffdc0d8e98 nak: Use suld.constant when ACCESS_CAN_REORDER is set 
This is way faster than suld.sys, which is what we're using today.  So
far I haven't seen it matter for anything but texel buffers but it
likely helps some app somewhere.

Backport-to: 25.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33612>
 2025-02-18 19:47:00 -06:00
Faith Ekstrand
5762586c6d nvk: Align UBO/SSBO addresses down rather than up 
This should never happen as the client should always give us aligned
addresses.  However, in the off chance that it does, aligning down is
probably safer than aligning up as it won't cause the top end of the
range increase and potentially fault.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33610>
 2025-02-19 00:20:43 +00:00
Faith Ekstrand
2183bc73a6 nvk: Use suld for EDB uniform texel buffers 
The tricks we play for texel buffers with VK_EXT_descriptor_buffer don't
work with tld with very large buffers.  suld, on the other hand, doesn't
seem to have these limitations.

Fixes: 3b94c5c22a ("nvk: Lower descriptors for VK_EXT_descriptor_buffer buffer views")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33610>
 2025-02-19 00:20:43 +00:00
Faith Ekstrand
1c7a4c4f38 nak: Handle sparse texops with unused color destinations 
Fixes: b17f139281 ("nak: Wire up sparse residency for texture ops")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33610>
 2025-02-19 00:20:43 +00:00
Faith Ekstrand
0ec760af66 nvk: Allow sparse loads on EDB buffers 
Fixes: 3b94c5c22a ("nvk: Lower descriptors for VK_EXT_descriptor_buffer buffer views")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33610>
 2025-02-19 00:20:43 +00:00
Faith Ekstrand
ca06a57702 nvk: Handle shader==NULL in nvk_cmd_upload_qmd() 
We can theoretically hit this if CmdProcessGeneratedCommandsEXT is
called with a state command buffer that doesn't have compute shader set
if execute commands bind a shader.  We do, however, need to still call
nvk_cmd_upload_qmd() because it also uploads push constants and we need
those regardless of whether or not there's a shader bound.

Fixes: 976f22a5da ("nvk: Implement CmdProcess/ExecuteGeneratedCommandsEXT")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33610>
 2025-02-19 00:20:43 +00:00
Faith Ekstrand
39ae06e153 nvk: Pull shaders from the state command buffer in nvk_cmd_process_cmds() 
Found by the VKD3D test suite.

Fixes: 976f22a5da ("nvk: Implement CmdProcess/ExecuteGeneratedCommandsEXT")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33610>
 2025-02-19 00:20:43 +00:00
Paulo Zanoni
55bdae03cc brw: don't always set cond_modifier on parsed assembly instructions 
For the instructions we parse with brw_gram.y, don't unconditionally
call brw_eu_inst_set_cond_modifier(). Do it like we do in
brw_generator::generate_code() and only call it if we have a
cond_modifier to set.

Why? Because for ONE_SRC instructions, CondCtrl (bits 95:92) only
exists if Src.IsImm is false. If Src.Imm is true, then bits 95:64 are
actually Src0.ImmValue[63:32]. If we unconditionally call
brw_eu_inst_set_cond_modifier(), we'll end up zeroing bits 95:92 for
ONE_SRC instructions with 64bit immediates. See BSpec page
Structure_EU_INSTRUCTION_BASIC_ONE_SRC (56880).

This issue can be reproduced with src/intel/executor if you try to
have the following instruction:

    mov(16)         g10<1>Q          0xfedcba9876543210:Q             { align1 WE_all 1H };

our parser will end up zeroing the top bits, so the value of the
immediate will be 0x0edcba9876543210.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33559>
 2025-02-18 23:44:32 +00:00
lcagustini
fb51252953 panvk: Advertise support for VK_EXT_border_color_swizzle 
Advertise support for border color swizzle as we support it just fine
Passes all dEQP-VK*border_swizzle*

v2: Added feature to features.txt and vk_features struct

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33232>
 2025-02-18 22:13:44 +00:00
Georg Lehmann
56aac9fdec nir/opt_algebraic: optimize ffract(ffract(a)) 
Foz-DB Navi21:
Totals from 163 (0.21% of 79377) affected shaders:
Instrs: 233933 -> 233685 (-0.11%)
CodeSize: 1252492 -> 1251500 (-0.08%); split: -0.08%, +0.00%
Latency: 1227625 -> 1227405 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 266954 -> 266668 (-0.11%)
VClause: 4193 -> 4191 (-0.05%)
Copies: 20935 -> 20932 (-0.01%); split: -0.02%, +0.01%
PreSGPRs: 10395 -> 10391 (-0.04%)
VALU: 163725 -> 163475 (-0.15%)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33557>
 2025-02-18 20:38:57 +00:00
Georg Lehmann
317d07484e nir: improve fsqrt range analysis 
Foz-DB Navi21:
Totals from 3 (0.00% of 79377) affected shaders:
MaxWaves: 88 -> 96 (+9.09%)
Instrs: 1058 -> 951 (-10.11%)
CodeSize: 5964 -> 5368 (-9.99%)
VGPRs: 104 -> 96 (-7.69%)
Latency: 15283 -> 14099 (-7.75%); split: -8.37%, +0.62%
InvThroughput: 4951 -> 4238 (-14.40%)
Copies: 81 -> 76 (-6.17%)
PreVGPRs: 93 -> 84 (-9.68%)
VALU: 820 -> 737 (-10.12%)
SALU: 115 -> 91 (-20.87%)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33557>
 2025-02-18 20:38:57 +00:00
Georg Lehmann
81b4629636 nir: fix frsq range analysis 
Foz-DB Navi21:
Totals from 98 (0.12% of 79377) affected shaders:
Instrs: 157311 -> 157675 (+0.23%); split: -0.03%, +0.26%
CodeSize: 844296 -> 846648 (+0.28%); split: -0.00%, +0.28%
Latency: 1275467 -> 1276259 (+0.06%); split: -0.00%, +0.06%
InvThroughput: 266980 -> 267098 (+0.04%); split: -0.03%, +0.07%
Copies: 11094 -> 11093 (-0.01%)
PreVGPRs: 5945 -> 5977 (+0.54%)
VALU: 110585 -> 110953 (+0.33%); split: -0.04%, +0.38%
SALU: 18481 -> 18476 (-0.03%)

Cc: mesa-stable

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33557>
 2025-02-18 20:38:56 +00:00
Georg Lehmann
25300ac18a nir: fix range analysis for frcp 
Foz-DB Navi21:
Totals from 448 (0.56% of 79377) affected shaders:
Instrs: 669306 -> 669318 (+0.00%); split: -0.00%, +0.00%
CodeSize: 3736580 -> 3738840 (+0.06%); split: -0.00%, +0.06%
Latency: 5860916 -> 5860961 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 1344094 -> 1344135 (+0.00%); split: -0.00%, +0.00%
VClause: 13878 -> 13879 (+0.01%)
Copies: 58538 -> 58532 (-0.01%)
VALU: 479807 -> 479820 (+0.00%); split: -0.00%, +0.00%

Cc: mesa-stable

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33557>
 2025-02-18 20:38:56 +00:00
Georg Lehmann
1f3494b886 nir: range analysis for ffract 
Foz-DB Navi21:
Totals from 75 (0.09% of 79377) affected shaders:
Instrs: 69239 -> 68383 (-1.24%)
CodeSize: 385088 -> 379532 (-1.44%)
Latency: 427188 -> 421729 (-1.28%); split: -1.28%, +0.00%
InvThroughput: 103086 -> 101926 (-1.13%)
VClause: 785 -> 753 (-4.08%)
SClause: 1624 -> 1598 (-1.60%)
Copies: 5679 -> 5671 (-0.14%); split: -0.72%, +0.58%
PreSGPRs: 3961 -> 3937 (-0.61%)
VALU: 51107 -> 50457 (-1.27%)
SALU: 9034 -> 8950 (-0.93%)
VMEM: 1123 -> 1091 (-2.85%)
SMEM: 2862 -> 2830 (-1.12%)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33557>
 2025-02-18 20:38:56 +00:00