Commit graph

125167 commits

Author SHA1 Message Date
Rhys Perry
897a47d847 aco: fix edge check with sub-dword temporaries
Fixes RA failure for a parallel-rdp shader on pitcairn.

fossil-db (Navi):
Totals from 2 (0.00% of 128733) affected shaders:
CodeSize: 203656 -> 205724 (+1.02%)
Instrs: 32267 -> 32529 (+0.81%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5544>
2020-06-18 17:29:33 +00:00
Erik Faye-Lund
747e808697 mesa/main: fix inverted condition
I accidentally got one of the conditions wrong here. Sorry for the
mixup.

See ttps://gitlab.freedesktop.org/mesa/mesa/-/issues/3134 for details.

Fixes: b112e62ba4 ("mesa/main: do not allow MESA_ycbcr_texture enums on gles")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5532>
2020-06-18 17:07:14 +00:00
Karol Herbst
4bc5110eea nv50/ir/nir: remove image uniform hack
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>
2020-06-18 15:15:17 +00:00
Karol Herbst
c0bbca5c23 nv50/ir/nir: handle image atomic inc and dec
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>
2020-06-18 15:15:17 +00:00
Karol Herbst
3af27bb7de nv50/ir/nir: move away from image_deref intrinsics
v2: fix lod source of image operation correctly

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>
2020-06-18 15:15:17 +00:00
Karol Herbst
feb83f2f82 nir/lower_images: handle dec and inc
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>
2020-06-18 15:15:17 +00:00
Karol Herbst
43faa9ebb1 nir/lower_images: fix for array of arrays
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>
2020-06-18 15:15:17 +00:00
Karol Herbst
e35e0307cb st/mesa: lower images when needed
The "st/pbo download FS" builtin shader uses image derefs, so even with
PIPE_CAP_NIR_IMAGES_AS_DEREF set to 0 drivers ended up with those.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>
2020-06-18 15:15:17 +00:00
Rhys Perry
365d0aa6c5 aco: shrink mad_info
From 24 bytes to 16 bytes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5281>
2020-06-18 14:26:01 +00:00
Rhys Perry
917260710f aco: make ssa_info::label 64-bit
We'll probably need these extra bits in the future.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5281>
2020-06-18 14:26:01 +00:00
Rhys Perry
47ca84a96d aco: shrink ssa_info
Reorder members so that it's 16 bytes instead of 24.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5281>
2020-06-18 14:26:01 +00:00
Boyuan Zhang
19983d3d4a radeon/vcn: bump vcn3.0 encode major version to 1
And add quality params for this version

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
2020-06-18 09:58:04 -04:00
Boyuan Zhang
2be131f538 radeon/vcn/enc: Re-write PPS encoding for HEVC
Due to hardware change on VCN3

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
2020-06-18 09:58:03 -04:00
Thong Thai
9d5d4f9eaa radeon/vcn: add vcn 3.0 encode support
Signed-off-by: Thong Thai <thong.thai@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
2020-06-18 09:58:03 -04:00
Leo Liu
946c5c6b75 radeon/vcn/dec: add db_aligned_height to message buffer
This is required for Sienna

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
2020-06-18 09:58:03 -04:00
Leo Liu
384195b041 radeon/vcn: add Sienna to use internal register offset
And re-group them explicitly

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
2020-06-18 09:58:03 -04:00
Leo Liu
909037b557 radeon/vcn: reset the decode flags from message buffer
This flag was never used by VCN previously, and now
it's used for feature that is not applied to us.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>
2020-06-18 09:58:03 -04:00
Daniel Schürmann
3817fa7a4d aco: fix WQM handling in nested loops
If on a nested loop
- the outer loop needs WQM but
- the inner loop doesn't need WQM and
- the break condition of the inner loop is computed in the outer loop
then it could happen that we transitioned to Exact before entering the inner loop
which could create an empty exec mask and lead to an infinite loop.

Fixes a GPU hang with RDR2

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5518>
2020-06-18 13:40:15 +00:00
Danylo Piliaiev
8ce8895b69 st/mesa: account for "loose", per-mipmap level textures in CopyImageSubData
We may have "loose", per-image gallium resources. The src_image->Level
may not match the gallium resource texture level. In such case it is
prescribed (in st_AllocTextureImageBuffer) to specify mipmap level
as zero.

Fixes: f04f13622f
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5477>
2020-06-18 11:44:14 +00:00
Gurchetan Singh
9760a7ed91 virgl: apply bgra dest swizzle and add Portal 2
Apply the destination swizzle on GLES games based on HL2 engine.
Also add Portal 2 since some people are experiencing issues with
that.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5481>
2020-06-18 10:35:52 +00:00
Jonathan Marek
c95b250a4c turnip: set the API version
Some CTS tests don't run because of this.

Fixes: 91c757b796 ("turnip: use the common code for generating extensions and dispatch tables")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5522>
2020-06-18 09:54:48 +00:00
Samuel Pitoiset
fa149b996d radv: only requires LLVM 9 for GFX10 if not using ACO
In case someone links RADV with LLVM 8 and wants to use ACO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5454>
2020-06-18 09:45:20 +00:00
Neil Armstrong
4cf4fe9d82 Revert "CI: Disable Panfrost Mali-T820 jobs"
This reverts commit 46a32f0b6b.

The lab has recovered health, thus re-enable T820 Panfrost jobs.

Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4727>
2020-06-18 09:28:38 +00:00
Neil Armstrong
4793c2bcb9 Revert "CI: Disable Lima jobs due to lab unhealthiness"
This reverts commit adeef43d15.

The lab has recovered health, thus re-enable Lima jobs.

Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4727>
2020-06-18 09:28:38 +00:00
Samuel Pitoiset
70cc80805c radv: compute CB_SHADER_MASK from the fragment shader outputs
The fragment shader doesn't necessarily output the number of components
expected by the target format.

Fixes new dEQP-VK.draw.output_location.*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5427>
2020-06-18 09:16:04 +00:00
Samuel Pitoiset
b848d88059 radv: make sure to set CB_SHADER_MASK correctly for internal CB operations
It should be always set to 0xf.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5427>
2020-06-18 09:16:04 +00:00
Erik Faye-Lund
270eeb4105 docs/features: remove driver-list for forward-compatible context
This is something that's supported by the Gallium state-tracker, there's
nothing to be done per driver here.
2020-06-18 11:04:54 +02:00
Erik Faye-Lund
eab3cabb9d docs/features: update ARB_texture_buffer_object line
This extension isn't just exposed in OpenGL 3.1 contexts any longer, and
Zink supports it. Let's mark it as such.
2020-06-18 11:04:54 +02:00
Erik Faye-Lund
2a6a21ceb3 docs/features: mark GL3 as complete for zink 2020-06-18 11:04:54 +02:00
Samuel Pitoiset
c4aa64b4c3 radv: lower discards to demote to workaround a RDR2 game bug
This fixes some sort of LOD issue.

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5525>
2020-06-18 08:39:28 +02:00
Rob Clark
34499de5b3 glsl_to_nir: fix vote_any/vote_all
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5505>
2020-06-18 03:40:54 +00:00
Rob Clark
c9976f5e4a glsl_to_nir: fix shader_clock
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5505>
2020-06-18 03:40:54 +00:00
Rob Clark
8505e6757b glsl_to_nir: fix is_helper_invocation
Reported-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5505>
2020-06-18 03:40:54 +00:00
Rob Clark
f94ba1555d spirv: drop some dead code
This case is never hit, we don't have a nir intrinsic for this spirv
opcode.  And when we do, I'm not sure if it would be vectorized or not.
So best just to drop this case.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5505>
2020-06-18 03:40:54 +00:00
Rob Clark
f43a2cd1d9 spirv: atomic_counter_read_deref is not vectorized
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3141
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5505>
2020-06-18 03:40:54 +00:00
Jonathan Marek
0a84d22bf2 turnip: fix renderpass gmem configs when there are too many attachments
Since a value of at least "align" is used for nblocks, we might end up
with nblocks greater than the number of GMEM blocks remaining. Check for
this case and bail out, sysmem rendering will be used for such cases.

Fixes some of these tests:
dEQP-VK.pipeline.render_to_image.core.*.huge.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5499>
2020-06-18 03:15:27 +00:00
Jonathan Marek
b6b98e9510 turnip: fix a sample shading case
Check pipeline's sampleShadingEnable to enable sample shading.

Also fix behavior of gl_Fragcoord with sample shading.

Fixes at least:
dEQP-VK.pipeline.multisample.min_sample_shading.min_0_5.samples_4.primitive_triangle

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5499>
2020-06-18 03:15:27 +00:00
Jonathan Marek
ff2efd095e turnip: fix a crash when rasterizerDiscardEnable is set
pMultisampleState needs to be ignored when rasterizerDiscardEnable, so the
current code can crash when trying to load msaa_info->pNext.

At the same time this simplifies tu_pipeline_shader_key_init a bit, by not
calling it for the compute shader case (which doesn't need to set anything
in the key struct).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5499>
2020-06-18 03:15:26 +00:00
Eric Engestrom
31a66cbe5d docs: remind release maintainers to sign the tarballs and publish their key
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2857>
2020-06-18 03:13:47 +00:00
Eric Engestrom
c75e46f6d6 docs: publish our release maintainers' keys
They should be published to various key servers as well, but this
provides the authoritative source for their list.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2140
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2857>
2020-06-18 03:13:47 +00:00
Rob Clark
1d54fb5b2b freedreno/ir3: update obsolete comment
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
5baf430261 freedreno/computerator: MERGEDREGS update
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
0e0d4daa5b turnip: set .MERGEDREGS based on variant
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
c6632c087d freedreno/a6xx: set .MERGEREGS based on variant
Also set HALFREGFOOTPRINT, since in the non-mergeregs case this will be
non-zero.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
1cc4cf141a freedreno/ir3: make mergedregs a property of the variant
Rather than assuming a6xx+ means mergedregs.  We can actually (mostly?)
do splitregs on a6xx as well.  And GS/DS/HS currently require it, which
might be papering over a bug, or might be something to do with how
chaining shaders works.  At any rate, we should at least be consistent,
and not have the compiler thinking we are doing mergedregs when we are
actually doing splitregs.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
c052087038 freedreno/ir3: re-work assembler API
Just pass thru the variant, since it has everything we need.  And
will be needed in the next patch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
ffe62e1b6c freedreno/ir3: pass variant to postsched
Prep for the next patch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
38df3f899d freedreno/ir3: decouple regset from gpu gen
Allow different regset's to coexist, so we can make mergedregs vs split
reg file a variant property.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
47decc88c2 freedreno/ir3: move mergedreg state out of reg
It is only needed one place, let's move it there.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00
Rob Clark
46cdcf590b freedreno/ir3: convert regmask_t to struct
Prep to make merged/split register file mode a property of the regmask,
rather than the ir3_register.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>
2020-06-18 02:46:28 +00:00