Commit graph

582 commits

Author SHA1 Message Date
Dave Airlie
c2f2252037 anv: fix writemask on blit fragment shader.
I'm not sure if anything even uses this, but I found this on radv, so
just fix it on anv for consistency.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-08-16 10:29:44 +10:00
Emil Velikov
6b4b2a4dd6 anv: add genX_multisample.h to the sources list(s).
Otherwise it won't end up in the release tarball.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-08-15 19:00:29 +01:00
Kevin Strasser
71258e9462 anv/x11: Add support for Xlib platform
Some applications continue to use the Xlib client library and expect that
VK_KHR_xlib_surface will be available in the driver. Service these
applications by converting the Display pointer to xcb_connection_t and use
the existing xcb code in the driver.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-08-15 09:47:06 -07:00
Lionel Landwerlin
0294dd00cc anv: pipeline: gen7: fix assert in debug mode
SampleMask is only 8bits long on gen7.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97278

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-08-12 17:03:48 -07:00
Anuj Phogat
0bf531aee6 anv/device: Add limits for InterpolationOffset
Fixes the vulkan cts regression in test dEQP-VK.api.info.device.properties

Cc: Mark Janes <mark.a.janes@intel.com>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-08-12 10:45:02 -07:00
Anuj Phogat
1fe36d849c anv: Use macro to avoid code duplication for sample positions
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-08-12 10:45:02 -07:00
Anuj Phogat
c4cd0e8ecd anv/device: Enable sample shading on gen7+
Passes all 30 min_sample_shading tests in vulkan cts.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-08-09 14:45:25 -07:00
Anuj Phogat
f16295a198 anv/gen7_pipeline: Set multisample state using shared function
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-08-09 14:45:25 -07:00
Anuj Phogat
2ef5063ad7 anv/pipeline: Add sample locations for gen7-7.5
V1: Add multisample positions (Nanley)
V2: Fix 8x sample positions to match OpenGL (Anuj)
V3: Vulkan has standard sample locations. They need not be same as
    in OpenGL. (Anuj)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-08-09 14:45:25 -07:00
Anuj Phogat
dc49dd7f10 anv/pipeline: Move emit_ms_state() to genX_pipeline_util.h
This will help sharing multisample state setting code.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-08-09 14:45:25 -07:00
Lionel Landwerlin
8cde4ddbce anv/pipeline/gen7: Set multisample modes
Fixes the following failures :

dEQP-VK.api.copy_and_blit.resolve_image.whole_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.whole_8_bit
dEQP-VK.api.copy_and_blit.resolve_image.partial_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.partial_8_bit
dEQP-VK.api.copy_and_blit.resolve_image.with_regions_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.with_regions_8_bit

Tested on IVB/HSW

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-08-08 14:44:25 -07:00
Lionel Landwerlin
a3c472a2ec anv/pipeline: rename info to rs_info in emit_rs_state
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-08-08 14:44:25 -07:00
Jason Ekstrand
52fcc40760 anv/pipeline/gen7: Set the depth format in 3DSTATE_SF
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-08-08 11:13:46 -07:00
Jason Ekstrand
21d5c1be6a isl: Add a helper for getting a depth format from an isl_format
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-08-08 11:13:44 -07:00
Jason Ekstrand
ce980541d5 anv/pipeline: Unify 3DSTATE_RASTER and 3DSTATE_SF setup between gen7 and gen8
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-08-08 11:13:41 -07:00
Jason Ekstrand
960e8a1260 anv/pipeline/gen8: Set 3DSTATE_SF::StatisticsEnable
We've been setting it in gen7 forever but never in gen8; best to make it
consistent.  This hasn't caused any problems yet because we don't advertise
support for statistics queries yet.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-08-08 11:13:36 -07:00
Jason Ekstrand
12e653adec anv/pipeline/gen8: Unconditionally set DXMultisampleRasterizaitonEnable
The multisample rasterization mode is computed based on this field,
3DSTATE_RASTER::DXMultisampleRasterizationMode (only for forced
multisampling), 3DSTATE_RASTER::APIMode, and the number of samples.  There
are two tables in the SKL PRM that describe how the final multisample mode
is calculated: "Windower (WM) Stage >> Multisampling >> Multisample
ModeState >> Table 1" and the formula for "SF_INT::Multisample
Rasterization Mode".

The "DX Multisample Rasterization Enable" bit changes whether multisample
mode is set to OFF_PIXEL or ON_PATTERN in the samples > 1 case.  In the
samples == 1 case, the bit has no effect.  Since Vulkan has no concept of
disabling multisampling for samples > 1, we can just set the bit.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-08-08 11:13:33 -07:00
Jason Ekstrand
1df511b6f0 anv/pipeline/gen8: Use fewer designated initializers in emit_rs_state
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-08-08 11:13:31 -07:00
Jason Ekstrand
6136fb8687 genxml: Make 3DSTATE_SF more consistent between gen7 and gen8+
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-08-08 11:13:28 -07:00
Jason Ekstrand
2d76dcae71 anv/pipeline/gen8: Remove an old comment
This is now handled in emit_3dstate_clip

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-08-08 11:13:04 -07:00
Nanley Chery
c495c18b24 anv/gen7_pipeline: Set PixelShaderKillPixel for discards
According to the IVB PRM Vol2 P1, this bit must be set if a pixel shader
contains a discard instruction.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97207
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-08-05 09:53:52 -07:00
Kenneth Graunke
b5661c1d70 anv: Perform rasterizer discard in the SOL stage instead of the clipper.
See commit b0629e6894, where we discovered
that the SOL stage's "Rendering Disable" feature is a lot faster at
throwing away all geometry than the clipper's "reject all" mode.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-30 12:06:37 -07:00
Anuj Phogat
6d958c7c16 anv: Enable per sample shading on gen8+
Vulkan CTS test results on gen9:
./deqp-vk --deqp-case=dEQP-VK.pipeline.multisample.min_sample_shading*
Test run totals:
  Passed:        60/90 (66.7%)
  Failed:        0/90 (0.0%)
  Not supported: 30/90 (33.3%)
  Warnings:      0/90 (0.0%)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-28 13:11:12 -07:00
Anuj Phogat
0f94cdc976 anv/pipeline: Fix setting per sample shading in pixel shader
We should use the persample_dispatch variable in prog_data.

Fixes all (~60) the DEQP sample shading tests. Many tests exited with
VK_ERROR_OUT_OF_DEVICE_MEMORY without this patch.

V2: Use the shader key bits set in brw_compile_fs (Jason)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-28 13:11:12 -07:00
Jason Ekstrand
b33bccb519 anv/pipeline: Set up point coord enables
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-07-22 16:48:54 -07:00
Jason Ekstrand
c8da91aa24 anv/image: Assert that the image format is actually supported
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-dev@lists.freedesktop.org>
2016-07-22 16:48:54 -07:00
Jason Ekstrand
3c0077a6ec anv/pipeline: Set binding_table.gather_texture_start
This should get texture gather working on gen8+ and mostly working on gen7.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-dev@lists.freedesktop.org>
2016-07-22 16:27:35 -07:00
Kenneth Graunke
e614062e54 anv: Properly call gen75_emit_state_base_address on Haswell.
This should fix MOCS values.  Caught by Coverity.

CID: 1364155

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-20 10:59:44 -07:00
Kenneth Graunke
87660579f5 genxml: Rename "API Rendering Disable" to "Rendering Disable".
Gen7/7.5 call it "Rendering Disable" while Gen8/9 prefix it with "API".

Pick one for consistency, and so we can share code between generations.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-20 10:59:44 -07:00
Kenneth Graunke
bfd9942cdc anv: Unify 3DSTATE_CLIP code across generations.
The bulk of this is the same.  There are just a couple fields that only
exist on one generation or another, and we can easily handle those with
an #ifdef.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-20 10:59:44 -07:00
Kenneth Graunke
44502afd82 anv: Enable early culling on Gen7.
We set the cull mode, but forgot the enable bit.  Gen8 uses this.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-20 10:59:44 -07:00
Kenneth Graunke
0d77f08042 anv: Fix near plane clipping on Gen7/7.5.
The Gen7/7.5 clip code used APIMODE_OGL, while the Gen8+ clip code used
APIMODE_D3D.  The meaning hasn't changed, so one of these must be wrong.

It appears that the hardware documentation is completely wrong.  It
claims that the "API Mode" bit means:

   0h    APIMODE_OGL    NEAR_VP boundary == 0.0 (NDC)
   1h    APIMODE_D3D    NEAR_VP boundary == -1.0 (NDC)

However, DirectX typically uses 0.0 for the near plane, while unextended
OpenGL uses -1.0.  i965's gen6_clip_state.c uses APIMODE_D3D for the
GL_ZERO_TO_ONE case, so I believe the meanings are backwards from what
the documentation says.

Section 23.2 ("Primitive Clipping") of the Vulkan 1.0.21 specification
contains the following equations:

   -w_c <= x_c <= w_c
   -w_c <= y_c <= w_c
      0 <= z_c <= w_c

This means that Vulkan follows D3D semantics.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-20 10:59:44 -07:00
Kenneth Graunke
6b67270262 genxml: Add APIMODE_D3D missing enum values and improve consistency.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-20 10:59:44 -07:00
Kenneth Graunke
c31cf532af genxml: Add CLIPMODE_* prefix to 3DSTATE_CLIP's "Clip Mode" enum values.
Gen6-7.5 use CLIPMODE_REJECT_ALL, while Gen8+ just used REJECT_ALL.
Being consistent will let me unify code, and I prefer having the prefix.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-20 10:59:44 -07:00
Kenneth Graunke
ac1181ffbe compiler: Rename INTERP_QUALIFIER_* to INTERP_MODE_*.
Likewise, rename the enum type to glsl_interp_mode.

Beyond the GLSL front-end, talking about "interpolation modes" seems
more natural than "interpolation qualifiers" - in the IR, we're removed
from how exactly the source language specifies how to interpolate an
input.  Also, SPIR-V calls these "decorations" rather than "qualifiers".

Generated by:
$ find . -regextype egrep -regex '.*\.(c|cpp|h)' -type f -exec sed -i \
  -e 's/INTERP_QUALIFIER_/INTERP_MODE_/g' \
  -e 's/glsl_interp_qualifier/glsl_interp_mode/g' {} \;

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Dave Airlie <airlied@redhat.com>
2016-07-17 19:26:48 -07:00
Jason Ekstrand
4f282ff67e isl/state: Add support for OffsetX/Y in surface state
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-15 15:53:48 -07:00
Jason Ekstrand
f8984b918a isl: Add support for filling out surface states all the way back to gen4
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-15 15:53:48 -07:00
Jason Ekstrand
815847e2b3 isl: Add an ISL_DEV_IS_G4X macro
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-15 15:53:48 -07:00
Jason Ekstrand
27883f8cbc genxml: Add macros and #includes for gens 4-6
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-15 15:53:48 -07:00
Jason Ekstrand
ba798ac6b1 genxml: Make X/Y Offset field of SURFACE_STATE a uint
THe offset type has special implications that it's intended to be some form
of aligned memory address.  These assumptions allow it to handle the case
where there is some alignment requirement on the offset and the bottom bits
are used for other things.  However, the offsets in the surface state field
are really just unsigned integers.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-15 15:53:48 -07:00
Jason Ekstrand
9a999ceab8 genxml: Add enough XML for gens 4, 4.5, and 5 to get SURFACE_STATE
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Chad Versace <chad.versace@intel.com>
2016-07-15 15:53:47 -07:00
Jason Ekstrand
0f6eb5dea0 isl/state: Divide the aux qpitch by 4
The field is in multiples of 4 like regular QPitch.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-15 15:53:47 -07:00
Jason Ekstrand
2c6ca658e7 isl: Fix the bs assertion in isl_tiling_get_info
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-15 15:53:47 -07:00
Jason Ekstrand
593731ea3c anv: Handle VK_WHOLE_SIZE properly for buffer views
The old calculation, which used view->offset, encorporated buffer->offset
into the size calculation where it doesn't belong.  This meant that, if
buffer->offset > buffer->size, you would always get a negative size.  This
fixes 170 dEQP-VK.renderpass.attachment.* Vulkan CTS tests on Haswell.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-07-15 15:48:21 -07:00
Jason Ekstrand
827405f072 anv: Add an align_down_npot_u32 helper
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-07-15 15:48:21 -07:00
Jason Ekstrand
f124f4a394 anv: Enable independentBlend on gen7
We can totally do it, we were just only setting up one BLEND_STATE and, now
that the code is unified with gen8, we should be handling it correctly.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-07-15 15:48:21 -07:00
Jason Ekstrand
a2e7b2e653 anv/pipeline: Unify blend state setup between gen7 and gen8
This fixes all 674 broken dEQP-VK.pipeline.blend Vulkan CTS tests on
Haswell.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-07-15 15:48:21 -07:00
Jason Ekstrand
aaa202ebe7 genxml: Make gen6-7 blending look more like gen8
This renames BLEND_STATE to BLEND_STATE_ENTRY and adds an new struct
BLEND_STATE which is just an array of 8 BLEND_STATE_ENTRYs.  This will make
it much easier to write gen-agnostic blend handling code.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-07-15 15:48:21 -07:00
Nanley Chery
1fc739d28e Revert "isl: Don't filter tiling flags if a specific tiling bit is set"
This reverts commit 091f1da902 .

Although a user may specify a specfic tiling bit, ISL should still
prevent incompatible tiling/surface combinations.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-15 10:35:40 -07:00
Nanley Chery
e179fee049 anv/blit2d: Copy with stencil sources when needed
In the next patch, ISL will unconditionally perform verification of a
surface's tiling and usage. Since it will require that w-tiled images
be stencil buffers, create a stencil surface to copy from a
w-tiled/stencil surface.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-15 10:35:40 -07:00