Commit graph

71970 commits

Author SHA1 Message Date
Karol Herbst
810dca450c rusticl/kernel: fix clGetKernelSuggestedLocalWorkSizeKHR implementation
There were two issues:
1. The global_work_offset parameter is optional but we errored on NULL
2. We didn't return the reqd_work_group_size when set on the kernel.

Fixes: 376d1e6667 ("rusticl: implement cl_khr_suggested_local_work_size")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38375>
2025-11-18 15:42:43 +00:00
David Rosca
2587a565d8 radeonsi/vcn: Remove unnecessary vars for AV1 encode
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These are just copied from picture desc.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38260>
2025-11-18 09:28:13 +00:00
David Rosca
698de5360c radeonsi/vcn: Cleanup AV1 screen content tools coding
There is no disable_screen_content_tools in AV1 spec, instead this
should be seq_choose_screen_content_tools. But we don't need that either
as we keep the effective value in force_screen_content_tools.
Same for seq_choose_integer_mv and force_integer_mv.
Also stop overriding these values and instead fix frame header coding
to work with all combinations.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38260>
2025-11-18 09:28:13 +00:00
David Rosca
6050bda231 radeonsi/uvd_enc: Cleanup HEVC encode deblock params handling
This should consider values from PPS and overrides from slice header
if enabled.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38260>
2025-11-18 09:28:13 +00:00
David Rosca
153ff5dd8a radeonsi/vcn: Cleanup HEVC encode deblock params handling
This should consider values from PPS and overrides from slice header
if enabled.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38260>
2025-11-18 09:28:13 +00:00
David Rosca
10e274af62 radeonsi/video: Make helper radeon_bitstream functions static
Those are now only used in radeon_bitstream.c

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38260>
2025-11-18 09:28:12 +00:00
David Rosca
094e20f134 radeonsi/vcn: Use radeon_bitstream functions to code headers
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38260>
2025-11-18 09:28:12 +00:00
David Rosca
628694c16c radeonsi/vce: Use radeon_bitstream functions to code headers
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38260>
2025-11-18 09:28:12 +00:00
David Rosca
332ec608ad radeonsi/uvd_enc: Use radeon_bitstream functions to code headers
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38260>
2025-11-18 09:28:12 +00:00
David Rosca
1f51401dae radeonsi/video: Add VPS/SPS/PPS and sequence header functions to radeon_bitstream
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38260>
2025-11-18 09:28:12 +00:00
David Rosca
c5f898edb4 frontends/va: Add AV1 encode high_bitdepth flag
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38260>
2025-11-18 09:28:12 +00:00
Dave Airlie
26eaba935d nir: add a cmat call instruction type.
This adds a new instruction type to handle cooperative matrix calls.

This clones the call instr, drops callee, and adds a single metadata
slot and a call operation (dummy only for now).

(Not NACKed by Alyssa)

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38389>
2025-11-17 23:33:58 +00:00
Christian Gmeiner
6ba0797a06 etnaviv: Improve flatshading
If the shader has flat varyings but API level flatshade is disabled, we
need to switch to flat shading in PA.CONFIG to ensure proper interpolation.

Passes dEQP-GLES3.functional.rasterization.flatshading.* on GC7000.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Tested-by: Daniel Lang <dalang@gmx.at>
Reviewed-by: Daniel Lang <dalang@gmx.at>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36404>
2025-11-17 23:18:49 +00:00
Aitor Camacho
a77e09eaeb util: Introduce HAVE_BUILD_ID for build id utils
Build utilities to retrieve the build id are now exposed
through the new HAVE_BUILD_ID instead of HAVE_DL_ITERATE_PHDR
since this will allow adding support for platforms that do
not support HAVE_DL_ITERATE_PHDR

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38420>
2025-11-17 22:50:07 +00:00
Christian Gmeiner
adf881cd3e etnaviv: Add support for ARB_vertex_type_2_10_10_10_rev
This extension seems to be supported on GC3000 (HALTI2) and later hardware.
While no explicit feature bit documents this capability, testing
confirms that the required vertex formats work correctly on these GPUs.

This patch adds the missing B10G10R10A2 vertex format variants
(UNORM, SNORM, USCALED, SSCALED), gates support behind the HALTI2
feature check, and updates features.txt to reflect the new capability.

All relevant piglit tests pass.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38446>
2025-11-17 21:33:31 +00:00
David Rosca
17c015c2de radeonsi/vce: Add workaround for unaligned input surface
VCE requires 16x16 aligned input surface. Blit into an internal
scratch surface when input surface is not 16 aligned.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14270
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38392>
2025-11-17 16:49:21 +00:00
Patrick Lerda
f8de09a811 r600: fix rv770 read scratch compatibility
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The flag mega_fetch should be set on rv770 for a
read scratch operation (as written in the r700
documentation p357). Without this flag, read scratch
does not work and a gpu hang could be triggered.

Here are the tests fixed:
shaders/glsl-predication-on-large-array: fail pass
spec/glsl-1.10/execution/temp-array-indexing/glsl-fs-giant-temp-array: fail pass
spec/glsl-1.10/execution/temp-array-indexing/glsl-vs-giant-temp-array: fail pass
spec/glsl-1.30/execution/fs-large-local-array: fail pass
spec/glsl-1.30/execution/fs-large-local-array-vec2: fail pass
spec/glsl-1.30/execution/fs-large-local-array-vec3: fail pass
spec/glsl-1.30/execution/fs-large-local-array-vec4: fail pass
spec/glsl-1.30/execution/fs-multiple-large-local-arrays: fail pass

Fixes: 9c48a139b0 ("r600g: Support emitting scratch ops")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38353>
2025-11-17 15:48:17 +00:00
Erik Faye-Lund
55ef52d009 panfrost: remove needless variable
We can already tell if we're writing the first variable by looking at
sig_offset. So let's drop the needless variable here.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37903>
2025-11-17 15:26:22 +00:00
Erik Faye-Lund
9839db709a panfrost: initialize sig before use
If only invalid surfaces are passed, we end up using an undefined array
as a string. And while this might not be possible, it is hard to reason
about, especially for new readers and tools. So let's initialize the
buffer as an empty string.

CID: 1666581
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37903>
2025-11-17 15:26:22 +00:00
Gert Wollny
942e6af40b r600/sfn: use PS and PV inline registers when possible
This reduces register pressure later.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
2025-11-17 14:46:57 +00:00
Gert Wollny
80887e2590 r600/sfn: Fix test creation and handling of 3-src without dest
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
2025-11-17 14:46:57 +00:00
Gert Wollny
1f58a36abb r600/sfn: Add method to force-override the dest of an AluInstr
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
2025-11-17 14:46:57 +00:00
Gert Wollny
6f8841b338 r600/sfn: Make value factory a member of the block scheduler
No need to pass it around all the time.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
2025-11-17 14:46:56 +00:00
Gert Wollny
8e0a0ca098 r600/sfn: Add slot access operator to AluGroup
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
2025-11-17 14:46:56 +00:00
Gert Wollny
12d913fe4f r600/sfn: change register ID of dummy dest register
Handle it correctly in the assembler, live range evaluation
and RA.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
2025-11-17 14:46:56 +00:00
Gert Wollny
fc5728950b r600/sfn: don't use dummy register with non-write 64 bit slots
For trans ops and two source ops we can just clear the write flag

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
2025-11-17 14:46:56 +00:00
Gert Wollny
603af345be r600/sfn: fix querying number of sources for LDS ops in readport validation
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
2025-11-17 14:46:55 +00:00
Gert Wollny
0cd0efbbf9 r600/sfn: Don't assign dest registers in non-write interpolation slots
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
2025-11-17 14:46:55 +00:00
Gert Wollny
ebe395608a r600/sfn: Silence warning about unused parameter
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
2025-11-17 14:46:55 +00:00
Gert Wollny
43df08dd42 r600/sfn: remove some unused static variables
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
2025-11-17 14:46:54 +00:00
Gert Wollny
a22c03f0a3 r600: Handle dummy dest in assembler and disass
The dummy dest will not be allocated, so we must not
count it.

In the disassambler write PV and PS if the ALU dest GPR is
only used via PS/PV.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
2025-11-17 14:46:54 +00:00
Valentine Burley
eb0c95a5d5 lavapipe/ci: Run vkd3d job in parallel
This appears to be stable now, and running on multiple threads fixes the
the timeout problems we were hitting in lavapipe-vkd3d.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38476>
2025-11-17 14:00:10 +00:00
Samuel Pitoiset
f5ecc5ffd5 ac,radv,radeonsi: add ac_emit_sdma_copy_tiled_sub_window()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38448>
2025-11-17 11:29:24 +00:00
Samuel Pitoiset
5f8fa6ae03 ac,radv,radeonsi: add ac_emit_sdma_copy_linear_sub_window()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38448>
2025-11-17 11:29:23 +00:00
Samuel Pitoiset
6413651bcf ac,radv,radeonsi: add ac_emit_sdma_copy_linear()
RadeonSI wasn't considering the undocumented HW limitation apparently.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38430>
2025-11-17 08:28:37 +01:00
Timur Kristóf
cad4e7d2e7 radv, radeonsi: Move GFX6-7 CB clamp issue to ac_gpu_info
To improve consistency between the two drivers.
This excludes Hawaii from the workaround on RADV.

Also add the same to ac_null_device_create().

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38304>
2025-11-15 14:24:59 +01:00
Timur Kristóf
35b376b942 radeonsi: Respect if rbplus is allowed when choosing color formats
For consistency with RADV.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38304>
2025-11-15 14:24:52 +01:00
Timur Kristóf
4f793d2515 radeonsi: Inline si_choose_spi_color_formats
Will be necessary for the subsequent commit.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38304>
2025-11-15 14:24:46 +01:00
Marek Olšák
f9341082a2 nir,glsl,zink: remove the option nir_io_separate_clip_cull_distance_arrays
Some checks are pending
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This calls nir_separate_merged_clip_cull_io in zink, which is better
than having to handle separate clip & cull arrays in all passes.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38452>
2025-11-15 03:30:10 +00:00
Marek Olšák
e372365cf4 nir: rename nir_copy_prop -> nir_opt_copy_prop
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38411>
2025-11-15 02:16:38 +00:00
Lucas Fryzek
b75b0ce7b2 lp: Implement gallium depth_bounds_test capability
Some checks are pending
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Support for this capability in llvmpipe expose
support for GL_EXT_depth_bounds_test, as well as supporting
the `depthBounds` device feature in lavapipe.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36487>
2025-11-14 09:43:22 +00:00
Daniel Schürmann
7ee1932309 treewide: Never preserve nir_metadata_dominance without nir_metadata_block_index
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38367>
2025-11-14 09:09:14 +00:00
Adrián Larumbe
a24f490488 panfrost: match a GL object's maximum label length to KMD uAPI limit
At present, this is the value mandated by the KMD's uAPI, or 4096 bytes.

Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38027>
2025-11-13 19:16:15 +00:00
Adrián Larumbe
a68c584d70 mesa: gallium: make GL object maximum label length a pipescreen cap
Commit a4ffd2395f ("mesa: Implement label sharing from GL objects with
UM drivers") enabled GL clients to tag objects at a UM driver level. In
the case of Panfrost, and for both KMDs, maximum label size is set to
4096, but the Mesa limit is much lower.

Since glObjectLabel() allocates object labels dynamically, there's no
need to have this value chiseled in stone, so allow Gallium driver
implementers to set their own limit through a pipe screen capability.

Keep the same default maximum label length as before.

Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38027>
2025-11-13 19:16:15 +00:00
Pohsiang (John) Hsu
e9757d25e0 mediafoundation: propagate input timestamp / duration to output
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14261
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38427>
2025-11-13 16:31:06 +00:00
Benjamin Cheng
b4ae11ee42 ac,radeonsi/vcn,radv/video: Drop signature param
The signature is not very useful, and is unnecessary CPU overhead.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38372>
2025-11-13 14:35:58 +00:00
Gert Wollny
79e4323cf0 r600/sfn: Don't start a new ALU-CF if LDS pipeline loads are pending
Fixes: e57643cf (r600/sfn: Add handling for R600 indirect access alias handling)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38398>
2025-11-13 11:17:51 +00:00
Qiang Yu
ece827d53b radeonsi: enable EXT_mesh_shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:27 +00:00
Qiang Yu
3d01529316 radeonsi: si_calculate_max_simd_waves support task and mesh shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:25 +00:00
Qiang Yu
4495978932 radeonsi: handle maybe per primitive input for fragment shader
Some fragment shader may be per-primitive when mesh pipeline,
per-vertex when vertex pipeline. We sort these inputs always
after other per-vertex inputs in nir_recompute_io_bases, so
fragment shader code is same, just need to set different reg.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38044>
2025-11-13 01:30:24 +00:00