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r600/sfn: Don't assign dest registers in non-write interpolation slots
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
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parent
ebe395608a
commit
0cd0efbbf9
1 changed files with 37 additions and 15 deletions
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@ -975,11 +975,18 @@ FragmentShaderEG::load_interpolated_one_comp(RegisterVec4& dest,
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if (op == op2_interp_z)
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chan += 2;
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ir = new AluInstr(op,
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dest[chan],
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i & 1 ? params.j : params.i,
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new InlineConstant(ALU_SRC_PARAM_BASE + params.base, chan),
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i == 0 ? AluInstr::write : AluInstr::empty);
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if (i == 0)
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ir = new AluInstr(op,
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dest[chan],
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params.i,
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new InlineConstant(ALU_SRC_PARAM_BASE + params.base, chan),
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AluInstr::write);
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else
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ir = new AluInstr(op,
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chan,
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{params.j,
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new InlineConstant(ALU_SRC_PARAM_BASE + params.base, chan)},
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AluInstr::empty);
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ir->set_bank_swizzle(alu_vec_210);
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success = group->add_instruction(ir);
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@ -1002,11 +1009,18 @@ FragmentShaderEG::load_interpolated_two_comp(RegisterVec4& dest,
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assert(params.j);
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assert(params.i);
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for (unsigned i = 0; i < 4; ++i) {
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ir = new AluInstr(op,
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dest[i],
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i & 1 ? params.j : params.i,
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new InlineConstant(ALU_SRC_PARAM_BASE + params.base, i),
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(writemask & (1 << i)) ? AluInstr::write : AluInstr::empty);
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if (writemask & (1 << i))
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ir = new AluInstr(op,
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dest[i],
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i & 1 ? params.j : params.i,
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new InlineConstant(ALU_SRC_PARAM_BASE + params.base, i),
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AluInstr::write);
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else
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ir = new AluInstr(op,
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i,
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{i & 1 ? params.j : params.i,
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new InlineConstant(ALU_SRC_PARAM_BASE + params.base, i)},
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AluInstr::empty);
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ir->set_bank_swizzle(alu_vec_210);
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success = group->add_instruction(ir);
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}
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@ -1026,11 +1040,19 @@ FragmentShaderEG::load_interpolated_two_comp_for_one(RegisterVec4& dest,
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AluInstr *ir = nullptr;
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for (int i = 0; i < 4; ++i) {
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ir = new AluInstr(op,
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dest[i],
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i & 1 ? params.j : params.i,
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new InlineConstant(ALU_SRC_PARAM_BASE + params.base, i),
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i == comp ? AluInstr::write : AluInstr::empty);
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if (i == comp) {
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ir = new AluInstr(op,
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dest[i],
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i & 1 ? params.j : params.i,
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new InlineConstant(ALU_SRC_PARAM_BASE + params.base, i),
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AluInstr::write);
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} else {
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ir = new AluInstr(op,
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i,
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{i & 1 ? params.j : params.i,
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new InlineConstant(ALU_SRC_PARAM_BASE + params.base, i)},
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AluInstr::empty);
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}
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ir->set_bank_swizzle(alu_vec_210);
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success = group->add_instruction(ir);
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}
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