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Author SHA1 Message Date
Zan Dobersek
7fd5f76393 nir/lower_vars_to_scratch: calculate threshold-limited variable size separately 
ir3's lowering of variables to scratch memory has to treat 8-bit values as
16-bit ones when comparing such value's size against the given threshold
since those values are handled through 16-bit half-registers. But those
values can still use natural 8-bit size and alignment for storing inside
scratch memory.

nir_lower_vars_to_scratch now accepts two size-and-alignment functions,
one used for calculating the variable size and the other for calculating
the size and alignment needed for storing inside scratch memory. Non-ir3
uses of this pass can just duplicate the currently-used function. ir3
provides a separate variable-size function that special-cases 8-bit types.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29875>
 2024-08-07 14:32:28 +00:00
Georg Lehmann
d9849ac466 aco: test xor swap16 path 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30515>
 2024-08-06 20:40:12 +00:00
Georg Lehmann
e0818cb87b aco/gfx11+: don't use VOP3 v_swap_b16 
v_swap_b16 is not offically supported as VOP3, so it can't be used with v128-255.
Tests show that VOP3 appears to work correctly, but according to AMD that should
not be relied on.

https://github.com/llvm/llvm-project/pull/100442#discussion_r1703929676

Foz-DB Navi31:
Totals from 6 (0.01% of 79395) affected shaders:
Instrs: 64799 -> 65932 (+1.75%)
CodeSize: 360180 -> 368440 (+2.29%)
Latency: 1364648 -> 1365922 (+0.09%)
InvThroughput: 635843 -> 636475 (+0.10%)
Copies: 14766 -> 15698 (+6.31%)
VALU: 38743 -> 39675 (+2.41%)

Fixes: 80b8bbf0c5 ("aco/gfx11: use v_swap_b16")

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30515>
 2024-08-06 20:40:12 +00:00
Alyssa Rosenzweig
d99c2ef059 nir/opt_uniform_atomics: add fs atomics predicated? flag 
on agx (and mali), we predicate atomics on "if (!helper)", so doing so again in
this pass is redundant. and would cause a problem since we'd then have to lower
the "is helper inv?" flag late. so just skip the extra lowering code.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30488>
 2024-08-06 11:48:17 -04:00
Marek Olšák
de83b5ef77 ac/surface/gfx12: fix setting tile_swizzle 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30503>
 2024-08-05 19:35:39 +00:00
Collabora's Gfx CI Team
1d35b2f343 Uprev Piglit to 4a62c26721a47552a96416a134b789a813dd51a6 
582f5490a1...4a62c26721

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30254>
 2024-08-05 10:45:38 +00:00
Rhys Perry
8f3d0fbad7 aco: don't transform v_interp_p2_f32 with constant into fma 
Since v_interp_p2_f32 with constant operands only happens on GFX11.5, this
should actually be fine in all cases where this is currently possible
(GFX11.5+ allows DPP with scalar src1). However, it does fail validation
because we haven't updated that yet.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Fixes: bee487df48 ("aco/gfx11.5+: use vinterp for fddx/fddy")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30477>
 2024-08-05 09:32:24 +00:00
Rhys Perry
911fdce0b6 aco: fix validation of v_s_ opcodes 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Fixes: 284b9965e8 ("aco/gfx11.5+: allow sgpr dst for trans ops and use pseudo scalar ops on gfx12")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30477>
 2024-08-05 09:32:24 +00:00
Rhys Perry
c818de7360 aco: combine DPP into v_cvt_f16_f32 
The label_f2f16 was interfering with the label_dpp.

fossil-db (navi31):
Totals from 36 (0.05% of 79395) affected shaders:
Instrs: 70998 -> 70875 (-0.17%); split: -0.18%, +0.00%
CodeSize: 373184 -> 372244 (-0.25%)
Latency: 1266807 -> 1266752 (-0.00%); split: -0.01%, +0.01%
InvThroughput: 131618 -> 131566 (-0.04%); split: -0.04%, +0.00%
SClause: 1947 -> 1944 (-0.15%)
Copies: 5194 -> 5208 (+0.27%)
VALU: 41019 -> 40921 (-0.24%); split: -0.24%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30425>
 2024-07-31 17:26:05 +00:00
Konstantin Seurer
f8bf9f07b6 aco: print s_delay_alu INSTSKIP>3 correctly 
INSTSKIP has 3 bits.

Fixes: 94958e6 ("aco: improve printing of s_delay_alu")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30401>
 2024-07-31 08:09:52 +00:00
Eric Engestrom
057b77d2a3 ci/vkd3d: add support for *-flakes.txt list files 
We still print them in the job log to not completely ignore them, but
they don't break the jobs anymore.

Additionally, we use the same format as deqp-runner for reporting
flakes, so that existing tools can pick up this new information without
requiring any change.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30413>
 2024-07-30 18:47:52 +00:00
Eric Engestrom
f54cb2476f ci/vkd3d: add support for *-skips.txt list files 
Allows annotating the skips to document them, and avoids running the
entire CI for that driver when changing the skips for one device.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30413>
 2024-07-30 18:47:52 +00:00
Eric Engestrom
ab1e99de62 ci/vkd3d: rename vkd3d expected failures list to be more explicit 
And allow for something other than just "failures", such as...
skips and flakes (see next commits).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30413>
 2024-07-30 18:47:52 +00:00
Eric Engestrom
50139426e2 ci/vkd3d: use GPU_VERSION to identify the list of failures, unifying with deqp-runner.sh 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30413>
 2024-07-30 18:47:52 +00:00
Georg Lehmann
bee487df48 aco/gfx11.5+: use vinterp for fddx/fddy 
Since GFX11.5 VINTERP can be dual issued, DPP cannot.

Foz-DB GFX11.5:
Totals from 8401 (10.58% of 79395) affected shaders:
MaxWaves: 247880 -> 247848 (-0.01%)
Instrs: 6802675 -> 6815061 (+0.18%); split: -0.08%, +0.26%
CodeSize: 36539444 -> 36500948 (-0.11%); split: -0.22%, +0.11%
VGPRs: 444324 -> 445932 (+0.36%); split: -0.01%, +0.37%
SpillSGPRs: 1350 -> 1346 (-0.30%)
Latency: 63628380 -> 63523687 (-0.16%); split: -0.20%, +0.04%
InvThroughput: 10566750 -> 10486009 (-0.76%); split: -0.77%, +0.01%
VClause: 100171 -> 100248 (+0.08%); split: -0.08%, +0.16%
SClause: 175467 -> 176208 (+0.42%); split: -0.05%, +0.47%
Copies: 356817 -> 356935 (+0.03%); split: -0.17%, +0.20%
PreVGPRs: 283403 -> 283898 (+0.17%); split: -0.02%, +0.20%
VALU: 4217969 -> 4229831 (+0.28%); split: -0.03%, +0.31%
SALU: 479367 -> 479428 (+0.01%); split: -0.00%, +0.01%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30350>
 2024-07-30 15:25:19 +00:00
Georg Lehmann
8c6e299141 aco: reorder dpp for ddx/ddy 
Having the mov last allows us to fuse it with the use instruction.

Foz-DB Navi31:
Totals from 9400 (11.84% of 79395) affected shaders:
MaxWaves: 273998 -> 274030 (+0.01%)
Instrs: 8303778 -> 8282997 (-0.25%); split: -0.29%, +0.04%
CodeSize: 44428088 -> 44464860 (+0.08%); split: -0.09%, +0.18%
VGPRs: 506616 -> 504492 (-0.42%)
SpillSGPRs: 1389 -> 1393 (+0.29%)
Latency: 76923466 -> 76983332 (+0.08%); split: -0.06%, +0.14%
InvThroughput: 12386888 -> 12391262 (+0.04%); split: -0.04%, +0.07%
VClause: 125136 -> 125059 (-0.06%); split: -0.13%, +0.07%
SClause: 227361 -> 226615 (-0.33%); split: -0.43%, +0.10%
Copies: 440787 -> 440749 (-0.01%); split: -0.17%, +0.16%
PreVGPRs: 339783 -> 333343 (-1.90%); split: -1.92%, +0.02%
VALU: 5088362 -> 5069737 (-0.37%); split: -0.37%, +0.01%
SALU: 606596 -> 606609 (+0.00%); split: -0.01%, +0.01%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30350>
 2024-07-30 15:25:19 +00:00
Georg Lehmann
62fa5b9d6f aco/gfx11+: apply neg to vinterp 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30350>
 2024-07-30 15:25:19 +00:00
yinjiyao
50ff1e4f86 radeonsi/vcn: add HDR sei in hevc enc 
Enable HDR sei in hevc encoder.

Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30388>
 2024-07-29 21:48:04 +00:00
Georg Lehmann
b92134e088 aco: validate temp_rc 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30399>
 2024-07-29 18:35:33 +00:00
Georg Lehmann
53155ba12d aco: add CompilationProgress::after_lower_to_hw 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30399>
 2024-07-29 18:35:33 +00:00
Georg Lehmann
6da7bd842c aco/optimizer: update temp_rc when converting to uniform bool alu 
Cc: mesa-stable

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30399>
 2024-07-29 18:35:33 +00:00
Rhys Perry
a8a15dc5b5 aco: add struct and helpers for exec potentially empty 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30320>
 2024-07-26 11:08:27 +00:00
Rhys Perry
39264a90c3 aco: consider exec empty after divergent continue then divergent break 
For:
loop {
   if (divergent)
      continue
   if (divergent)
      break
   //exec is potentially empty here
   loop {
      if (divergent)
         break
   }
}
If a subset of invocations take the continue and then the rest take the
break, then exec will be empty after the break.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30320>
 2024-07-26 11:08:27 +00:00
Georg Lehmann
97aa3464b9 radv/rt: remove one VALU from traversal loop 
Not much, but something, I guess?

Foz-DB Navi31:
Totals from 93 (0.12% of 79395) affected shaders:
MaxWaves: 1338 -> 1354 (+1.20%)
Instrs: 3689907 -> 3689721 (-0.01%); split: -0.01%, +0.00%
CodeSize: 18921812 -> 18922920 (+0.01%); split: -0.00%, +0.01%
VGPRs: 9012 -> 8988 (-0.27%)
Latency: 23153748 -> 23167640 (+0.06%)
InvThroughput: 4490882 -> 4493136 (+0.05%)
Copies: 287888 -> 287728 (-0.06%)
VALU: 2022082 -> 2021916 (-0.01%)
SALU: 458904 -> 459064 (+0.03%)

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30342>
 2024-07-25 20:24:23 +00:00
David Rosca
8b1a889e45 radeonsi/vcn: Add support for QVBR rate control mode 
This rate control mode needs pre-encode enabled and currently is
supported for VCN3 and VCN4.
AV1 needs quality level scaled down from 255 to 51 range.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4024
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30221>
 2024-07-24 20:18:49 +00:00
Ruijing Dong
8a5ef9413b radeonsi/vcn: add HDR metadata obu in av1enc 
Enable HDR metadata obu in av1 encoder for
both vcn4/5.

Reviewed-by: David Rosca <david.rosca@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30237>
 2024-07-23 17:16:21 +00:00
Ruijing Dong
aa86c3a235 radeonsi/vcn: input av1 hdr metadata 
get av1 hdr metadata from frontends.

Reviewed-by: David Rosca <david.rosca@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30237>
 2024-07-23 17:16:21 +00:00
Marek Olšák
d90080b51b nir/opt_vectorize_io: optionally don't vectorize IO with different types 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11443

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
 2024-07-23 16:13:17 +00:00
Marek Olšák
07ef1a8124 ac,radeonsi: set 16-bit flags in io_options optimally 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
 2024-07-23 16:13:17 +00:00
Marek Olšák
709ebd8293 amd: expose nir_io_mix_convergent_flat_with_interpolated 
The drivers need to invert how they gather flat inputs.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
 2024-07-23 16:13:17 +00:00
Marek Olšák
b2d32ae246 nir: add nir_intrinsic_load_per_primitive_input, split from io_semantics flag 
Instead of having 1 bit in nir_io_semantics indicating a per-primitive
FS input, add a dedicated intrinsic for it.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
 2024-07-23 16:13:16 +00:00
Ganesh Belgur Ramachandra
ec4e5ef0f7 amd/common: skip lane size determination for chips without image opcodes (e.g. gfx940) 
This fixes VAAPI decode performance issues.

Fixes: 5b3e1a0532 ("radeonsi: change the compute blit to clear/blit multiple pixels per lane")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30273>
 2024-07-23 14:50:37 +00:00
Rhys Perry
cccfbe6141 aco: move s_setprio to before NGG exec initialization 
fossil-db (gfx1150):
Totals from 32 (0.04% of 79395) affected shaders:
Instrs: 17397 -> 17365 (-0.18%)
CodeSize: 83700 -> 83580 (-0.14%)
Latency: 59006 -> 58974 (-0.05%)

fossil-db (navi21):
Totals from 4 (0.01% of 79395) affected shaders:

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30241>
 2024-07-23 13:14:52 +00:00
Rhys Perry
4574cd9fae aco: form export clauses 
This is useful for the export priority workaround. It also moves
copy/conversion instructions up from in-between exports.

fossil-db (gfx1150):
Totals from 9974 (12.56% of 79395) affected shaders:
Instrs: 7038168 -> 6949186 (-1.26%)
CodeSize: 37988148 -> 37632220 (-0.94%)
Latency: 44759046 -> 44324922 (-0.97%); split: -0.97%, +0.00%
InvThroughput: 8213681 -> 8201222 (-0.15%); split: -0.15%, +0.00%

fossil-db (navi21):
Totals from 16785 (21.14% of 79395) affected shaders:
Instrs: 9282414 -> 9282302 (-0.00%)
CodeSize: 50252480 -> 50252032 (-0.00%)
Latency: 59716988 -> 59610334 (-0.18%); split: -0.18%, +0.00%
InvThroughput: 12681965 -> 12680380 (-0.01%); split: -0.01%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30241>
 2024-07-23 13:14:52 +00:00
Rhys Perry
08a4853ffd aco: add export instructions to should_form_clause 
fossil-db (gfx1150):
Totals from 1 (0.00% of 79395) affected shaders:
Instrs: 906 -> 901 (-0.55%)
CodeSize: 4692 -> 4672 (-0.43%)
Latency: 1582 -> 1561 (-1.33%)

fossil-db (navi21):
Totals from 9917 (12.49% of 79395) affected shaders:
Instrs: 6120530 -> 6116252 (-0.07%)
CodeSize: 31808916 -> 31791804 (-0.05%)
Latency: 23854892 -> 23866438 (+0.05%); split: -0.01%, +0.06%
InvThroughput: 4655278 -> 4655490 (+0.00%); split: -0.00%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30241>
 2024-07-23 13:14:52 +00:00
Rhys Perry
3b732340ec aco/gfx11.5: skip dealloc_vgprs for stages with exports 
fossil-db (gfx1150):
Totals from 72997 (91.94% of 79395) affected shaders:
Instrs: 35047397 -> 34679136 (-1.05%)
CodeSize: 182414292 -> 180934440 (-0.81%)
Latency: 225452700 -> 225045411 (-0.18%)
InvThroughput: 40416910 -> 40395608 (-0.05%); split: -0.06%, +0.00%
Branches: 604968 -> 601660 (-0.55%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30241>
 2024-07-23 13:14:52 +00:00
Rhys Perry
492d99fc6a aco: add tests for export priority issue 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30241>
 2024-07-23 13:14:51 +00:00
Rhys Perry
0919ce1ac4 aco/gfx11.5: workaround export priority issue 
https://github.com/llvm/llvm-project/pull/99273

fossil-db (gfx1150):
Totals from 73996 (93.20% of 79395) affected shaders:
Instrs: 36015357 -> 36807177 (+2.20%)
CodeSize: 189072544 -> 192238748 (+1.67%)
Latency: 245845181 -> 246790550 (+0.38%); split: -0.00%, +0.38%
InvThroughput: 45068018 -> 45116177 (+0.11%); split: -0.00%, +0.11%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Backport-to: 24.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30241>
 2024-07-23 13:14:51 +00:00
Pierre-Eric Pelloux-Prayer
0c868aa94a amd: use a valid size for ac_pm4_state allocation 
If max_dw is smaller than the pm4 array the allocation size would be
smaller than sizeof(ac_pm4_state).

Fixes: 428601095c ("ac,radeonsi import PM4 state from RadeonSI")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30257>
 2024-07-22 10:09:34 +00:00
Eric Engestrom
e1edf20a4d radeonsi/ci: skip timing out test 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30264>
 2024-07-19 21:26:16 +00:00
Samuel Pitoiset
1846eed38b radv/meta: create the layout for clear depth/stencil on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
7c62f53b83 radv/meta: rework getting depth stencil clear pipelines 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
cfd9d550d8 radv/meta: create the layout for clear color on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
dd188b7e77 radv/meta: rework getting clear color pipelines 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
2af57b1cac radv/meta: create the louts for DCC comp-to-single clear on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
6c6dae59fb radv/meta: create the layouts for compute resolve on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
fd5526fd87 radv/meta: create the layouts for FMASK expand on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
4f3f3ccd0d radv/meta: create the layouts for FMASK copy on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
40724a657a radv/meta: create the layouts for depth decompress on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
e7eb201e18 radv/meta: create the layouts for FS resolve pipelines on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00