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radv/meta: create the layouts for compute resolve on-demand

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
This commit is contained in:
Samuel Pitoiset 2024-07-19 12:25:50 +02:00 • committed by Marge Bot
parent fd5526fd87
commit 6c6dae59fb
1 changed files with 51 additions and 40 deletions
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91
src/amd/vulkan/meta/radv_meta_resolve_cs.c
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@ -168,34 +168,41 @@ build_depth_stencil_resolve_compute_shader(struct radv_device *dev, int samples,
static VkResult
create_layout(struct radv_device *device)
{
VkResult result;
VkResult result = VK_SUCCESS;
const VkDescriptorSetLayoutBinding bindings[] = {
{
.binding = 0,
.descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
.descriptorCount = 1,
if (!device->meta_state.resolve_compute.ds_layout) {
const VkDescriptorSetLayoutBinding bindings[] = {
{
.binding = 0,
.descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
.descriptorCount = 1,
.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
},
{
.binding = 1,
.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
.descriptorCount = 1,
.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
},
};
result =
radv_meta_create_descriptor_set_layout(device, 2, bindings, &device->meta_state.resolve_compute.ds_layout);
if (result != VK_SUCCESS)
return result;
}
if (!device->meta_state.resolve_compute.p_layout) {
const VkPushConstantRange pc_range = {
.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
},
{
.binding = 1,
.descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
.descriptorCount = 1,
.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
},
};
.size = 16,
};
result = radv_meta_create_descriptor_set_layout(device, 2, bindings, &device->meta_state.resolve_compute.ds_layout);
if (result != VK_SUCCESS)
return result;
result = radv_meta_create_pipeline_layout(device, &device->meta_state.resolve_compute.ds_layout, 1, &pc_range,
&device->meta_state.resolve_compute.p_layout);
}
const VkPushConstantRange pc_range = {
.stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
.size = 16,
};
return radv_meta_create_pipeline_layout(device, &device->meta_state.resolve_compute.ds_layout, 1, &pc_range,
&device->meta_state.resolve_compute.p_layout);
return result;
}
static VkResult
@ -204,6 +211,10 @@ create_color_resolve_pipeline(struct radv_device *device, int samples, bool is_i
{
VkResult result;
result = create_layout(device);
if (result != VK_SUCCESS)
return result;
nir_shader *cs = build_resolve_compute_shader(device, is_integer, is_srgb, samples);
result = radv_meta_create_compute_pipeline(device, cs, device->meta_state.resolve_compute.p_layout, pipeline);
@ -218,6 +229,10 @@ create_depth_stencil_resolve_pipeline(struct radv_device *device, int samples, i
{
VkResult result;
result = create_layout(device);
if (result != VK_SUCCESS)
return result;
nir_shader *cs = build_depth_stencil_resolve_compute_shader(device, samples, index, resolve_mode);
result = radv_meta_create_compute_pipeline(device, cs, device->meta_state.resolve_compute.p_layout, pipeline);
@ -232,10 +247,6 @@ radv_device_init_meta_resolve_compute_state(struct radv_device *device, bool on_
struct radv_meta_state *state = &device->meta_state;
VkResult res;
res = create_layout(device);
if (res != VK_SUCCESS)
return res;
if (on_demand)
return VK_SUCCESS;
@ -363,6 +374,12 @@ emit_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_ivi
VkPipeline pipeline;
VkResult result;
result = get_color_resolve_pipeline(device, src_iview, &pipeline);
if (result != VK_SUCCESS) {
vk_command_buffer_set_error(&cmd_buffer->vk, result);
return;
}
radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE,
device->meta_state.resolve_compute.p_layout, 0, 2,
(VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
@ -389,12 +406,6 @@ emit_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_ivi
},
}}});
result = get_color_resolve_pipeline(device, src_iview, &pipeline);
if (result != VK_SUCCESS) {
vk_command_buffer_set_error(&cmd_buffer->vk, result);
return;
}
radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline);
unsigned push_constants[4] = {
@ -472,6 +483,12 @@ emit_depth_stencil_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image
VkPipeline pipeline;
VkResult result;
result = get_depth_stencil_resolve_pipeline(device, samples, aspects, resolve_mode, &pipeline);
if (result != VK_SUCCESS) {
vk_command_buffer_set_error(&cmd_buffer->vk, result);
return;
}
radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_COMPUTE,
device->meta_state.resolve_compute.p_layout, 0, 2,
(VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
@ -498,12 +515,6 @@ emit_depth_stencil_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image
},
}}});
result = get_depth_stencil_resolve_pipeline(device, samples, aspects, resolve_mode, &pipeline);
if (result != VK_SUCCESS) {
vk_command_buffer_set_error(&cmd_buffer->vk, result);
return;
}
radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, pipeline);
uint32_t push_constants[2] = {resolve_offset->x, resolve_offset->y};