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Author SHA1 Message Date
Marek Olšák
e18344dd24 ac,radeonsi,winsyses: switch to SPDX-License-Identifier: MIT 
excluding: aco, radv, addrlib

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23113>
 2023-05-24 21:48:19 +00:00
Qiang Yu
7aac3508dc radeonsi: add symbols to si_shader_binary 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
 2023-05-15 02:01:11 +00:00
Qiang Yu
f3997a3ca7 radeonsi: add a raw shader binary type 
It's the output of ACO compiler. To share the si_shader_binary
struct with ELF type:
  * add a type field to indicate RAW or ELF
  * rename elf_buffer/size to code_buffer/size

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
 2023-05-15 02:01:10 +00:00
Pierre-Eric Pelloux-Prayer
65b40d0b7e radeonsi: implement fw based mcbp 
Some chips support firmware based mcbp. If supported this means
radeonsi needs to allocate 3 buffers and pass them to the firmware.

From there, the firmware will handle mcbp and register shadowing
on its own so we don't need to insert LOAD packet in the preamble.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21986>
 2023-04-25 06:47:11 +00:00
Harri Nieminen
7851b6fd48 radeonsi: fix typos 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>
 2023-04-13 23:08:22 +00:00
Marek Olšák
eaf98b1422 ac/nir: implement image opcode emulation for CDNA, enable it in radeonsi 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
 2023-04-06 15:00:53 +00:00
Marek Olšák
d76bb15c51 radeonsi: replace nonir,noir,noasm,preoptir options with new reworked options 
New options depending on what you want to print:
- initnir  = initial NIR of shader CSOs
- nir      = final NIR of variants after all lowering
- initllvm = LLVM IR before optimizations
- llvm     = final LLVM IR
- asm      = asm

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21860>
 2023-03-15 13:16:34 +00:00
Marek Olšák
e01d505291 radeonsi: other cosmetic changes in si_state_shaders.cpp 
VS_W32_EN has no effect on Gfx11, but we better not set it.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21403>
 2023-03-08 07:29:09 +00:00
Marek Olšák
ef965d5681 radeonsi: reorganize si_shader_ps 
To make branching based on gfx_level nicer and the code in a logical order.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21403>
 2023-03-08 07:29:09 +00:00
Marek Olšák
c9d297fc77 radeonsi: reorganize si_shader_ngg 
To make branching based on gfx_level nicer and the code in a logical order.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21403>
 2023-03-08 07:29:09 +00:00
Marek Olšák
1664aad43c radeonsi: reorganize si_shader_hs 
To make branching based on gfx_level nicer and the code in a logical order.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21403>
 2023-03-08 07:29:09 +00:00
Marek Olšák
b3459eae7a radeonsi: reindent si_shader_ls, si_shader_es, si_shader_gs, si_shader_vs 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21403>
 2023-03-08 07:29:09 +00:00
Marek Olšák
7e0ed2c4f0 radeonsi: set pm4.atom.emit in si_get_shader_pm4_state 
except gfx10_shader_ngg, which isn't as trivial

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21403>
 2023-03-08 07:29:09 +00:00
Marek Olšák
ddded6fbb5 radeonsi: emulate VGT_ESGS_RING_ITEMSIZE in the shader on gfx9-11 
The hardware uses the register to premultiply GS vertex indices
in input VGPRs.

This changes the behavior as follows:
- VGT_ESGS_RING_ITEMSIZE is always 1 on gfx9-11, set in the preamble.
- The value is passed to the shader via current_gs_state (vs_state_bits).
- The shader does the multiplication.

The reason is that VGT_ESGS_RING_ITEMSIZE will be removed in the future.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21403>
 2023-03-08 07:29:09 +00:00
Marek Olšák
73c91c4c8a radeonsi: assume shader is never NULL in si_emit_shader_* 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:49 +00:00
Marek Olšák
ab802a1f91 radeonsi: simplify encoding VGPRS and SGPRS 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:49 +00:00
Marek Olšák
63d5eb35f4 radeonsi: check the pm4.reg_va_low_idx assertion unconditionally 
This is not a hot path. We can always do this.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:49 +00:00
Marek Olšák
51e4437eee radeonsi: add si_pm4_set_reg_va to simplify setting reg_va_low_idx for RGP 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:49 +00:00
Marek Olšák
ccaaf8fe04 amd: massively simplify how info->spi_cu_en is applied 
Instead of having ac_set_reg_cu_en that sets the register, replace it with
ac_apply_cu_en that only returns the modified register value,
which allows a large simplification in both drivers because a lot of code
becomes duplicated after it's switched to ac_apply_cu_en.

RADV also didn't apply it to a few registers. Fixed.

This removes 82 lines of code in total.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:48 +00:00
Marek Olšák
26208698ae radeonsi: rename esgs_itemsize -> esgs_vertex_stride 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
461b05c281 radeonsi: remove a gfx11 check in si_shader_gs (legacy GS) 
Gfx11 doesn't support legacy GS.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
d61cd39026 radeonsi: replace si_screen::has_out_of_order_rast with the radeon_info field 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
6dcd60206a radeonsi: remove no-op setting of THDS_PER_SUBGRP 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
742c9f411b radeonsi: change si_shader::ctx_reg to a nameless union for better readability 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
3e9863f496 radeonsi: move a few DB_SHADER_CONTROL states into si_shader_ps 
They can be set si_shader_ps.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
31438fbab5 radeonsi/gfx11: fix the CU_EN clear mask for RSRC4_GS 
Fixes: 9fecac091f - radeonsi/gfx11: scattered register deltas

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
97f30fc65f radeonsi/gfx11: don't add alpha to mrt0 format for A2C if exporting via mrtz 
If alpha-to-coverage is exported via mrtz, don't upgrade the mrt0 format
to one with an alpha channel.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20967>
 2023-02-05 23:23:45 -05:00
Marek Olšák
0f81224e70 radeonsi/gfx11: don't add mrt0 export for alpha-to-coverage if mrtz is present 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20967>
 2023-02-05 23:23:45 -05:00
Marek Olšák
d087b3ec3c radeonsi: determine alpha_to_coverage robustly in si_update_framebuffer_blend_rasterizer 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
 2023-02-03 00:18:01 +00:00
Marek Olšák
f2923168ba radeonsi: merge si_ps_key_update_framebuffer_blend & .._update_blend_rasterizer 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
 2023-02-03 00:18:01 +00:00
Marek Olšák
8532cb8e7e radeonsi: deduplicate VS/TES/GS update code 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
 2023-02-03 00:18:01 +00:00
Marek Olšák
0b4b309fc6 radeonsi/gfx11: add a comment why we use PRIM_GRP_SIZE <= 252 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
 2023-02-03 00:18:01 +00:00
Marek Olšák
d21850f753 radeonsi/gfx11: remove the INST_PREF_SIZE workaround 
The hw does the right thing automatically. (i.e. enables or disables
the feature)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
 2023-02-03 00:18:01 +00:00
Marek Olšák
f6c30af00c radeonsi: implement RB+ depth-only rendering for better perf 
The explanation is in the last change of this commit.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
 2023-02-03 00:18:01 +00:00
Marek Olšák
84d59cdb59 amd: split GFX1103 into GFX1103_R1 and GFX1103_R2 
Fixes: caa09f66ae - amd: add chip identification for gfx1100-1103

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
 2023-02-03 00:18:01 +00:00
Pierre-Eric Pelloux-Prayer
014a0bf0b6 radeonsi/gfx11: clamp PRIM_GRP_SIZE 
Legal range of values is [1, 256].

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20728>
 2023-01-25 08:09:13 +00:00
Marek Olšák
bdfacd0a24 radeonsi/gfx11: fix compute scratch buffer - WAVES is always per SE 
Fixes: ba02ed91a6 - ac/gfx11: fix the scratch buffer

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19477>
 2022-11-06 17:10:35 -05:00
Pierre-Eric Pelloux-Prayer
8034a71430 radeonsi/sqtt: re-export shaders in a single bo 
RGP expects a pipeline's shaders to be all stored sequentially, eg:

  [vs][ps][gs]

As such, it assumes a single bo is dumped to the .rgp file, with
the following info:
  * va of the bo
  * offset to each shader inside the bo

For radeonsi, the shaders are stored individually, so we may have
a big gap between the shaders forming a pipeline => we can produce
very large file because the layout in the file must match the one
in memory (see the warning in ac_rgp_file_write_elf_text).

This commit implements a workaround: gfx shaders are re-exported as a
pipeline.

To update the shader address, a new state is created (sqtt_pipeline),
which will overwrite the needed _PGM_LO_* registers.

This reduces DeuxEX rgp captures from 150GB+ to less than 100MB.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18865>
 2022-10-25 11:58:07 +00:00
Marek Olšák
540e695b29 radeonsi: set VS_OUT_MISC_SIDE_BUS_ENA=1 for clip distance exports on gfx10.3 
This should improve performance of clip distances.

Reviewed-by: Pierre-eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18639>
 2022-09-20 04:26:46 +00:00
Thomas H.P. Andersen
e9cff8ed7f radeonsi: avoid a use-after-free 
Use of 'shader' after free was added in ac6fb2467f

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18356>
 2022-09-01 07:34:54 +00:00
Pierre-Eric Pelloux-Prayer
ac6fb2467f radeonsi: deal with ac_nir_translate failures 
ac_nir_translate can fail now so forward the translation result to
si_llvm_compile_shader. If it's a failure, it'll print something like:
  radeonsi: can't compile a main shader part
And the shader won't be used.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18147>
 2022-08-31 00:09:37 +00:00
Marek Olšák
b8c861b864 radeonsi: move set_patch_vertices into si_state_shaders.cpp 
it's a better place for it

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18195>
 2022-08-30 04:57:43 +00:00
Marek Olšák
01d351a491 radeonsi: move patch_vertices-related tessellation updates out of si_draw 
This only depends on the patch_vertices and the TCS.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18195>
 2022-08-30 04:57:43 +00:00
Marek Olšák
dcd80d31cf radeonsi: set GS_STATE_OUTPRIM and PROVOKING_VTX_INDEX only when they change 
This moves setting those registers from an unconditional place in draw_vbo
into si_set_rasterized_prim (for draw_vbo), si_update_rasterized_prim
(for bind_xx_shader), and si_bind_rs_state.

It's a little more complicated than expected.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18195>
 2022-08-30 04:57:43 +00:00
Marek Olšák
7144621e94 radeonsi: unify the logic that sets rast_prim 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18195>
 2022-08-30 04:57:43 +00:00
Marek Olšák
2ed9eb1b63 radeonsi/gfx11: enable shader prefetch except for initial chip revisions 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
 2022-08-03 00:57:16 +00:00
Marek Olšák
a09d971007 radeonsi/gfx11: rename si_calc_inst_pref_size -> si_get_shader_prefetch_size 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
 2022-08-03 00:57:16 +00:00
Marek Olšák
34196148c1 radeonsi/gfx11: use better PRIM_GRP_SIZE_GFX11 setting 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
 2022-08-03 00:57:16 +00:00
Arvind Yadav
1fbc7337a1 radeonsi: Enable nir_lower_point_smooth lowering pass for point smoothing 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15117>
 2022-07-16 07:08:33 -04:00
Marek Olšák
3b36700162 radeonsi: fix random PS wave size 
Fixes: b3b2f97f2e "radeonsi: add Wave32 heuristics and shader profiles"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17410>
 2022-07-09 21:00:51 +00:00