Commit graph

69157 commits

Author SHA1 Message Date
Matt Turner
73f6f9b9be glsl: Factor out a get_mul_type() function.
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-03-31 14:01:15 -07:00
Marcin Ślusarz
f9e2295560 nouveau: synchronize "scratch runout" destruction with the command stream
When nvc0_push_vbo calls nouveau_scratch_done it does not mean
scratch buffers can be freed immediately. It means "when hardware
advances to this place in the command stream the scratch buffers
can be freed".

To fix it, just postpone scratch runout destruction after current
fence is signalled.

The bug existed for a very long time. Nobody noticed, because
"scratch runout" code path is rarely executed.

Fixes hang at the very beginning of first mission in "Serious Sam 3"
on nve7/gk107. It manifested as:

nouveau E[   PFIFO][0000:01:00.0] read fault at 0x000a9e0000 [PTE] from GR/GPC0/PE_2 on channel 0x007f853000 [Sam3[17056]]

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-31 22:04:31 +02:00
Brian Paul
3db0317351 docs: document Viewperf 12 issues
Signed-off-by: Brian Paul <brianp@vmware.com>
2015-03-31 11:50:20 -06:00
Neil Roberts
fe026d7ce5 i965/skl: Avoid using the 1D stencil layout for stencil-only images
Commit cf67ca9ffa made the layouting code pick a special layout for
1D images on Skylake. This should not be used for depth and stencil
buffers because these need to be treated as 2D tiled images. However
the patch was missing a check for images with a base format of
GL_STENCIL_INDEX. In practice I don't think it's currently possible to
hit this because Mesa doesn't support GL_ARB_texture_stencil8 and it's
not possible to create a 1D renderbuffer, but it'll be good to be
ready for when the extension is supported.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-31 18:22:01 +01:00
Tom Stellard
fda7558057 clover: Return CL_BUILD_ERROR for CL_PROGRAM_BUILD_STATUS when compilation fails v2
v2:
  - Don't use _errs map

Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-03-31 15:40:51 +00:00
Tom Stellard
4c53d2acbb radeonsi/compute: Default to the same PIPE_SHADER_CAP values as other shader types v2
v2:
  - Fix typo

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-03-31 15:40:51 +00:00
Leo Liu
a714fbacf7 radeon/vce: implement video usability information support
This will help encoding VUI into the bitstream

v2: make backward compatible

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-03-31 12:31:58 -04:00
Leo Liu
8e3668a7c0 st/omx/enc: export framerate to vce driver
The framerate will be used for video usability info support by VCE driver

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-03-31 12:31:58 -04:00
Roland Scheidegger
489866938f llvmpipe: enable ARB_texture_gather
Just announce support for 4 components.
While here also increase the max/min texel offsets (the limit is completely
artificial, was chosen because that's what other hardware did, however there's
other drivers using larger limits).
Over a thousand little piglits skip->pass.

v2: update docs/GL3.txt

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-31 17:23:51 +02:00
Roland Scheidegger
0753b135f6 gallivm: implement TG4 for ARB_texture_gather
This is quite trivial, essentially just follow all the same code you'd
use with linear min/mag (and no mip) filter, then just skip the filtering
after looking up the texels in favor of direct assignment of the right channel
to the result. (This is though not true for the multi-offset version if we'd
want to support it - for this would probably need to do something along the
lines of 4x nearest sampling due to the necessity of doing coord wrapping
individually per texel.)
Supports multi-channel formats.
From the SM5 gather cap bit, should support non-constant offsets, plus shadow
comparisons (the former untested), but not component selection (should be
easy to implement but all this stuff is not really exposable anyway for now).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-31 17:23:51 +02:00
Roland Scheidegger
73c6914195 gallivm: add gather support to sampler interface
Luckily thanks to the revamped interface this is a lot less work now...

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-31 17:23:51 +02:00
Roland Scheidegger
1863ed21ff gallivm: simplify sampler interface
This has got a bit out of control with more and more parameters added.
Worse, whenever something in there changes all callees have to be updated
for that, even though they don't really do much with any parameter in there
except pass it on to the actual sampling function.
Hence simply put almost everything into a struct. Also instead of relying
on some arguments being NULL, be explicit and set this in a key (which is
just reused for function generation for simplicity). (The code still relies
on them being NULL in the end for now.)
Technically there is a minimal functional change here for shadow sampling:
if shadow sampling is done is now determined explicitly by the texture
function (either sample_c or the gl-style tex func inherit this from target)
instead of the static texture state. These two should always match, however.
Otherwise, it should generate all the same code.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-31 17:23:51 +02:00
Jose Fonseca
0fc5b80e7a util/debug: Update MgwHelp link, drop BfdHelp link. 2015-03-31 09:42:06 +01:00
Michel Dänzer
b8797a7875 gallivm: Fix build against LLVM 3.7 SVN r233648
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-31 15:05:01 +09:00
Eric Anholt
1dcc1ee314 vc4: Drop integer multiplies with 0 to moves of 0.
This cleans up more instructions generated by uniform array indexing
multiplies.

total instructions in shared programs: 39989 -> 39961 (-0.07%)
instructions in affected programs:     896 -> 868 (-3.12%)
2015-03-30 12:57:45 -07:00
Eric Anholt
8c5dcdbccb vc4: Add a constant folding pass.
This cleans up some pointless operations generated by the in-driver mul24
lowering (commonly generated by making a vec4 index for a matrix in a
uniform array).

I could fill in other operations, but pretty much anything else ought to
be getting handled at the NIR level, I think.

total uniforms in shared programs: 13423 -> 13421 (-0.01%)
uniforms in affected programs:     346 -> 344 (-0.58%)
2015-03-30 12:57:45 -07:00
Brian Paul
dbe67d76e0 glsl: allow ForceGLSLVersion to override #version directives
Previously, the ctx->Const.ForceGLSLVersion setting only worked if
the shader lacked a #version directive.  Now, the ForceGLSLVersion
setting will override the #version directive too.

This change should be safe since it should be rare to have an app
that has a mix of shader versions and we only wanted to override
the #version for shaders which lacked the #version directive.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-30 11:25:39 -06:00
Eric Anholt
c519c4d85e vc4: Don't bother masking out the low 24 bits for integer multiplies
The hardware just uses the low 24 lines, saving us an AND to drop the high
bits.

total uniforms in shared programs: 13433 -> 13423 (-0.07%)
uniforms in affected programs:     356 -> 346 (-2.81%)
total instructions in shared programs: 40003 -> 39989 (-0.03%)
instructions in affected programs:     910 -> 896 (-1.54%)
2015-03-30 09:23:39 -07:00
Eric Anholt
5df8bf86fe vc4: Make integer multiply use 24 bits for the low parts.
The hardware uses the low 24 bits in integer multiplies, so we can have
fewer high bits (and so probably drop them more frequently).
2015-03-30 09:23:39 -07:00
Samuel Iglesias Gonsalvez
18004c338f glsl: fail when a shader's input var has not an equivalent out var in previous
GLSL ES 3.00 spec, 4.3.10 (Linking of Vertex Outputs and Fragment Inputs),
page 45 says the following:

"The type of vertex outputs and fragment input with the same name must match,
otherwise the link command will fail. The precision does not need to match.
Only those fragment inputs statically used (i.e. read) in the fragment shader
must be declared as outputs in the vertex shader; declaring superfluous vertex
shader outputs is permissible."
[...]
"The term static use means that after preprocessing the shader includes at
least one statement that accesses the input or output, even if that statement
is never actually executed."

And it includes a table with all the possibilities.

Similar table or content is present in other GLSL specs: GLSL 4.40, GLSL 1.50,
etc but for more stages (vertex and geometry shaders, etc).

This patch detects that case and returns a link error. It fixes the following
dEQP test:

  dEQP-GLES3.functional.shaders.linkage.varying.rules.illegal_usage_1

However, it adds a new regression in piglit because the test hasn't a
vertex shader and it checks the link status.

bin/glslparsertest \
tests/spec/glsl-1.50/compiler/gs-also-uses-smooth-flat-noperspective.geom pass \
1.50 --check-link

This piglit test is wrong according to the spec wording above, so if this patch
is merged it should be updated.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-03-30 13:29:05 +02:00
Michel Dänzer
d64adc3a79 radeonsi: Cache LLVMTargetMachineRef in context instead of in screen
Fixes a crash in genymotion with several threads compiling shaders
concurrently.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89746

Cc: 10.5 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-03-30 15:15:10 +09:00
Tapani Pälli
ce83a6ec81 glsl: fix unreachable(!"") to unreachable("")
Correct error with commit 151fb1e where assert was renamed
to unreachable without removing ! from string argument.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-30 08:16:00 +03:00
Emil Velikov
938b17940f docs: add news item and link release notes for mesa 10.5.2
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-28 19:21:31 +00:00
Emil Velikov
dc8d8a2951 docs: Add sha256 sums for the 10.5.2 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit ff87ae1e00)
2015-03-28 19:21:31 +00:00
Emil Velikov
6e19f6b4d0 Add release notes for the 10.5.2 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 5e59f895c4)
2015-03-28 19:21:31 +00:00
Ilia Mirkin
ee670c9efa freedreno/a3xx: add support for point sprite coordinate replacement
This does not (yet) support different coordinate origins, so the tests
still fail due to fbo flipping.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-28 14:54:41 -04:00
Ilia Mirkin
995f55a6ce freedreno/a3xx: make vs-set point size work
This appears to need the A2XX version of the point list, so select it at
draw time if necessary.

Experimentally, always using the A2XX version causes hangs when PSIZE
isn't actually emitted.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-28 14:54:41 -04:00
Ilia Mirkin
7fc5da8b93 freedreno/a3xx: point size should not be divided by 2
The division is probably a holdover from the days when the fixed point
inline functions generated by headergen were broken.

Also reduce the maximum point size to 4092 (vs 4096), which is what the
blob does.

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-28 14:54:41 -04:00
Ilia Mirkin
738c8319ac freedreno/a3xx: fix 3d texture layout
The SZ2 field contains the layer size of a lower miplevel. It only
contains 4 bits, which limits the maximum layer size it can describe. In
situations where the next miplevel would be too big, the hardware
appears to keep minifying the size until it hits one of that size.
Unfortunately the hardware's ideas about sizes can differ from
freedreno's which can still lead to issues. Minimize those by stopping
to minify as soon as possible.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
2015-03-28 14:54:41 -04:00
Ilia Mirkin
3735643df3 freedreno/a3xx: LAYERSZ2 appears to have no effect on arrays
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-28 14:54:40 -04:00
Kenneth Graunke
72b06fb08e nir: Fix copy and pasted error message in nir_validate.
These are nir_cf_nodes, not ALU instructions.
Also, use unreachable() to preempt said review feedback.

v2: Do it right (thanks Ilia).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-28 09:36:46 -07:00
Kenneth Graunke
31dc63d5ca i965/nir: Use NIR for ARB_vertex_program support on Gen8+.
Everything is already in place; we simply have to take the scalar code
generation path.  This gives us SIMD8 VS programs, instead of SIMD4x2.

v2: Rebase on the patch that drops brw->gen >= 8.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-27 21:16:51 -07:00
Kenneth Graunke
ac69ab7302 i965: Move env_var_as_boolean to intel_debug.c.
I need to use this in brw_vec4.cpp, so it can't be static anymore.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-27 21:16:43 -07:00
Kenneth Graunke
826d3afb8f i965/fs: Add ARB_fragment_program support to the NIR backend.
Use prog_to_nir where we would normally call glsl_to_nir, handle program
parameter lists, and skip a few things that don't exist.

Using NIR generates much better shader code than Mesa IR, since we get
real optimizations, as opposed to prog_optimize:

total instructions in shared programs: 314007 -> 279892 (-10.86%)
instructions in affected programs:     285173 -> 251058 (-11.96%)
helped:                                2001
HURT:                                  67
GAINED:                                4
LOST:                                  7

v2: Change early return in nir_setup_uniforms to if/else (Jordan).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-27 21:16:34 -07:00
Kenneth Graunke
bf2c3bc316 nir: Lower subtraction to add with negation when !lower_negate.
prog->nir will generate fsub opcodes, but i965 doesn't implement them.
We may as well lower them at the NIR level, since it's trivial to do.

Suggested by Connor Abbott.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-03-27 21:16:34 -07:00
Kenneth Graunke
faf6106c6f nir: Implement a Mesa IR -> NIR translator.
Shamelessly ripped off from Eric Anholt's tgsi_to_nir pass.

This is not built on SCons, like the rest of NIR.

v2:
- Delete redundant c->s, c->impl, and c->cf_node_list pointers (Ken)
- Use nir_builder directly instead of ptn_compile in more places (Ken)
- Drop 'struct' keyword in front of nir_builder (ken)
- Add a file level Doxygen comment (Ken)
- Use scalar constants instead of splatting (Eric)
- Use nir_builder helpers for constants, moves, and swizzles (Connor)

v3: Minor indentation improvements.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-03-27 21:16:34 -07:00
Kenneth Graunke
06f7bea96a nir: Add builder helpers for MOVs with ALU sources and swizzling MOVs.
These will be useful for prog->nir and tgsi->nir.

v2: Don't forget to mark nir_swizzle as inline (Eric).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-03-27 21:16:33 -07:00
Kenneth Graunke
75c922e0fe nir: Add nir_builder helpers for creating load_const intrinsics.
Both prog->nir and tgsi->nir will want to use these.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-03-27 21:16:33 -07:00
Ben Widawsky
74fd226e34 i965/skl: Don't use the PMA depth stall workaround
The PMA depth stall must be enabled (optimization turned off) under certain
circumstances on gen8. This was supposedly fixed for Gen9, which means we do not
need to check, or toggle the state. The hardware is supposed to enable the
hardware optimization by default, unlike BDW, so we also don't need to set it at
init. For whatever reason this improves stability on ETQW with the bug mentioned
below.

References: https://bugs.freedesktop.org/show_bug.cgi?id=89039 (doesn't fix)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Anuj Phogat <anuj.phogat@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-27 21:04:41 -07:00
Ben Widawsky
9d32d35850 i965/skl: Disable partial resolve in VC
Recomendation [sic] is to set this field to 1 always. Programming it to default
value of 0, may have -ve impact on performance for MSAA WLs.

Another don't suck bit which needs to get set.

The patch wasn't as well tested as I would have liked, primarily I don't have
perf numbers for it, but it's getting to a point where it is in danger of being
lost.

v2: v1 was a mix of two patches. Since 0x7004 is masked, we only need to set it
once at initialization and make sure the pma workaround doesn't set the mask bit
(which it doesn't).
Move LRI to init gpu state (Ken)
Add a comment.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-27 21:04:37 -07:00
Roland Scheidegger
b2424fb030 llvmpipe: simplify address calculation for 4x4 blocks
These functions looked quite complicated, even though what they actually did
was trivial (ever since we dropped swizzled rendering). Also drop lookup of
format block per bytes done for each block, and do it once per scene instead.
This improves everybody's favorite "benchmark" by 3% or so, though
lp_rast_shade_quads_all() which calls this shows up still quite high for a
function which does little more than call the jit function.
(This would most likely be much better handled by the jit function itself,
the strides are passed through anyway already, though for being able to
handle layers it would definitely add some complexity.)

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-28 02:59:42 +01:00
Roland Scheidegger
764fc2be5a gallivm: fix texture function name (key) when using txf/ld
When using the texel fetch functions rather than ordinary texturing,
the arguments are all int vecs instead of float vecs, not to mention
the actual function would look completely different. Hence this must
be included in the texture function name (which serves as the key)
otherwise things crash badly when a shader accesses the same texture
and sampler unit with both txf/ld and ordinary texturing instructions
with otherwise matching keys.
2015-03-28 02:58:43 +01:00
Timothy Arceri
2cb149c289 glsl: mark uniform and input interface blocks as read only
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-28 10:18:40 +11:00
Ilia Mirkin
58030a8f99 nv50/ir/gk110: fix offset flag position for TXD opcode
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-27 19:02:19 -04:00
Ilia Mirkin
49b86007aa nv50/ir: take postFactor into account when doing peephole optimizations
Multiply operations can have a post-factor on them, which other ops
don't support. Only perform the peephole optimizations when there is no
post-factor involved.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89758
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-27 19:02:19 -04:00
Jan Vesely
a99a16a0cf gallivm: Fix build since llvm r233411
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-03-27 18:57:02 -04:00
Eric Anholt
afa9fc1561 nir: Add optional lowering of flrp.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-27 13:29:48 -07:00
Roland Scheidegger
56076be2ac gallivm: use llvm function calls for texturing instead of inlining
There are issues with inlining everything, most notably llvm will use much
more memory (and be slower) when compiling. Ideally we'd probably use
functions for shader functions too but texture sampling usually is responsible
for quite some IR (it can easily reach 80% of total IR instructions) so this
seems like a good start.
This still generates a different function for all different combinations just
like before, however it is possible llvm is missing some optimization
opportunities - it is believed though such opportunities should be somewhat
rare, but at least for now it can still be switched off (at compile time only).
It should probably make compiled code also smaller because the same function
should be used for different variants in the same module (so for the
opaque/partial or linear/elts variants).
No piglit change (though it does indeed speed up unrealistic tests like
fp-indirections2 by a factor of 30 or so).
Has a small negative performance impact in openarena - I suspect this could
be fixed by running some IPO passes (despite the private linkage, llvm right
now does NO optimization at all wrt anything going past the call, even if
there's just one caller - so things like values stored before the call and then
always written by the function etc. will not be optimized away, nor will dead
arguments (which we mostly shouldn't have) be eliminated, always constant
arguments promoted etc.).

v2: use proper return values instead of pointer function arguments.
llvm supports aggregate return values, which do wonders here eliminating
unnecessary stack variables - everything in fact will be returned in registers
even without any IPO optimizations. It makes the code simpler too.
With this I could not measure a peformance impact in openarena any longer
(though since there's still no constant value propagation etc. into the tex
functions this does not mean it couldn't have a negative impact elsewhere).

v3: fix some minor issues suggested by Jose, and do disassembly (and the
profiling) without hacks.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-27 19:25:53 +01:00
Roland Scheidegger
8dad9455ff gallivm: pass jit_context pointer through to sampling
The callbacks used for getting the dynamic texture/sampler state were using
the jit_context from the generated jit function. This works just fine, however
that way it's impossible to generate separate functions for texture sampling,
as will be done in the next commit. Hence, pass this pointer through all
interfaces so it can be passed to a separate function (technically, it would
probably be possible to extract this pointer from the current function instead,
but this feels hacky and would probably require some more hacks if we'd use
real functions instead of inlining all shader functions at some point).
There should be no difference in the generated code for now.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-27 19:25:53 +01:00
Christian König
787aa26cb7 gallium/vl: partially revert "Use util_cpu_to_le{16,32} in many more places."
The data in memory is in big endian format and needs to be converted
into CPU byte order. So the patch actually reversed what needs to be done.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-27 11:30:32 +01:00