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Author SHA1 Message Date
Connor Abbott
964e84d468 tu: Fix 3d load and clear when FDM bin offsets are in use 
Unlike the store/resolve that uses A2D, The FDM load path uses the 3d
pipeline and is therefore affected by the hardware FDM offset registers.
The fallback sysmem clear path also uses the 3d pipeline. Subtract off
the HW offset from the destination coordinates, similar to how it is
subtracted from viewport and scissor.

Fixes: b34b089ca1 ("tu: Use GRAS bin offset registers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37496>
 2025-09-22 15:17:39 +00:00
Calder Young
c5acf58fba anv: Add support for AV1 film grain sythesis on Xe2+ 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37351>
 2025-09-22 14:41:48 +00:00
Calder Young
1e8b96c40c anv: Advertise only OUTPUT_COINCIDE_BIT for AV1 video decoding 
Intel HW does not support separate destination and reference output pictures
when decoding AV1 video. The only exception is film grain, which the Vulkan
spec already includes a caveat for.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37351>
 2025-09-22 14:41:48 +00:00
Simon Perretta
f952e27d6e docs/pvr: drop GX6250 from the active development hardware list 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:06 +01:00
Simon Perretta
106de39310 pvr/wsi: don't advertise supports_modifiers 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Reported-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:06 +01:00
Simon Perretta
916d51bd06 pvr: merge legacy uscgen code into pvr_usc 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:05 +01:00
Simon Perretta
1dca740171 pco: switch to using csbgen and clc helpers for tex/smp state {un,}packing 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:05 +01:00
Simon Perretta
7b7fb811ab pvr, pco: switch to clc load/store sr and idfwdf shaders 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:05 +01:00
Simon Perretta
936cf5fb83 pco/usclib: disable predicate control-flow in generated shaders 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:05 +01:00
Simon Perretta
825c4443bf pvr: switch to usc generated spm load shaders 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:05 +01:00
Simon Perretta
585cca9b2f pvr, pco: switch to usc generated zero-init workgroup memory shaders 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:05 +01:00
Simon Perretta
c2127bf4f7 pvr, pco: switch to usc generated clear attachment shaders 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:04 +01:00
Simon Perretta
6dd0a5ee2d pvr, pco: switch to clc query shaders 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:04 +01:00
Simon Perretta
3fd3d7ee69 pvr, pco: switch to clc vertex passthrough shaders 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:04 +01:00
Simon Perretta
6100c5287a pco/usclib: add some preprocessor helper macros 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:04 +01:00
Simon Perretta
fd130c5d8b pvr, pco: switch to clc nop shader 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:04 +01:00
Simon Perretta
98814d343d pvr, pco: switch to clc state update shader 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:04 +01:00
Simon Perretta
2b21ec6cd2 pco: move uses_usclib flag into shader data 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:04 +01:00
Simon Perretta
61a7a5958d pco/usclib: switch to common defs 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:03 +01:00
Simon Perretta
116d8573d4 pvr/csbgen: use stdint macro for unsigned 64-bit constants 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:03 +01:00
Simon Perretta
e8adfa1241 pvr, pco: enable pre-generated header string functions to work with clc 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:03 +01:00
Simon Perretta
7855446a51 pco: store additional metadata for precompiled shaders 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:03 +01:00
Simon Perretta
96e4026273 nir: print loop unroll info if present 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
 2025-09-22 14:52:03 +01:00
Lucas Fryzek
6e29e13e78 anv: Update viewport/scissor state when count changes
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We need to ensure that HW viewport and scissor state is updated when
just the count is updated.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37487>
 2025-09-22 13:28:25 +00:00
Zan Dobersek
d3cedd2fa5 tu/drm: msm's has_set_iova codepath should avoid freeing zombified tu_sparse_vma 
In msm backend's has_set_iova codepath, mapping a BO into a lazy VMA will
require moving that VMA into the zombie VMA mechanism once the BO is
destroyed. That means tu_sparse_vma destruction should avoid freeing VMA if
BO was mapped into it and then zombified.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Fixes: 764b3d9161 ("tu: Implement transient attachments and lazily allocated memory")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37413>
 2025-09-22 13:05:34 +00:00
Zan Dobersek
64fc91bb58 tu/drm: msm backend shouldn't use util_vma_heap in the !has_set_iova codepaths 
For the fallback !has_set_iova codepath, util_vma_heap shouldn't be used
for freeing allocations since it's not initialized or used for allocations.

A helper tu_free_iova() function is added to complement tu_allocate_iova(),
handling the vma lock and freeing the allocation in the util_vma_heap when
appropriate.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Fixes: 93a80f4bb9 ("tu/drm: Split out iova allocation and BO allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37413>
 2025-09-22 13:05:34 +00:00
Zan Dobersek
07a599ff3e tu/drm: avoid has_set_iova-specific util_vma_heap freeing in tu_bo_init 
After the refactoring, tu_bo_init() is not allocating iova anymore so it
should also not free the util_vma_heap allocation for the has_set_iova
case.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Fixes: 93a80f4bb9 ("tu/drm: Split out iova allocation and BO allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37413>
 2025-09-22 13:05:33 +00:00
Natalie Vock
f0d3d0ad21 aco/scheduler: Bail early on unreorderable instructions
Some checks are pending
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37212>
 2025-09-22 11:13:50 +00:00
Seán de Búrca
53040a1600 rusticl/kernel: remove mutexes from kernel structure 
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37354>
 2025-09-22 10:57:46 +00:00
Seán de Búrca
c440beb171 rusticl/kernel: add Kernel::mut_ref_from_raw() 
The OpenCL spec indicates that functions which modify `cl_kernel` are
not thread-safe, allowing us to handle those functions with standard
mutability.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37354>
 2025-09-22 10:57:46 +00:00
Ali, Nawwar
c75cb1233c amd/vpelib: add FL capabilitie and lut container size 
[WHY]
get a clear definition of fastload support and actual 3d lut
container size

[HOW]
Added related code

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Nawwar Ali <Nawwar.Ali@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37504>
 2025-09-22 10:37:22 +00:00
Nagulendran, Iswara
1cd047c958 amd/vpelib: Handle Destination Rect with zero dimensions 
[Why]
Route case where dest rect has
zero dimensions to perform background
color fill.

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Iswara Nagulendran <Iswara.Nagulendran@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37504>
 2025-09-22 10:37:22 +00:00
Assadian, Navid
4c96e8c352 amd/vpelib: Add new colors to visual confirm 
[WHY]
Newly added formats require distinct colors for proper differentiation.

[HOW]
Add new colors, pairwise distinguishable for newly added formats.

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Navid Assadian <Navid.Assadian@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37504>
 2025-09-22 10:37:21 +00:00
swscm, z1
d79665066d amd/vpelib: Ensures type-safe comparison for callback assignment 
[WHY & How]
Ensures type-safe comparison for the sys_event callback assignment by
casting the NULL constant to the appropriate function pointer type.

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Muhammad Ansari <Muhammad.Ansari@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37504>
 2025-09-22 10:37:21 +00:00
Zhao, Jiali
237ab0778e amd/vpelib: Create Function to Check for Blending Feature 
[HOW]
Created check_blending_support function and condition to check for
readable purpose

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Zhao, Jiali <Jiali.Zhao@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37504>
 2025-09-22 10:37:21 +00:00
Karol Herbst
6f41c62720 rusticl/mesa: make PipeScreen refcounted 
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37377>
 2025-09-22 10:16:13 +00:00
Karol Herbst
501f59e159 rusticl/mesa: make PipeScreen transparent 
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37377>
 2025-09-22 10:16:13 +00:00
Karol Herbst
f7fcd7ed5d rusticl/mesa: rework Context creation 
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37377>
 2025-09-22 10:16:12 +00:00
Karol Herbst
6a71ecaad7 rusticl/mesa: add PipeScreen::pipe 
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37377>
 2025-09-22 10:16:11 +00:00
Karol Herbst
b67be5d829 rusticl/util: make ThreadSafeCPtr Copy, Clone and transparent 
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37377>
 2025-09-22 10:16:11 +00:00
Qiang Yu
d52452a486 glsl: allow barrier builtin functions for mesh shader
Some checks are pending
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Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:50 +00:00
Qiang Yu
9ffbf9f96b glsl: translate mesa stage for mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:50 +00:00
Qiang Yu
ecb1322737 glsl: flat qualifier is not needed for per primitive IO 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:50 +00:00
Qiang Yu
521aa2e010 glsl: no xfb buffer qualifier for mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:50 +00:00
Qiang Yu
8c58bd5acf glsl: lower shared and task playload for mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:49 +00:00
Qiang Yu
2b76809dfc glsl: handle explicit location for mesh shader 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:49 +00:00
Qiang Yu
bd365d1d2a glsl: handle mesh shader when optimize varying 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:49 +00:00
Qiang Yu
6176b85d2c glsl: add mesh pipeline varying linkage 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:48 +00:00
Qiang Yu
6e41854f1d glsl: pack varying limit check code into functions 
To be shared with mesh shader linkage.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:48 +00:00
Qiang Yu
59f1186af2 glsl: pack vertex pipeline varying linkage into a function 
No functional change, prepare for add mesh pipeline varying
linking.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36405>
 2025-09-22 02:19:48 +00:00