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pvr, pco: switch to clc load/store sr and idfwdf shaders

Browse source 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37439>
This commit is contained in:
Simon Perretta 2025-08-13 09:23:09 +01:00
parent 936cf5fb83
commit 7b7fb811ab
21 changed files with 382 additions and 586 deletions
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15
src/compiler/nir/nir_intrinsics.py
View file

@ -1363,6 +1363,9 @@ load("preamble", [], indices=[BASE, PREAMBLE_CLASS],
flags=[CAN_ELIMINATE, CAN_REORDER])
store("preamble", [], indices=[BASE, PREAMBLE_CLASS])
# src[] = { value, offset }.
store("preamble_dynamic", [1], indices=[PREAMBLE_CLASS])
# A 64-bit bitfield indexed by I/O location storing 1 in bits corresponding to
# varyings that have the flat interpolation specifier in the fragment shader and
# 0 otherwise
@ -2771,11 +2774,19 @@ intrinsic("frag_store_pco", src_comp=[1], indices=[BASE], bit_sizes=[32])
# dma_ld_pco(address)
intrinsic("dma_ld_pco", src_comp=[2], dest_comp=0, flags=[CAN_ELIMINATE], bit_sizes=[32])
# dma_st_pco(address_data)
intrinsic("dma_st_pco", src_comp=[0], bit_sizes=[32])
# dma_st_pco(address_data, emit_idf)
intrinsic("dma_st_pco", src_comp=[0], indices=[FLAGS], bit_sizes=[32])
# dma_st_tiled_pco(address_data, valid_mask)
intrinsic("dma_st_tiled_pco", src_comp=[3, 1], bit_sizes=[32])
# load_tiled_offset_pco(component, is_store)
intrinsic("load_tiled_offset_pco", dest_comp=1, indices=[COMPONENT, FLAGS], bit_sizes=[32])
intrinsic("load_shared_reg_alloc_size_pco", dest_comp=1, bit_sizes=[32])
# dma_ld_shregs_pco(address, burst_len, shreg_offset)
intrinsic("dma_ld_shregs_pco", src_comp=[2, 1, 1], bit_sizes=[32])
# dma_st_shregs_pco(address, burst_len, shreg_offset, emit_idf)
intrinsic("dma_st_shregs_pco", src_comp=[2, 1, 1], indices=[FLAGS], bit_sizes=[32])

27
src/imagination/common/pvr_iface.h
View file

@ -101,4 +101,31 @@ enum pvr_spm_load_data {
_PVR_SPM_LOAD_DATA_COUNT = 50,
};
/** Load/store sr shader data; vertex input registers. */
enum pvr_load_store_sr_data {
PVR_LOAD_STORE_SR_DATA_SIZE_ADDR_LO,
PVR_LOAD_STORE_SR_DATA_SIZE_ADDR_HI,
PVR_LOAD_STORE_SR_DATA_STORE_ADDR_LO,
PVR_LOAD_STORE_SR_DATA_STORE_ADDR_HI,
_PVR_LOAD_STORE_SR_DATA_COUNT,
};
/** IDFWDF shader data; shared registers. */
enum pvr_idfwdf_sr_data {
PVR_IDFWDF_DATA_TEX = 0,
PVR_IDFWDF_DATA_SMP = 4,
PVR_IDFWDF_DATA_ADDR_LO,
PVR_IDFWDF_DATA_ADDR_HI,
_PVR_IDFWDF_DATA_COUNT,
};
#define PVR_IDFWDF_TEX_FORMAT VK_FORMAT_R32G32B32A32_SFLOAT
#define PVR_IDFWDF_TEX_WIDTH 4U
#define PVR_IDFWDF_TEX_HEIGHT 2U
#define PVR_IDFWDF_TEX_STRIDE 4U
#endif /* PVR_IFACE_H */

2
src/imagination/include/hwdef/rogue_hw_defs.h
View file

@ -113,8 +113,6 @@
*/
#define ROGUE_LLS_SHARED_REGS_RESERVE_SIZE 48U
#define ROGUE_USC_TASK_PROGRAM_SIZE 512U
#define ROGUE_CSRM_LINE_SIZE_IN_DWORDS (64U * 4U * 4U)
/* The maximum amount of local memory which can be allocated by a single kernel

60
src/imagination/pco/pco_map.py
View file

@ -1375,6 +1375,20 @@ encode_map(O_ST,
op_ref_maps=[('backend', [], [['s0', 's1', 's2', 's3', 's4', 's5'], 'imm', 'drc', 'imm', ['s0', 's1', 's2', 's3', 's4', 's5'], ['s0', 's1', 's2', 's3', 's4', 's5', '_']])]
)
encode_map(O_ST_REGBL,
encodings=[
(I_ST_REGBL, [
('drc', ('pco_ref_get_drc', SRC(2))),
('srcseladd', ('pco_ref_srcsel', SRC(4))),
('srcselbl', ('pco_ref_srcsel', SRC(3))),
('cachemode_st', OM_MCU_CACHE_MODE_ST),
('srcseldata', ('pco_ref_srcsel', SRC(0))),
('dsize', ('pco_ref_get_imm', SRC(1)))
])
],
op_ref_maps=[('backend', [], [['s0', 's1', 's2', 's3', 's4', 's5'], 'imm', 'drc', ['s0', 's1', 's2', 's3', 's4', 's5'], ['s0', 's1', 's2', 's3', 's4', 's5'], ['s0', 's1', 's2', 's3', 's4', 's5', '_']])]
)
encode_map(O_ST_TILED,
encodings=[
(I_ST_IMMBL_TILED, [
@ -1390,6 +1404,16 @@ encode_map(O_ST_TILED,
op_ref_maps=[('backend', [], [['s0', 's1', 's2', 's3', 's4', 's5'], 'imm', 'drc', 'imm', ['s0', 's1', 's2', 's3', 's4', 's5'], ['s0', 's1', 's2', 's3', 's4', 's5', '_']])]
)
encode_map(O_IDF,
encodings=[
(I_IDF, [
('drc', ('pco_ref_get_drc', SRC(0))),
('srcseladd', ('pco_ref_srcsel', SRC(1)))
])
],
op_ref_maps=[('backend', [], ['drc', ['s0', 's1', 's2', 's3', 's4', 's5']])]
)
encode_map(O_ATOMIC,
encodings=[
(I_ATOMIC, [
@ -2680,13 +2704,32 @@ group_map(O_ST32,
('atom', OM_ATOM),
('rpt', 1)
]),
enc_ops=[('backend', O_ST, [], [SRC(0), 'pco_ref_imm8(PCO_DSIZE_32BIT)', SRC(1), SRC(2), SRC(3), SRC(4)], [(OM_MCU_CACHE_MODE_ST, OM_MCU_CACHE_MODE_ST)])],
enc_ops=[('backend', O_ST, [], [SRC(0), 'pco_ref_imm8(PCO_DSIZE_32BIT)', SRC(1), SRC(2), SRC(3), SRC(4)], [(OM_MCU_CACHE_MODE_ST, OM_MCU_CACHE_MODE_ST), (OM_IDF, OM_IDF)])],
srcs=[
('s[0]', ('backend', SRC(0)), 's0'),
('s[3]', ('backend', SRC(4)), 's3')
]
)
group_map(O_ST32_REGBL,
hdr=(I_IGRP_HDR_MAIN, [
('oporg', 'be'),
('olchk', OM_OLCHK),
('w1p', False),
('w0p', False),
('cc', OM_EXEC_CND),
('end', OM_END),
('atom', OM_ATOM),
('rpt', 1)
]),
enc_ops=[('backend', O_ST_REGBL, [], [SRC(0), 'pco_ref_imm8(PCO_DSIZE_32BIT)', SRC(1), SRC(2), SRC(3), SRC(4)], [(OM_MCU_CACHE_MODE_ST, OM_MCU_CACHE_MODE_ST), (OM_IDF, OM_IDF)])],
srcs=[
('s[0]', ('backend', SRC(0)), 's0'),
('s[2]', ('backend', SRC(3)), 's2'),
('s[3]', ('backend', SRC(4)), 's3')
]
)
group_map(O_ST_TILED,
hdr=(I_IGRP_HDR_MAIN, [
('oporg', 'be'),
@ -2706,6 +2749,21 @@ group_map(O_ST_TILED,
]
)
group_map(O_IDF,
hdr=(I_IGRP_HDR_MAIN, [
('oporg', 'be'),
('olchk', OM_OLCHK),
('w1p', False),
('w0p', False),
('cc', OM_EXEC_CND),
('end', OM_END),
('atom', OM_ATOM),
('rpt', 1)
]),
enc_ops=[('backend', O_IDF)],
srcs=[('s[0]', ('backend', SRC(1)), 's0')]
)
group_map(O_IADD32_ATOMIC,
hdr=(I_IGRP_HDR_MAIN, [
('oporg', 'p0_p1'),

10
src/imagination/pco/pco_ops.py
View file

@ -352,6 +352,8 @@ OM_OFFSET_SD = op_mod_enum('offset_sd', [
'dest',
])
OM_IDF = op_mod('idf', BaseType.bool)
# Ops.
OM_ALU = [OM_OLCHK, OM_EXEC_CND, OM_END, OM_ATOM, OM_RPT]
@ -403,11 +405,14 @@ O_FITRP = hw_op('fitrp', [OM_EXEC_CND, OM_END, OM_ITR_MODE, OM_SAT], 1, 4)
O_LD = hw_op('ld', OM_ALU_RPT1 + [OM_MCU_CACHE_MODE_LD], 1, 3)
O_LD_REGBL = hw_op('ld.regbl', OM_ALU_RPT1 + [OM_MCU_CACHE_MODE_LD], 1, 3)
O_ST = hw_direct_op('st', [OM_MCU_CACHE_MODE_ST], 0, 6)
O_ST = hw_direct_op('st', [OM_MCU_CACHE_MODE_ST, OM_IDF], 0, 6)
O_ST_REGBL = hw_direct_op('st.regbl', [OM_MCU_CACHE_MODE_ST, OM_IDF], 0, 6)
# { data, data size, drc, chans, addr, cov_msk}
O_ST_TILED = hw_op('st.tiled', OM_ALU_RPT1 + [OM_MCU_CACHE_MODE_ST], 0, 6)
O_IDF = hw_op('idf', OM_ALU_RPT1, 0, 2)
O_ATOMIC = hw_op('atomic', [OM_OLCHK, OM_EXEC_CND, OM_END, OM_ATOM_OP], 1, 2)
O_SMP = hw_op('smp', OM_ALU_RPT1 + [OM_DIM, OM_PROJ, OM_FCNORM, OM_NNCOORDS,
@ -485,7 +490,8 @@ O_IADD32 = hw_op('iadd32', OM_ALU + [OM_S], 1, 3, [], [[RM_ABS, RM_NEG], [RM_ABS
O_IMUL32 = hw_op('imul32', OM_ALU + [OM_S], 1, 3, [], [[RM_ABS, RM_NEG], [RM_ABS, RM_NEG]])
O_TSTZ = hw_op('tstz', OM_ALU + [OM_TST_TYPE_MAIN], 2, 1, [], [[RM_ELEM]])
O_ST32 = hw_op('st32', OM_ALU_RPT1 + [OM_MCU_CACHE_MODE_ST], 0, 5)
O_ST32 = hw_op('st32', OM_ALU_RPT1 + [OM_MCU_CACHE_MODE_ST, OM_IDF], 0, 5)
O_ST32_REGBL = hw_op('st32.regbl', OM_ALU_RPT1 + [OM_MCU_CACHE_MODE_ST, OM_IDF], 0, 5)
# [vec3 for store], [data, offset, base_addr_lo, base_addr_hi]
O_SPILL = hw_op('spill', OM_ALU_RPT1, 1, 4)

5
src/imagination/pco/pco_opt.c
View file

@ -582,6 +582,11 @@ static inline bool instr_has_side_effects(pco_instr *instr)
case PCO_OP_FDSX:
case PCO_OP_FDSY:
/* TODO: we don't really want to mark this as having side-effects, but
* idfwdf does smp without using the results.
*/
case PCO_OP_SMP:
case PCO_OP_IADD32_ATOMIC:
case PCO_OP_XCHG_ATOMIC:
case PCO_OP_CMPXCHG_ATOMIC:

11
src/imagination/pco/pco_schedule.c
View file

@ -30,11 +30,22 @@ bool pco_schedule(pco_shader *shader)
pco_foreach_func_in_shader (func, shader) {
pco_foreach_instr_in_func_safe (instr, func) {
if (instr->op == PCO_OP_WDF || instr->op == PCO_OP_IDF)
continue;
pco_foreach_instr_src (psrc, instr) {
if (!pco_ref_is_drc(*psrc))
continue;
b = pco_builder_create(func, pco_cursor_after_instr(instr));
if ((instr->op == PCO_OP_ST32 || instr->op == PCO_OP_ST32_REGBL) &&
pco_instr_get_idf(instr)) {
pco_ref addr = pco_ref_chans(instr->src[3], 2);
pco_idf(&b, *psrc, addr);
pco_instr_set_idf(instr, false);
}
pco_wdf(&b, *psrc);
progress = true;

79
src/imagination/pco/pco_trans_nir.c
View file

@ -1756,6 +1756,29 @@ static pco_instr *trans_intr(trans_ctx *tctx, nir_intrinsic_instr *intr)
.rpt = pco_ref_get_chans(dest));
break;
case nir_intrinsic_store_preamble:
instr = pco_mov(&tctx->b,
pco_ref_hwreg_vec(nir_intrinsic_base(intr),
PCO_REG_CLASS_SHARED,
pco_ref_get_chans(src[0])),
src[0],
.rpt = pco_ref_get_chans(src[0]));
break;
case nir_intrinsic_store_preamble_dynamic: {
unsigned idx_reg_num = 0;
pco_ref idx_reg =
pco_ref_hwreg_idx(idx_reg_num, idx_reg_num, PCO_REG_CLASS_INDEX);
pco_mov(&tctx->b, idx_reg, src[1]);
pco_ref dest = pco_ref_hwreg(0, PCO_REG_CLASS_SHARED);
dest = pco_ref_hwreg_idx_from(idx_reg_num, dest);
instr = pco_mov(&tctx->b, dest, src[0], .rpt = pco_ref_get_chans(src[0]));
break;
}
case nir_intrinsic_load_push_constant:
instr =
trans_load_common_store(tctx,
@ -1845,6 +1868,7 @@ static pco_instr *trans_intr(trans_ctx *tctx, nir_intrinsic_instr *intr)
case nir_intrinsic_dma_st_pco: {
unsigned chans = pco_ref_get_chans(src[0]) - 2;
unsigned flags = nir_intrinsic_flags(intr);
pco_ref data_comp =
pco_ref_new_ssa(tctx->func, pco_ref_get_bits(src[0]), chans);
@ -1855,7 +1879,54 @@ static pco_instr *trans_intr(trans_ctx *tctx, nir_intrinsic_instr *intr)
pco_ref_drc(PCO_DRC_0),
pco_ref_imm8(chans),
src[0],
pco_ref_null());
pco_ref_null(),
.idf = !!flags);
break;
}
case nir_intrinsic_dma_ld_shregs_pco: {
pco_ref addr = src[0];
pco_ref burst_len = src[1];
pco_ref dynsrc_offset = src[2];
unsigned idx_reg_num = 0;
pco_ref idx_reg =
pco_ref_hwreg_idx(idx_reg_num, idx_reg_num, PCO_REG_CLASS_INDEX);
pco_mov(&tctx->b, idx_reg, dynsrc_offset);
pco_ref dest = pco_ref_hwreg(0, PCO_REG_CLASS_SHARED);
dest = pco_ref_hwreg_idx_from(idx_reg_num, dest);
instr =
pco_ld_regbl(&tctx->b, dest, pco_ref_drc(PCO_DRC_0), burst_len, addr);
break;
}
case nir_intrinsic_dma_st_shregs_pco: {
pco_ref addr = src[0];
pco_ref burst_len = src[1];
pco_ref dynsrc_offset = src[2];
unsigned flags = nir_intrinsic_flags(intr);
unsigned idx_reg_num = 0;
pco_ref idx_reg =
pco_ref_hwreg_idx(idx_reg_num, idx_reg_num, PCO_REG_CLASS_INDEX);
pco_mov(&tctx->b, idx_reg, dynsrc_offset);
pco_ref data = pco_ref_hwreg(0, PCO_REG_CLASS_SHARED);
data = pco_ref_hwreg_idx_from(idx_reg_num, data);
instr = pco_st32_regbl(&tctx->b,
data,
pco_ref_drc(PCO_DRC_0),
burst_len,
addr,
pco_ref_null(),
.idf = !!flags);
break;
}
@ -2001,6 +2072,12 @@ static pco_instr *trans_intr(trans_ctx *tctx, nir_intrinsic_instr *intr)
pco_ref_hwreg(PCO_SR_INST_NUM, PCO_REG_CLASS_SPEC));
break;
case nir_intrinsic_load_shared_reg_alloc_size_pco:
instr = pco_mov(&tctx->b,
dest,
pco_ref_hwreg(PCO_SR_SH_ALLOC_SIZE, PCO_REG_CLASS_SPEC));
break;
case nir_intrinsic_load_sample_id:
instr = pco_mov(&tctx->b,
dest,

114
src/imagination/pco/usclib/common.cl
View file

@ -74,7 +74,7 @@ cs_query_availability_common(void)
uint2 avail_addr = nir_uadd64_32(avail_base_addr_lo, avail_base_addr_hi, offset * sizeof(uint32_t));
nir_dma_st_pco(avail_addr, ~0U);
nir_dma_st_pco(false, avail_addr, ~0U);
}
}
@ -111,9 +111,9 @@ cs_query_copy_common(void)
/* TODO: for 64/32-bit writes, just prep the 64-bit one and set the burst-length variably. */
if (flags & VK_QUERY_RESULT_64_BIT) {
/* TODO: check if data should be (result, 0) or (0, result) */
nir_dma_st_pco(dest_addr, result, 0);
nir_dma_st_pco(false, dest_addr, result, 0);
} else {
nir_dma_st_pco(dest_addr, result);
nir_dma_st_pco(false, dest_addr, result);
}
}
@ -121,10 +121,10 @@ cs_query_copy_common(void)
if (flags & VK_QUERY_RESULT_64_BIT) {
dest_addr = nir_uadd64_32(dest_addr.x, dest_addr.y, sizeof(uint64_t));
/* TODO: check if data should be (available, 0) or (0, available) */
nir_dma_st_pco(dest_addr, available, 0);
nir_dma_st_pco(false, dest_addr, available, 0);
} else {
dest_addr = nir_uadd64_32(dest_addr.x, dest_addr.y, sizeof(uint32_t));
nir_dma_st_pco(dest_addr, available);
nir_dma_st_pco(false, dest_addr, available);
}
}
}
@ -145,9 +145,109 @@ cs_query_reset_common(void)
if (index < index_count) {
uint2 result_addr = nir_uadd64_32(result_base_addr_lo, result_base_addr_hi, index * sizeof(uint32_t));
nir_dma_st_pco(result_addr, 0);
nir_dma_st_pco(false, result_addr, 0);
uint2 avail_addr = nir_uadd64_32(avail_base_addr_lo, avail_base_addr_hi, index * sizeof(uint32_t));
nir_dma_st_pco(avail_addr, 0);
nir_dma_st_pco(false, avail_addr, 0);
}
}
static inline void
load_store_sr(uint block_size_dw,
bool store,
bool use_loaded_size,
bool use_temp_storage)
{
/* static_assert(!use_temp_storage || (!store && block_size_dw == 16), "Invalid arguments."); */
uint size_addr_lo = nir_load_vtxin_pco(1, PVR_LOAD_STORE_SR_DATA_SIZE_ADDR_LO);
uint size_addr_hi = nir_load_vtxin_pco(1, PVR_LOAD_STORE_SR_DATA_SIZE_ADDR_HI);
uint2 size_addr = (uint2)(size_addr_lo, size_addr_hi);
/* Load the allocation size in 16 dword blocks. */
uint alloc_size_16dw = !store && use_loaded_size ?
nir_dma_ld_pco(1, size_addr) :
nir_load_shared_reg_alloc_size_pco();
/* Store the allocation size in 16 dword blocks. */
if (store)
nir_dma_st_pco(true, size_addr, alloc_size_16dw);
if (alloc_size_16dw) {
uint store_addr_lo = nir_load_vtxin_pco(1, PVR_LOAD_STORE_SR_DATA_STORE_ADDR_LO);
uint store_addr_hi = nir_load_vtxin_pco(1, PVR_LOAD_STORE_SR_DATA_STORE_ADDR_HI);
uint2 store_addr = (uint2)(store_addr_lo, store_addr_hi);
/* TODO: if multicore, offset store_addr accordingly. */
uint size_remaining_dw = alloc_size_16dw * 16;
uint offset = 0;
while (size_remaining_dw) {
uint burst_len = size_remaining_dw;
if (size_remaining_dw > block_size_dw)
burst_len = block_size_dw == 1024 ? 0 : block_size_dw;
if (store) {
nir_dma_st_shregs_pco(store_addr, burst_len, offset, true);
} else if (use_temp_storage) {
uint16 temp = nir_dma_ld_pco(16, store_addr);
for (unsigned u = 0; u < 16; ++u)
nir_store_preamble_dynamic(temp[u], offset + u, 0);
} else {
nir_dma_ld_shregs_pco(store_addr, burst_len, offset);
}
offset += block_size_dw;
size_remaining_dw -= block_size_dw;
store_addr = nir_uadd64_32(store_addr.x, store_addr.y, block_size_dw * sizeof(uint32_t));
}
}
}
KERNEL(1)
cs_store_sr_1024_common(void)
{
load_store_sr(1024, true, false, false);
}
KERNEL(1)
cs_load_sr_256_common(void)
{
load_store_sr(256, false, true, false);
}
KERNEL(1)
cs_load_sr_16_common(void)
{
load_store_sr(16, false, false, true);
}
KERNEL(1)
cs_idfwdf_common(void)
{
/* Do a memory store and a texture read to fence any loads/texture writes from previous kernels */
uint addr_lo = nir_load_preamble(1, PVR_IDFWDF_DATA_ADDR_LO, 0);
uint addr_hi = nir_load_preamble(1, PVR_IDFWDF_DATA_ADDR_HI, 0);
uint2 addr = (uint2)(addr_lo, addr_hi);
nir_dma_st_pco(true, addr, 0U);
uint16 smp_data = (uint16)(0);
uint4 tex_state = nir_load_preamble(4, PVR_IDFWDF_DATA_TEX, 0);
uint4 smp_state = nir_load_preamble(4, PVR_IDFWDF_DATA_SMP, 0);
/* TODO: improve flag/range emission. */
#define FLAGS 0xc9 /* 2d pplod fcnorm replace */
#define RANGE 3 /* data comps: x, y, lod */
#pragma unroll
for (unsigned y = 0; y < PVR_IDFWDF_TEX_HEIGHT; ++y) {
#pragma unroll
for (unsigned x = 0; x < PVR_IDFWDF_TEX_WIDTH; ++x) {
smp_data.xy = (uint2)(x, y);
nir_smp_pco(smp_data, tex_state, smp_state, FLAGS, RANGE);
}
}
}

30
src/imagination/pco/usclib/libcl.h
View file

@ -72,26 +72,44 @@ uint4 nir_load_preamble__4(uint base, uint preamble_class);
#define nir_load_preamble(n, ...) CAT2(nir_load_preamble__, n)(__VA_ARGS__)
void nir_store_preamble(uint data, uint base, uint preamble_class);
void nir_store_preamble_dynamic(uint data, uint offset, uint preamble_class);
uint nir_dma_ld_pco__1(uint2 addr);
uint2 nir_dma_ld_pco__2(uint2 addr);
uint3 nir_dma_ld_pco__3(uint2 addr);
uint4 nir_dma_ld_pco__4(uint2 addr);
uint16 nir_dma_ld_pco__16(uint2 addr);
#define nir_dma_ld_pco(n, ...) CAT2(nir_dma_ld_pco__, n)(__VA_ARGS__)
void nir_dma_st_pco__1(uint3 addr_data);
void nir_dma_st_pco__2(uint4 addr_data);
void nir_dma_st_pco__1(uint3 addr_data, uint flags);
void nir_dma_st_pco__2(uint4 addr_data, uint flags);
#define SELECT_ARGS_ST(addr, ...) \
((CAT2(uint, NUM_ARGS_PLUS_2(__VA_ARGS__)))(addr, __VA_ARGS__))
#define SELECT_ARGS_ST(flags, addr, ...) \
((CAT2(uint, NUM_ARGS_PLUS_2(__VA_ARGS__)))(addr, __VA_ARGS__), flags)
/* clang-format off */
#define nir_dma_st_pco(addr, ...) SELECT_NAME(nir_dma_st_pco, __, __VA_ARGS__)SELECT_ARGS_ST(addr, __VA_ARGS__)
#define nir_dma_st_pco(flags, addr, ...) SELECT_NAME(nir_dma_st_pco, __, __VA_ARGS__)SELECT_ARGS_ST(flags, addr, __VA_ARGS__)
/* clang-format on */
void nir_dma_st_shregs_pco(uint2 addr,
uint burst_len,
uint shreg_offset,
uint flags);
void nir_dma_ld_shregs_pco(uint2 addr, uint burst_len, uint shreg_offset);
void nir_dma_idf_pco(uint2 addr);
uint2 nir_uadd64_32(uint lo, uint hi, uint offset);
uint nir_imad(uint a, uint b, uint c);
uint2 nir_umad64_32(uint a, uint b, uint lo, uint hi);
uint nir_load_shared_reg_alloc_size_pco(void);
uint nir_smp_pco(uint16 data,
uint4 tex_state,
uint4 smp_state,
uint smp_flags,
uint range);
#endif /* PCO_LIBCL_H */

1
src/imagination/vulkan/meson.build
View file

@ -35,7 +35,6 @@ pvr_files = files(
'pvr_dump_bo.c',
'pvr_dump_csb.c',
'pvr_formats.c',
'pvr_hardcode.c',
'pvr_hw_pass.c',
'pvr_image.c',
'pvr_job_common.c',

76
src/imagination/vulkan/pvr_device.c
View file

@ -52,7 +52,6 @@
#include "pvr_debug.h"
#include "pvr_device_info.h"
#include "pvr_dump_info.h"
#include "pvr_hardcode.h"
#include "pvr_job_render.h"
#include "pvr_limits.h"
#include "pvr_pds.h"
@ -69,7 +68,6 @@
#include "util/macros.h"
#include "util/mesa-sha1.h"
#include "util/os_misc.h"
#include "util/u_dynarray.h"
#include "util/u_math.h"
#include "vk_alloc.h"
#include "vk_extensions.h"
@ -1651,37 +1649,28 @@ static VkResult pvr_device_init_compute_idfwdf_state(struct pvr_device *device)
{
struct pvr_sampler_descriptor sampler_state;
struct pvr_image_descriptor image_state;
struct util_dynarray usc_program;
struct pvr_texture_state_info tex_info;
const pco_precomp_data *precomp_data;
uint32_t *dword_ptr;
uint32_t usc_shareds;
uint32_t usc_temps;
VkResult result;
util_dynarray_init(&usc_program, NULL);
pvr_hard_code_get_idfwdf_program(&device->pdevice->dev_info,
&usc_program,
&usc_shareds,
&usc_temps);
device->idfwdf_state.usc_shareds = usc_shareds;
precomp_data = (pco_precomp_data *)pco_usclib_common[CS_IDFWDF_COMMON];
device->idfwdf_state.usc_shareds = _PVR_IDFWDF_DATA_COUNT;
/* FIXME: Figure out the define for alignment of 16. */
result = pvr_gpu_upload_usc(device,
usc_program.data,
usc_program.size,
precomp_data->binary,
precomp_data->size_dwords * sizeof(uint32_t),
16,
&device->idfwdf_state.usc);
util_dynarray_fini(&usc_program);
if (result != VK_SUCCESS)
return result;
/* TODO: Get the store buffer size from the compiler? */
/* TODO: How was the size derived here? */
result = pvr_bo_alloc(device,
device->heaps.general_heap,
4 * sizeof(float) * 4 * 2,
PVR_IDFWDF_TEX_WIDTH * PVR_IDFWDF_TEX_HEIGHT *
vk_format_get_blocksize(PVR_IDFWDF_TEX_FORMAT),
4,
0,
&device->idfwdf_state.store_bo);
@ -1690,7 +1679,7 @@ static VkResult pvr_device_init_compute_idfwdf_state(struct pvr_device *device)
result = pvr_bo_alloc(device,
device->heaps.general_heap,
usc_shareds * ROGUE_REG_SIZE_BYTES,
_PVR_IDFWDF_DATA_COUNT * ROGUE_REG_SIZE_BYTES,
ROGUE_REG_SIZE_BYTES,
PVR_BO_ALLOC_FLAG_CPU_MAPPED,
&device->idfwdf_state.shareds_bo);
@ -1711,14 +1700,15 @@ static VkResult pvr_device_init_compute_idfwdf_state(struct pvr_device *device)
/* clang-format on */
tex_info = (struct pvr_texture_state_info){
.format = VK_FORMAT_R32G32B32A32_SFLOAT,
.format = PVR_IDFWDF_TEX_FORMAT,
.mem_layout = PVR_MEMLAYOUT_LINEAR,
.flags = PVR_TEXFLAGS_INDEX_LOOKUP,
.type = VK_IMAGE_VIEW_TYPE_2D,
.extent = { .width = 4, .height = 2, .depth = 0 },
.extent = { .width = PVR_IDFWDF_TEX_WIDTH,
.height = PVR_IDFWDF_TEX_HEIGHT },
.mip_levels = 1,
.sample_count = 1,
.stride = 4,
.stride = PVR_IDFWDF_TEX_STRIDE,
.swizzle = { PIPE_SWIZZLE_X,
PIPE_SWIZZLE_Y,
PIPE_SWIZZLE_Z,
@ -1731,36 +1721,19 @@ static VkResult pvr_device_init_compute_idfwdf_state(struct pvr_device *device)
goto err_free_shareds_buffer;
/* Fill the shareds buffer. */
dword_ptr = (uint32_t *)device->idfwdf_state.shareds_bo->bo->map;
#define HIGH_32(val) ((uint32_t)((val) >> 32U))
#define LOW_32(val) ((uint32_t)(val))
memcpy(&dword_ptr[PVR_IDFWDF_DATA_TEX],
image_state.words,
sizeof(image_state.words));
memcpy(&dword_ptr[PVR_IDFWDF_DATA_SMP],
sampler_state.words,
sizeof(sampler_state.words));
/* TODO: Should we use compiler info to setup the shareds data instead of
* assuming there's always 12 and this is how they should be setup?
*/
dword_ptr[0] = HIGH_32(device->idfwdf_state.store_bo->vma->dev_addr.addr);
dword_ptr[1] = LOW_32(device->idfwdf_state.store_bo->vma->dev_addr.addr);
/* Pad the shareds as the texture/sample state words are 128 bit aligned. */
dword_ptr[2] = 0U;
dword_ptr[3] = 0U;
dword_ptr[4] = LOW_32(image_state.words[0]);
dword_ptr[5] = HIGH_32(image_state.words[0]);
dword_ptr[6] = LOW_32(image_state.words[1]);
dword_ptr[7] = HIGH_32(image_state.words[1]);
dword_ptr[8] = LOW_32(sampler_state.words[0]);
dword_ptr[9] = HIGH_32(sampler_state.words[0]);
dword_ptr[10] = LOW_32(sampler_state.words[1]);
dword_ptr[11] = HIGH_32(sampler_state.words[1]);
assert(11 + 1 == usc_shareds);
#undef HIGH_32
#undef LOW_32
dword_ptr[PVR_IDFWDF_DATA_ADDR_LO] =
device->idfwdf_state.store_bo->vma->dev_addr.addr & 0xffffffff;
dword_ptr[PVR_IDFWDF_DATA_ADDR_HI] =
device->idfwdf_state.store_bo->vma->dev_addr.addr >> 32;
pvr_bo_cpu_unmap(device, device->idfwdf_state.shareds_bo);
dword_ptr = NULL;
@ -1769,11 +1742,12 @@ static VkResult pvr_device_init_compute_idfwdf_state(struct pvr_device *device)
result = pvr_pds_idfwdf_programs_create_and_upload(
device,
device->idfwdf_state.usc->dev_addr,
usc_shareds,
usc_temps,
_PVR_IDFWDF_DATA_COUNT,
precomp_data->temps,
device->idfwdf_state.shareds_bo->vma->dev_addr,
&device->idfwdf_state.pds,
&device->idfwdf_state.sw_compute_barrier_pds);
if (result != VK_SUCCESS)
goto err_free_shareds_buffer;

63
src/imagination/vulkan/pvr_hardcode.c
View file

@ -1,63 +0,0 @@
/*
* Copyright © 2022 Imagination Technologies Ltd.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
#include <string.h>
#include <vulkan/vulkan_core.h>
#include "compiler/shader_enums.h"
#include "hwdef/rogue_hw_utils.h"
#include "pvr_device_info.h"
#include "pvr_hardcode.h"
#include "pvr_private.h"
#include "util/macros.h"
#include "util/u_dynarray.h"
#include "util/u_process.h"
/**
* \file pvr_hardcode.c
*
* \brief Contains hard coding functions.
* This should eventually be deleted as the compiler becomes more capable.
*/
#define util_dynarray_append_mem(buf, size, mem) \
memcpy(util_dynarray_grow_bytes((buf), 1, size), mem, size)
void pvr_hard_code_get_idfwdf_program(
const struct pvr_device_info *const dev_info,
struct util_dynarray *program_out,
uint32_t *usc_shareds_out,
uint32_t *usc_temps_out)
{
static const uint8_t shader[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
mesa_loge("No hard coded idfwdf program. Returning empty program.");
util_dynarray_append_mem(program_out, ARRAY_SIZE(shader), &shader[0]);
*usc_shareds_out = 12U;
*usc_temps_out = 4U;
}

47
src/imagination/vulkan/pvr_hardcode.h
View file

@ -1,47 +0,0 @@
/*
* Copyright © 2022 Imagination Technologies Ltd.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef PVR_HARDCODE_SHADERS_H
#define PVR_HARDCODE_SHADERS_H
#include <stdbool.h>
#include <stdint.h>
#include <vulkan/vulkan_core.h>
#include "compiler/shader_enums.h"
#include "util/u_dynarray.h"
/**
* \file pvr_hardcode.h
*
* \brief Contains hard coding functions.
* This should eventually be deleted as the compiler becomes more capable.
*/
void pvr_hard_code_get_idfwdf_program(
const struct pvr_device_info *const dev_info,
struct util_dynarray *program_out,
uint32_t *usc_shareds_out,
uint32_t *usc_temps_out);
#endif /* PVR_HARDCODE_SHADERS_H */

54
src/imagination/vulkan/pvr_job_context.c
View file

@ -29,8 +29,8 @@
#include <vulkan/vulkan.h>
#include "hwdef/rogue_hw_utils.h"
#include "pco_uscgen_programs.h"
#include "pvr_bo.h"
#include "usc/programs/pvr_cdm_load_sr.h"
#include "pvr_common.h"
#include "pvr_csb.h"
#include "pvr_job_context.h"
@ -40,12 +40,9 @@
#include "pvr_types.h"
#include "pvr_usc.h"
#include "usc/pvr_uscgen.h"
#include "usc/programs/pvr_vdm_load_sr.h"
#include "usc/programs/pvr_vdm_store_sr.h"
#include "pvr_winsys.h"
#include "util/macros.h"
#include "util/os_file.h"
#include "util/u_dynarray.h"
#include "vk_alloc.h"
#include "vk_log.h"
@ -472,8 +469,9 @@ static VkResult pvr_ctx_sr_programs_setup(struct pvr_device *device,
const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info);
uint64_t usc_store_program_upload_offset;
uint64_t usc_load_program_upload_offset;
const uint8_t *usc_load_sr_code;
uint32_t usc_load_sr_code_size;
const pco_precomp_data *precomp_data;
unsigned store_temps;
unsigned load_temps;
VkResult result;
/* Note that this is being used for both compute and render ctx. There is no
@ -492,51 +490,49 @@ static VkResult pvr_ctx_sr_programs_setup(struct pvr_device *device,
if (result != VK_SUCCESS)
return result;
/* USC state update: SR state store. */
/* We shouldn't need to limit the size of these programs any more, but if
* we end up having to, this would be the place to check.
*/
assert(sizeof(pvr_vdm_store_sr_code) < ROGUE_USC_TASK_PROGRAM_SIZE);
/* USC state update: SR state store. */
precomp_data =
(pco_precomp_data *)pco_usclib_common[CS_STORE_SR_1024_COMMON];
result = pvr_gpu_upload_usc(device,
pvr_vdm_store_sr_code,
sizeof(pvr_vdm_store_sr_code),
precomp_data->binary,
precomp_data->size_dwords * sizeof(uint32_t),
cache_line_size,
&sr_programs->usc.store_program_bo);
if (result != VK_SUCCESS)
goto err_free_store_load_state_bo;
store_temps = precomp_data->temps;
usc_store_program_upload_offset =
sr_programs->usc.store_program_bo->dev_addr.addr -
device->heaps.usc_heap->base_addr.addr;
/* USC state update: SR state load. */
precomp_data = (pco_precomp_data *)pco_usclib_common[CS_LOAD_SR_256_COMMON];
if (target == PVR_CTX_SR_COMPUTE_TARGET && PVR_HAS_QUIRK(dev_info, 62269)) {
STATIC_ASSERT(sizeof(pvr_cdm_load_sr_code) < ROGUE_USC_TASK_PROGRAM_SIZE);
usc_load_sr_code = pvr_cdm_load_sr_code;
usc_load_sr_code_size = sizeof(pvr_cdm_load_sr_code);
} else {
STATIC_ASSERT(sizeof(pvr_vdm_load_sr_code) < ROGUE_USC_TASK_PROGRAM_SIZE);
usc_load_sr_code = pvr_vdm_load_sr_code;
usc_load_sr_code_size = sizeof(pvr_vdm_load_sr_code);
}
if (target == PVR_CTX_SR_COMPUTE_TARGET && PVR_HAS_QUIRK(dev_info, 62269))
pvr_finishme("Missing support for brn62269");
result = pvr_gpu_upload_usc(device,
usc_load_sr_code,
usc_load_sr_code_size,
precomp_data->binary,
precomp_data->size_dwords * sizeof(uint32_t),
cache_line_size,
&sr_programs->usc.load_program_bo);
if (result != VK_SUCCESS)
goto err_free_usc_store_program_bo;
load_temps = precomp_data->temps;
usc_load_program_upload_offset =
sr_programs->usc.load_program_bo->dev_addr.addr -
device->heaps.usc_heap->base_addr.addr;
/* FIXME: The number of USC temps should be output alongside
* pvr_vdm_store_sr_code rather than hard coded.
*/
/* Create and upload the PDS load and store programs. Point them to the
* appropriate USC load and store programs.
*/
@ -546,7 +542,7 @@ static VkResult pvr_ctx_sr_programs_setup(struct pvr_device *device,
result = pvr_pds_render_ctx_sr_program_create_and_upload(
device,
usc_store_program_upload_offset,
8,
store_temps,
sr_programs->store_load_state_bo->vma->dev_addr,
&sr_programs->pds.store_program);
if (result != VK_SUCCESS)
@ -556,7 +552,7 @@ static VkResult pvr_ctx_sr_programs_setup(struct pvr_device *device,
result = pvr_pds_render_ctx_sr_program_create_and_upload(
device,
usc_load_program_upload_offset,
20,
load_temps,
sr_programs->store_load_state_bo->vma->dev_addr,
&sr_programs->pds.load_program);
if (result != VK_SUCCESS)
@ -570,7 +566,7 @@ static VkResult pvr_ctx_sr_programs_setup(struct pvr_device *device,
device,
false,
usc_store_program_upload_offset,
8,
store_temps,
sr_programs->store_load_state_bo->vma->dev_addr,
&sr_programs->pds.store_program);
if (result != VK_SUCCESS)
@ -581,7 +577,7 @@ static VkResult pvr_ctx_sr_programs_setup(struct pvr_device *device,
device,
true,
usc_load_program_upload_offset,
20,
load_temps,
sr_programs->store_load_state_bo->vma->dev_addr,
&sr_programs->pds.load_program);
if (result != VK_SUCCESS)

1
src/imagination/vulkan/pvr_pass.c
View file

@ -33,7 +33,6 @@
#include "pvr_private.h"
#include "pvr_types.h"
#include "pvr_usc.h"
#include "usc/programs/pvr_usc_fragment_shader.h"
#include "util/macros.h"
#include "vk_alloc.h"
#include "vk_format.h"

1
src/imagination/vulkan/pvr_pipeline.c
View file

@ -39,7 +39,6 @@
#include "pvr_bo.h"
#include "pvr_csb.h"
#include "pvr_csb_enum_helpers.h"
#include "pvr_hardcode.h"
#include "pvr_pds.h"
#include "pvr_private.h"
#include "pvr_robustness.h"

120
src/imagination/vulkan/usc/programs/pvr_cdm_load_sr.h
View file

@ -1,120 +0,0 @@
/*
* Copyright © 2022 Imagination Technologies Ltd.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef PVR_CDM_LOAD_SR_H
#define PVR_CDM_LOAD_SR_H
#include <stdint.h>
/* clang-format off */
static const uint8_t pvr_cdm_load_sr_code[] = {
0x25, 0x02, 0x87, 0x81,
0x04, 0x00, 0x00, 0x00,
0x84, 0x04, 0x25, 0x02,
0x87, 0x80, 0x04, 0x00,
0x00, 0x00, 0x85, 0x04,
0x25, 0x02, 0x87, 0x83,
0x04, 0x00, 0x00, 0x00,
0x86, 0x04, 0x25, 0x02,
0x87, 0x82, 0x04, 0x00,
0x00, 0x00, 0x87, 0x04,
0x56, 0x20, 0xF1, 0x85,
0x02, 0x80, 0x81, 0xD0,
0xC4, 0x08, 0x00, 0xFF,
0x02, 0x80, 0x6A, 0xFF,
0x67, 0xF0, 0x40, 0x20,
0x41, 0x8C, 0x80, 0x40,
0x00, 0x50, 0x8F, 0xC0,
0x80, 0x02, 0x04, 0x81,
0x60, 0x00, 0x0A, 0x01,
0x00, 0x00, 0x25, 0x36,
0x87, 0x87, 0x00, 0x00,
0x40, 0x05, 0xD1, 0x06,
0x55, 0x20, 0xF1, 0x81,
0x02, 0x00, 0xC0, 0xC6,
0x08, 0x00, 0x02, 0x80,
0x6A, 0xFF, 0x46, 0x42,
0xD0, 0x03, 0xEA, 0xD1,
0x41, 0x00, 0x01, 0x00,
0x00, 0x51, 0x27, 0x06,
0xEB, 0x84, 0x50, 0x20,
0x86, 0x87, 0x04, 0x00,
0xC0, 0x06, 0x87, 0x22,
0x25, 0x32, 0x87, 0x87,
0x00, 0x1F, 0x40, 0xC5,
0x0C, 0xFF, 0x25, 0x02,
0x87, 0xC0, 0x0C, 0x00,
0x00, 0x00, 0x83, 0x0C,
0x47, 0x42, 0xD0, 0x03,
0xEA, 0x85, 0x41, 0x90,
0x01, 0x08, 0x00, 0x00,
0x85, 0x0C, 0x47, 0x42,
0xD0, 0x03, 0xEA, 0xC5,
0x41, 0x90, 0x01, 0x08,
0x00, 0x00, 0xC5, 0x0C,
0x67, 0xF0, 0x40, 0x28,
0x42, 0x8C, 0x80, 0x40,
0x80, 0xC5, 0x80, 0x90,
0x80, 0xFF, 0x04, 0x81,
0x60, 0x00, 0xCC, 0xFF,
0xFF, 0xFF, 0x66, 0xF0,
0x40, 0x28, 0x42, 0x8C,
0x80, 0x40, 0x00, 0x51,
0xD0, 0x80, 0x04, 0x81,
0x60, 0x00, 0x86, 0xFF,
0xFF, 0xFF, 0x46, 0x40,
0xF1, 0xB0, 0xE2, 0x81,
0x4D, 0x01, 0x00, 0x00,
0x00, 0xFF, 0x04, 0x81,
0x60, 0x00, 0x32, 0x00,
0x00, 0x00, 0x02, 0x80,
0x6C, 0xC4, 0x45, 0x12,
0xD3, 0x3F, 0x01, 0x00,
0x00, 0xAB, 0x01, 0xFF,
0x44, 0x12, 0xD3, 0x3F,
0x00, 0x00, 0x00, 0x40,
0x44, 0x10, 0xD3, 0x3F,
0x40, 0x00, 0x00, 0xFF,
0x02, 0x80, 0x6C, 0x84,
0x04, 0x80, 0x60, 0x00,
0x40, 0x00, 0x00, 0x00,
0x46, 0x50, 0xFB, 0xB0,
0x87, 0xE2, 0x81, 0x4B,
0x03, 0x00, 0x00, 0x00,
0x04, 0x81, 0x61, 0x00,
0xF4, 0xFF, 0xFF, 0xFF,
0x02, 0x80, 0x6C, 0xC4,
0x45, 0x12, 0xD3, 0x3F,
0x01, 0x00, 0x00, 0xAA,
0x01, 0xFF, 0x44, 0x12,
0xD3, 0x3F, 0x00, 0x00,
0x00, 0x40, 0x44, 0x10,
0xD3, 0x3F, 0x40, 0x00,
0x00, 0xFF, 0x03, 0x80,
0x6C, 0x84, 0xF1, 0xFF,
0x04, 0x80, 0xEE, 0x00,
0xF2, 0xFF, 0xFF, 0xFF
};
/* clang-format on */
#endif /* PVR_CDM_LOAD_SR_H */

40
src/imagination/vulkan/usc/programs/pvr_usc_fragment_shader.h
View file

@ -1,40 +0,0 @@
/*
* Copyright © 2022 Imagination Technologies Ltd.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
/* Auto-generated file - don't edit */
#ifndef PVR_USC_FRAGMENT_SHADER_H
#define PVR_USC_FRAGMENT_SHADER_H
#include <stdint.h>
/* clang-format off */
static const uint8_t pvr_usc_fragment_shader[] = {
0x58, 0x9a, 0x80, 0xd3,
0x3f, 0x80, 0x08, 0x00,
0x00, 0x00, 0x20, 0xff,
0xf2, 0xff, 0xff, 0xff
};
/* clang-format on */
#endif /* PVR_USC_FRAGMENT_SHADER_H */

95
src/imagination/vulkan/usc/programs/pvr_vdm_load_sr.h
View file

@ -1,95 +0,0 @@
/*
* Copyright © 2022 Imagination Technologies Ltd.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
/* Auto-generated file - don't edit */
#ifndef PVR_VDM_LOAD_SR_H
#define PVR_VDM_LOAD_SR_H
#include <stdint.h>
/* clang-format off */
static const uint8_t pvr_vdm_load_sr_code[] =
{
0x25, 0x02, 0x87, 0x81,
0x04, 0x00, 0x00, 0x00,
0x84, 0x04, 0x25, 0x02,
0x87, 0x80, 0x04, 0x00,
0x00, 0x00, 0x85, 0x04,
0x25, 0x02, 0x87, 0x83,
0x04, 0x00, 0x00, 0x00,
0x86, 0x04, 0x25, 0x02,
0x87, 0x82, 0x04, 0x00,
0x00, 0x00, 0x87, 0x04,
0x56, 0x20, 0xF1, 0x85,
0x02, 0x80, 0x81, 0xD0,
0xC4, 0x08, 0x00, 0xFF,
0x02, 0x80, 0x6A, 0xFF,
0x67, 0xF0, 0x40, 0x20,
0x41, 0x8C, 0x80, 0x40,
0x00, 0x50, 0x8F, 0xC0,
0x80, 0x02, 0x04, 0x81,
0x60, 0x00, 0x9A, 0x00,
0x00, 0x00, 0x25, 0x36,
0x87, 0x87, 0x00, 0x00,
0x40, 0x05, 0xD1, 0x06,
0x55, 0x20, 0xF1, 0x81,
0x02, 0x00, 0xC0, 0xC6,
0x08, 0x00, 0x02, 0x80,
0x6A, 0xFF, 0x46, 0x42,
0xD0, 0x03, 0xEA, 0xD1,
0x41, 0x00, 0x01, 0x00,
0x00, 0x51, 0x27, 0x06,
0xEB, 0x84, 0x50, 0x20,
0x86, 0x87, 0x04, 0x00,
0xC0, 0x06, 0x87, 0x22,
0x25, 0x32, 0x87, 0x87,
0x00, 0x1F, 0x40, 0xC5,
0x0C, 0xFF, 0x25, 0x02,
0x87, 0xC0, 0x0C, 0x00,
0x00, 0x00, 0x83, 0x0C,
0x47, 0x42, 0xD0, 0x03,
0xEA, 0x85, 0x41, 0x90,
0x01, 0x08, 0x00, 0x00,
0x85, 0x0C, 0x47, 0x42,
0xD0, 0x03, 0xEA, 0xC5,
0x41, 0x90, 0x01, 0x08,
0x00, 0x00, 0xC5, 0x0C,
0x67, 0xF0, 0x40, 0x28,
0x42, 0x8C, 0x80, 0x40,
0x80, 0xC5, 0x80, 0x90,
0x80, 0xFF, 0x04, 0x81,
0x60, 0x00, 0xCC, 0xFF,
0xFF, 0xFF, 0x66, 0xF0,
0x40, 0x28, 0x42, 0x8C,
0x80, 0x40, 0x00, 0x51,
0xD0, 0x80, 0x07, 0x81,
0x60, 0x00, 0x86, 0xFF,
0xFF, 0xFF, 0xF3, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF,
0x04, 0x80, 0xEE, 0x00,
0xF2, 0xFF, 0xFF, 0xFF
};
/* clang-format on */
#endif /* PVR_VDM_LOAD_SR_H */

117
src/imagination/vulkan/usc/programs/pvr_vdm_store_sr.h
View file

@ -1,117 +0,0 @@
/*
* Copyright © 2022 Imagination Technologies Ltd.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
/* Auto-generated file - don't edit */
#ifndef PVR_VDM_STORE_SR_H
#define PVR_VDM_STORE_SR_H
#include <stdint.h>
/* clang-format off */
static const uint8_t pvr_vdm_store_sr_code[] =
{
0x25, 0x02, 0x87, 0x81,
0x04, 0x00, 0x00, 0x00,
0x40, 0xFF, 0x25, 0x02,
0x87, 0x80, 0x04, 0x00,
0x00, 0x00, 0x41, 0xFF,
0x25, 0x02, 0x87, 0x83,
0x04, 0x00, 0x00, 0x00,
0x86, 0x04, 0x25, 0x02,
0x87, 0x82, 0x04, 0x00,
0x00, 0x00, 0x87, 0x04,
0x68, 0xF2, 0x40, 0x20,
0x41, 0x8C, 0x80, 0x40,
0x80, 0x27, 0x20, 0x8F,
0xC0, 0x80, 0x02, 0x42,
0x66, 0x20, 0xF2, 0x84,
0xB8, 0x28, 0x80, 0xA2,
0xC2, 0xA0, 0x00, 0xFF,
0x44, 0x20, 0xE0, 0x00,
0xC0, 0xA1, 0x00, 0x00,
0x02, 0x80, 0x6A, 0xFF,
0x04, 0x81, 0x60, 0x00,
0xE8, 0x00, 0x00, 0x00,
0x25, 0x36, 0x87, 0x87,
0x00, 0x00, 0x40, 0x05,
0xC3, 0x06, 0x25, 0x02,
0xE2, 0x90, 0x50, 0x00,
0x00, 0x00, 0x00, 0x45,
0x25, 0x02, 0xE2, 0xC5,
0x44, 0x00, 0x00, 0x00,
0x00, 0x45, 0x89, 0xF2,
0x40, 0x21, 0x49, 0x9C,
0xC0, 0x00, 0x80, 0x40,
0x00, 0x42, 0x8F, 0xC6,
0x80, 0x02, 0x44, 0xFF,
0x04, 0x81, 0x60, 0x00,
0x62, 0x00, 0x00, 0x00,
0x68, 0x20, 0xE2, 0x88,
0xB8, 0x28, 0x80, 0x64,
0x00, 0x00, 0x83, 0xC6,
0x98, 0x08, 0x00, 0xFF,
0x45, 0x20, 0xE0, 0x00,
0x86, 0xE1, 0x10, 0x00,
0x00, 0xFF, 0x02, 0x80,
0x6A, 0xFF, 0x47, 0x42,
0xD0, 0x03, 0xE2, 0xC5,
0x41, 0x80, 0x85, 0x80,
0x00, 0x00, 0x85, 0x0C,
0x46, 0x42, 0xD0, 0x03,
0xE2, 0xC3, 0x41, 0x00,
0x01, 0x00, 0x00, 0x43,
0x27, 0x06, 0xE3, 0x84,
0x65, 0x20, 0x86, 0x87,
0x04, 0x00, 0xC0, 0x06,
0x87, 0x22, 0x66, 0xF0,
0x40, 0x28, 0x42, 0x8C,
0x80, 0x40, 0x00, 0x43,
0xC4, 0x80, 0x04, 0x81,
0x60, 0x00, 0xAE, 0xFF,
0xFF, 0xFF, 0x46, 0x42,
0xD0, 0x03, 0xE2, 0x84,
0x4F, 0x00, 0x03, 0x00,
0x00, 0x46, 0x67, 0xF2,
0x40, 0x00, 0x41, 0x8C,
0x80, 0x40, 0x00, 0x42,
0xC6, 0x84, 0x42, 0xFF,
0x66, 0xF0, 0x40, 0x20,
0x41, 0x8C, 0x80, 0x40,
0x00, 0x42, 0xC2, 0x80,
0x04, 0x81, 0x60, 0x00,
0x28, 0x00, 0x00, 0x00,
0x68, 0x20, 0xE2, 0x88,
0xB8, 0x28, 0x80, 0x62,
0x00, 0x42, 0x83, 0xC6,
0x98, 0x08, 0x00, 0xFF,
0x45, 0x20, 0xE0, 0x00,
0x86, 0xE1, 0x10, 0x00,
0x00, 0xFF, 0x03, 0x80,
0x6A, 0xFF, 0xF1, 0xFF,
0x04, 0x80, 0xEE, 0x00,
0xF2, 0xFF, 0xFF, 0xFF
};
/* clang-format on */
#endif /* PVR_VDM_STORE_SR_H */