Commit graph

212972 commits

Author SHA1 Message Date
Eric Engestrom
3edcbecec8 ci/alpine: install and manage rust version ourselves
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37414>
2025-09-19 17:28:41 +00:00
Eric Engestrom
397abe0fb6 ci/fedora: manage rust version ourselves
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37414>
2025-09-19 17:28:40 +00:00
Karol Herbst
40677b297d ci: document what version to specify in RUST_VERSION
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37414>
2025-09-19 17:28:40 +00:00
Caterina Shablia
529a6eda8f docs/features: add sparse{Binding,ResidencyBuffer} on panvk/v10+
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35287>
2025-09-19 17:00:10 +00:00
Caterina Shablia
2c8b285883 panvk: report support for sparse{Binding,ResidencyBuffer}
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35287>
2025-09-19 17:00:10 +00:00
Caterina Shablia
3b05d6a7b7 panvk: add bind queue
Bind queue is a queue of sparse resource memory bind operations.
It binds memory to sparse resources. It doesn't map to any
particular kernel object. The queue is equipped with an internal
syncobj to implement PANVK_DEBUG=sync.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35287>
2025-09-19 17:00:10 +00:00
Caterina Shablia
86068ad1ee panvk: implement sparse resources
Sparse resources (buffers and images) own their address ranges, so
when creating a sparse resource we allocate an address range large
enough to fit the resource. The address range has to start and end
at page boundaries, as that's the memory mapping granularity.

At destruction time, we unmap all memory mapped within the range,
as Vulkan doesn't require the user to unmap memory themselves and
we don't want to retain references to BOs for longer than
necessary. Finally, we free the address range that was previously
owned by the resource.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35287>
2025-09-19 17:00:10 +00:00
Caterina Shablia
d5edfb86ab panvk: add PANVK_DEBUG=force_blackhole
This flag is intended to be used by sparse resource creation. When
set, sparse resources will always start off mapped to blackhole,
regardless of whether they were created with SPARSE_RESIDENCY flag
set or not.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35287>
2025-09-19 17:00:10 +00:00
Caterina Shablia
7f263dd2fb panvk: add blackhole bo
We want to be able to survive accesses to, from Vulkan's
perspective, unmapped regions of sparse resources. For that we
allocate a single page -sized bo, which we'll use to implement
sparse unmapping by mapping the address range to this bo.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35287>
2025-09-19 17:00:10 +00:00
Mike Blumenkrantz
4b30df4462 tu: don't deref end info in tu_CmdEndRendering2EXT
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this can be null

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37476>
2025-09-19 10:13:58 -04:00
Erico Nunes
f6b791db30 kmsro: enable with zink
Since the kmsro option was removed, it is now just built together with a
list of gallium OpenGL drivers that require it.
On a Vulkan-only build with zink for OpenGL, kmsro is still required for
some wsi paths for those platforms, but it is no longer possible to
explicitly enable it without a gallium OpenGL driver to pull it.
This enables kmsro when zink is enabled to allow the Vulkan-only use
case in those platforms.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37459>
2025-09-19 13:31:31 +00:00
Timur Kristóf
da184ddbe4 spirv: Always mark FS layer and viewport index inpus as flat
The spec requires these to be decorated as FLAT,
but some apps forgot to set that,
eg. old DXVK before d12a8e09a855

Let's unconditionally decorate these FS inputs as FLAT
in spirv_to_nir, we can do that for free and prevent those
apps from crashing RADV.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33205>
2025-09-19 14:59:12 +02:00
Martin Roukala (né Peres)
e4668b8427 turnip/ci: switch vkcts testing to the KWS farm
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This commit keeps vkcts as a nightly job, but this puts us in shooting
distance to what we've been working for for the past 2.5 years!

We will flip the switch to making this job part of the merge pipeline
after a week of stress testing to make sure reliability issues,
especially around USB, don't come back to haunt my days and nights.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37367>
2025-09-19 11:41:54 +00:00
Martin Roukala (né Peres)
decd34f619 zink/ci: document more flakes in the a750 job
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37367>
2025-09-19 11:41:54 +00:00
Martin Roukala (né Peres)
e5509237bf turnip/ci: document more flakes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37367>
2025-09-19 11:41:54 +00:00
Juan A. Suarez Romero
6637366559 broadcom/ci: unlock CI-Tron jobs for arm32
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37474>
2025-09-19 11:23:53 +00:00
Georg Lehmann
14dfc05f83 radv: use rt wave size in fragment shaders with ray queries
Usually wave64 performs better for fragment shaders,
because LDS sharing for interpolation is better.

But the rt traversal loop divergence is likely high enough to make
wave32 better on GFX10.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37360>
2025-09-19 11:06:06 +00:00
Georg Lehmann
4a080a8904 radv: allow application required fragment shader subgroup size
If the application really thinks it needs pswave32, let it use it.
Fragment shaders also have no concept of full subgroups, so the existing
code that chooses the subgroup size will work already.

For pre raster stages, we cannot allow this because of potential mismatches
in merged stages.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37360>
2025-09-19 11:06:06 +00:00
Boris Brezillon
4a84acff8a panfrost: Support debugging JM context priorities with env vars
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Allow users to set an environment variable to influence JM context slot
priorities.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Ashley Smith <ashley.smith@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37075>
2025-09-19 10:05:46 +00:00
Boris Brezillon
e9aedfe508 panfrost: Support JM context creation and destruction
A Panfrost JM context can be created by leveraging the new Panfrost 1.5
KM IOCTLs and translating Mesa pipe resource priority levels into
Panfrost-specific ones.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Ashley Smith <ashley.smith@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37075>
2025-09-19 10:05:44 +00:00
Boris Brezillon
f04dbf0bc0 pan/kmod: query and cache available context priorities from KMD
Priority values will be used later one when creating job contexts.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Ashley Smith <ashley.smith@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37075>
2025-09-19 10:05:44 +00:00
Boris Brezillon
db2e1a4f23 drm-uapi: Sync panfrost_drm.h
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Ashley Smith <ashley.smith@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37075>
2025-09-19 10:05:43 +00:00
Gert Wollny
04f6e24e65 r600/sfn: clear PIPE_MAP_UNSYNCRONIZED for partial DS texture writes
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When writing to a depth texture the driver is first doing a decompress
blit to a stageing resource. On one hand this blit can be skipped, if
PIPE_MAP_DISCARD_WHOLE_RESOURCE is set, OTOH we need to clear the
PIPE_MAP_UNSYNCHRONIZED flag if a partial write is done, because we have to
wait until the blit is finished.

v2: Update the patch with a more targeted approach.

Fixes: 25b97a3a96 ("mesa/st: mark internal texture map calls as UNSYNCHRONIZED")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13916

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37457>
2025-09-19 07:42:54 +00:00
Tapani Pälli
59a4f53b95 iris: setup bits for ARB_texture_filter_minmax with gfx9+
Tested with: KHR-GL46.texture_filter_minmax_tests.*

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37451>
2025-09-19 05:29:35 +00:00
Mike Blumenkrantz
f9f682059b zink: disable single-aspected blits for now
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need spec support

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37470>
2025-09-18 21:33:11 -04:00
Mike Blumenkrantz
224f0f769b zink: stop creating GPL inputs for mesh
this is unnecessary

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37470>
2025-09-18 21:33:11 -04:00
Mike Blumenkrantz
ad3a445f96 zink: various cleanups for mesh+multiview
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37470>
2025-09-18 21:33:11 -04:00
Mike Blumenkrantz
52c902d8cc zink: set OutputPoints for mesh point output
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37470>
2025-09-18 21:33:11 -04:00
Mike Blumenkrantz
94179ae7ef zink: fix descriptor array indexing for mesh pipeline
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37470>
2025-09-18 20:43:33 -04:00
Timothy Arceri
870ce22754 nir: fix uniform cloning helper again
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UBOs in different stages can have the same instance name for
different UBOs so here we make sure to also check that types match
before deciding we have a match.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13254
Fixes: b47b8d16d9 ("nir: expose reusable linking helpers for cloning uniform loads")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37428>
2025-09-18 22:28:54 +00:00
Gert Wollny
b9a1bcd3a1 r600/sfn: replace hand coded comparison opts with opt_algebraic
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With that we can easily add a restriction to  the not + flt -> fge
optimization to handle NaNs like it was done before.

Fixes: 51d8ca2dff ("r600/sfn: optimize comparison results")

v2: use SPDX license identifier (austriancoder)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37450>
2025-09-18 21:04:06 +00:00
Eric Engestrom
bbb76517ee meson: only require glslang >= 12.2 when anv/radv/turnip are built
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37444>
2025-09-18 19:07:10 +00:00
Eric Engestrom
de8c297e0b meson: require glslang >= 12.2 for bvh preample
Fixes: ea51a67996 ("vulkan/bvh: Enable glsl extensions in meson")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37444>
2025-09-18 19:07:10 +00:00
Caio Oliveira
f65fbb23e2 brw: Fix encoding of 3-src dst in Xe2+
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Use FD20 macro that will account for the implicit LSB zero value and is
already used for sources.  For the new macro we need to use the entire
bit-range of the field (55-51), so remove the adjustments we used to
do prior to encoding and decoding.

Fixes assertion in vkpeak (https://github.com/nihui/vkpeak) when running
bf16 tests on BMG.  And the code now will correctly apply the subreg_nr
to the destination, e.g. a mad(32) gets splitted into two pieces, the
generation would not fill out the upper-part of the register

```
 mad(16)         g13<1>BF        g10<8,8,1>BF    g12<8,8,1>BF    g56<1,1,1>F { align1 1H A@5 };
-mad(16)         g13<1>BF        g10.16<8,8,1>BF g12.16<8,8,1>BF g57<1,1,1>F { align1 2H A@5 };
+mad(16)         g13.16<1>BF     g10.16<8,8,1>BF g12.16<8,8,1>BF g57<1,1,1>F { align1 2H A@5 };
```

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37236>
2025-09-18 18:21:25 +00:00
Mike Blumenkrantz
f75e886bf6 zink: only try update descriptors on draw/dispatch when necessary
this call has a lot of overhead even if it does nothing

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37466>
2025-09-18 17:58:08 +00:00
Mike Blumenkrantz
9d35a006ba zink: flag mesh pipeline_changed if switching from a shader object draw
this otherwise might fail to do some updates

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37466>
2025-09-18 17:58:08 +00:00
Mike Blumenkrantz
6f3d71f790 zink: flag gfx pipeline_changed if switching from a shader object draw
this otherwise might fail to do some updates

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37466>
2025-09-18 17:58:07 +00:00
Yiwei Zhang
951767ce36 intel/ds: update GPU clock to be sequence-scoped when applicable
When CPU clock is the same with the authoritative trace clock (normally
default to CLOCK_BOOTTIME), perfetto drops the non-monotonic snapshots
to ensure validity of the global source clock in the resolution graph.
When they are different, the clocks are marked invalid and the rest of
the clock syncs will fail during trace processing.

There's no central daemon emitting consistent snapshots for
synchronization between CPU and GPU clocks on behalf of renderstages and
counters producers. The sequence-scoped clock (64 <= ID < 128) is unique
per producer + writer pair within the tracing session. So we can use
sequence-scoped clock for gpu clock whenever applicable, and fallback to
use global clock for dynamic minor allocated >= 192.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37425>
2025-09-18 17:23:42 +00:00
Yiwei Zhang
7a1e952279 intel/ds: minor code clean up
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37425>
2025-09-18 17:23:42 +00:00
Yiwei Zhang
7689aca21f intel/ds: simplify clock sync emit
In short, perfetto doesn't require the initial clock snapshot to be
earlier than the timestamp to be converted. So we don't have to do
complex handling for it.

With this change:
- renderstage event requires clock sync, so we'd only emit clock
  snapshots on the traceq thread that handles the callbacks
- drops redundant sync_timestamp calls as well as sync_gpu_ts tracking
- no need to reset next_clock_sync_ns when tracing is disabled, since a
  snapshot is always emitted right after the initial interned data emit
  upon tracing start

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37425>
2025-09-18 17:23:42 +00:00
Yiwei Zhang
7795669953 intel/ds: VulkanApiEvent doesn't rely on interning data
The object name is part of the VkDebugUtilsObjectName event messages.
When the trace buffer is full and the ring buffer fill policy is chosen,
the debug obj events can be overwritten (lost), which is why we need the
RefreshSetDebugUtilsObjectNameEXT.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37425>
2025-09-18 17:23:42 +00:00
Timur Kristóf
afc9e4ce8a docs: Add more details about the contribution process
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Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37233>
2025-09-18 17:00:12 +00:00
Olivia Lee
275ebde06d pan/va: fix bi_is_imm_desc_handle early return
In the bi_emit_load_attr call site, we can use the imm_index value even
if the function returns false. The bifrost path handles this correctly.

Fixes: 652e1c2e13 ("pan/bi: Rework indices for attributes on Valhall")
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37464>
2025-09-18 16:38:39 +00:00
Olivia Lee
d8b32f8980 panvk: pass correct variant shader/compile inputs to panvk_lower_nir
Previously we were passing the original compile inputs, rather than the
variant-specific inputs. No actual bugs are caused by this because we
don't use the variant infrastructure for anything yet.

Fixes: ff9907927f ("panvk: Add basic infrastructure for shader variants")
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37463>
2025-09-18 16:17:39 +00:00
Hans-Kristian Arntzen
3bc81ee6f1 radv/sqtt: Ensure that present fence gets signalled.
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Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Fixes: 88cbe32048 ("radv: add support for RGP queue events")
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37438>
2025-09-18 14:58:39 +00:00
Danylo Piliaiev
0908694f02 freedreno/decode: Fix preamble decoding
Fixes: 46ad5a01a8 ("freedreno: Rename CP_SET_CTXSWITCH_IB to CP_SET_AMBLE")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37458>
2025-09-18 14:44:33 +00:00
Alyssa Rosenzweig
804ced9047 intel: drop legacy flatshade handling
Let mesa/st do the keying instead.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37447>
2025-09-18 14:14:11 +00:00
Alyssa Rosenzweig
36bd06ebab intel: drop clamp_fragment_color handling
This is all dead code since we weren't even seting the cap in iris/crocus!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37447>
2025-09-18 14:14:11 +00:00
Alyssa Rosenzweig
957f326a10 brw: drop printf info plumbing
unused since printf hashing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37447>
2025-09-18 14:14:10 +00:00
Alyssa Rosenzweig
58fd54b56e anv,hasvk: do not use unify_interfaces
it's GLSL cruft we want to get rid of.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37447>
2025-09-18 14:14:10 +00:00