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Author SHA1 Message Date
Rhys Perry
efe536dbe9 vtn: use vtn_has_decoration more 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37175>
 2025-09-05 15:58:03 +00:00
Mike Blumenkrantz
721af20a58 aux/trace: dump more mesh draw info
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Reviewed-by: Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37196>
 2025-09-05 14:53:01 +00:00
Mike Blumenkrantz
a70e247b9b mesa: add task/mesh to _mesa_shader_stage_to_subroutine_prefix() 
Reviewed-by: Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37196>
 2025-09-05 14:53:01 +00:00
Rob Clark
76fece61c6 freedreno/registers: Add A7XX_CX_DBGC 
This was added on kernel side in commit 13ed0a1af263 ("drm/msm: Fix a7xx
debugbus read"), but mesa copy of the registers was updated from an
earlier revision of that patch which did not have A7XX_CX_DBGC.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37192>
 2025-09-05 14:23:13 +00:00
Karmjit Mahil
651df8029a freedreno/registers: Fix SP_READ_SEL_LOCATION 
Five possible values are defined by `enum a7xx_state_location`
so SP_READ_SEL_LOCATION must be at least 3 bit wide.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13836
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37192>
 2025-09-05 14:23:13 +00:00
Valentine Burley
ed15433c35 zink/ci: Document recent a618 EGL flakes 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36787>
 2025-09-05 14:03:55 +00:00
Valentine Burley
2bcb25ee27 zink/ci: Enable VVL for Turnip on a618 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36787>
 2025-09-05 14:03:55 +00:00
Valentine Burley
31f6235126 tu: Enable robustBufferAccessUpdateAfterBind 
This is supported and must be enabled when
descriptorBinding*UpdateAfterBind is active.

Fixes the following VVL error:
Validation Error: [ VUID-VkDeviceCreateInfo-robustBufferAccess-10247 ]
vkCreateDevice(): robustBufferAccessUpdateAfterBind is false, but both
robustBufferAccess and a descriptorBinding*UpdateAfterBind feature are
enabled.

Fixes: d9fcf5de55 ("turnip: Enable nonuniform descriptor indexing")
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36787>
 2025-09-05 14:03:55 +00:00
Timur Kristóf
038aac57a3 radeonsi: Fix some comments to also include GFX11.5 
Just a nitpick.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37121>
 2025-09-05 13:42:56 +00:00
Timur Kristóf
637f618ac5 radeonsi: Flush L2 for render condition when CP can't use L2 
If CP can't use L2 then it also can't read the render condition
through L2, so we need a flush, just like on GFX6-8.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37121>
 2025-09-05 13:42:56 +00:00
Timur Kristóf
78efa4157a radv: Don't use V_370_PFP or V_028A90_PS_DONE on compute queues 
The compute queue doesn't support these things.
This change doesn't fix any known issues, but better to be safe.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37121>
 2025-09-05 13:42:56 +00:00
Timur Kristóf
8447a4bfca radv: Clean up use of RELEASE_MEM on GFX7 MEC 
MEC probably doesn't support EVENT_WRITE_EOP.
Both PAL and RadeonSI use RELEASE_MEM.

RADV used RELEASE_MEM too but "is_gfx8_mec" was very misleading.
This commit just cleans that up. No functional changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37121>
 2025-09-05 13:42:56 +00:00
Timur Kristóf
c56c746b71 radv: Don't use EVENT_WRITE_EOS on GFX7 
EOS events are buggy on GFX7 and can cause hangs when used
together in the same IB with CP DMA packets that use L2.
While we don't use the L2 for CP DMA copies, we still use it
with CP DMA prefetches, so the issue needs to be mitigated.

As a mitigation, avoid using EVENT_WRITE_EOS and prefer to use
the BOTTOM_OF_PIPE event instead of PS_DONE/CS_DONE, which should
be close enough.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37121>
 2025-09-05 13:42:56 +00:00
Timur Kristóf
2f587ea8be radv: Don't set SWITCH_ON_EOI without tessellation 
For reference, see si_get_init_multi_vgt_param.
The SWITCH_ON_EOI bit is only needed with tessellation.

Also remove some useless lines.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37121>
 2025-09-05 13:42:56 +00:00
Timur Kristóf
e8d1e935fb radv/amdgpu: Don't use IB2 on GFX6 (for now) 
GFX6 actually supports IB2, but doesn't support chaining between
chunks inside the IB2. See WaCpIb2ChainingUnsupported in PAL.

Disable IB2 on GFX6 for now.

The proper fix will be to disable use_ib in just secondary
command buffers on GFX6 and emit multiple IB2 packets in the
main command buffer. This will be implemented later.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37121>
 2025-09-05 13:42:56 +00:00
Timur Kristóf
3056279d09 radv/amdgpu: Use correct NOP packets when unchaining a CS 
GFX6 doesn't support single-dword PKT3 NOP packets,
so they shouldn't be used when unchaining a CS.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37121>
 2025-09-05 13:42:56 +00:00
Timur Kristóf
132a61c6b7 radv/amdgpu: Fix crash with RADV_DEBUG=noibs 
After a refactor last year, the noibs option stopped working
because it hits an assertion when empty IBs are submitted.

Emit a single large NOP packet to avoid submitting empty IBs.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37121>
 2025-09-05 13:42:56 +00:00
Christoph Pillmayer
f81f3c85e2 nir/opt_algebraic: Convert a + b + a to b + 2a
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This allows fusing into one FMA later.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37113>
 2025-09-05 11:39:51 +00:00
Samuel Pitoiset
8233d9d571 radv: rename RADV_CMD_DIRTY_FS_STATE to RADV_CMD_DIRTY_PS_STATE
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It's called PS everywhere else.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37087>
 2025-09-05 10:16:20 +00:00
Samuel Pitoiset
f180682441 radv: add a new dirty bit for emitting a PS epilog 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37087>
 2025-09-05 10:16:19 +00:00
Samuel Pitoiset
211e0823ec radv: add a new dirty bit for compiling/binding a PS epilog 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37087>
 2025-09-05 10:16:18 +00:00
Samuel Pitoiset
11e5f86a94 radv: add a function to bind a PS epilog 
The idea would be to separate compiling and emitting PS epilog in
two separate states.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37087>
 2025-09-05 10:16:17 +00:00
Samuel Pitoiset
bc71787ea3 radv: remove unnecessary NULL check when creating PS epilogs 
It's already checked in the caller.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37087>
 2025-09-05 10:16:15 +00:00
Samuel Pitoiset
d771f2c462 radv: add small helper to dispatch RT 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37141>
 2025-09-05 09:21:26 +00:00
Samuel Pitoiset
1b6aad9def radv/meta: use radv_CmdDispatchBase() directly for ASTC decode 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37141>
 2025-09-05 09:21:25 +00:00
Samuel Pitoiset
8ddb06f6e0 radv: trigger VS related states in radv_bind_pre_rast_shader() 
No need to duplicate this.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37141>
 2025-09-05 09:21:24 +00:00
Samuel Pitoiset
c589097999 radv: determine which shader is the last VGT shader using next stage 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37141>
 2025-09-05 09:21:23 +00:00
Samuel Pitoiset
9a93c7c243 radv: simplify sample shading state tracking 
Sample shading can be enabled with PSO or with fragment shaders, but
only the PSO state is bound because it's still possible to access
the FS everywhere during cmdbuf recording.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37141>
 2025-09-05 09:21:22 +00:00
Samuel Pitoiset
cb9c25cbea radv: rename radv_flush_occlusion_query_state() 
To match other emit functions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37141>
 2025-09-05 09:21:21 +00:00
Lionel Landwerlin
07039cdb3d anv: fixup robust_ubo_range mask
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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c7e48f79b7 ("brw,anv: Reduce UBO robustness size alignment to 16 bytes")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13834
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37183>
 2025-09-05 08:56:47 +00:00
Hans-Kristian Arntzen
fa486a0346 anti-lag: Fix stype for submit2 semaphores. 
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Fixes: 722ffe9a73 ("vulkan: implement VK_AMD_anti_lag as implicit vulkan layer")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37159>
 2025-09-05 08:14:28 +00:00
Lionel Landwerlin
d8add9866b anv: add an undocumented HW workaround for Gfx12.5 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:21 +00:00
Lionel Landwerlin
4314c891f4 anv: expose VK_EXT_shader_object 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:21 +00:00
Lionel Landwerlin
1de9f367e8 anv: remove unused gfx/compute pipeline code 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:20 +00:00
Lionel Landwerlin
e76ed91d3f anv: switch over to runtime pipelines 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:20 +00:00
Lionel Landwerlin
4d9dd5c3a2 anv: store a few default instructions 
We will use those where no associated shaders is active but we still
need some default values programmed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:20 +00:00
Lionel Landwerlin
69b6b4cb28 anv: add shader instruction emission 
Should replace much of genX_pipeline.c

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:19 +00:00
Lionel Landwerlin
8f4c2bd566 anv: add runtime shader statistic support 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:19 +00:00
Lionel Landwerlin
91abb0e0af anv: move internal RT shaders around 
anv_pipeline.c is about to go.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:18 +00:00
Lionel Landwerlin
d39e443ef8 anv: add infrastructure for common vk_pipeline 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:18 +00:00
Lionel Landwerlin
7cbabcad36 compiler: add stage_is_graphics() helper 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:17 +00:00
Lionel Landwerlin
50fd669294 anv: prep work for separate tessellation shaders 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:17 +00:00
Lionel Landwerlin
a91e0e0d61 brw: add support for separate tessellation shader compilation 
Tessellation factors have to be written dynamically (based on the next
shader primitive topology) and the builtins read using a dynamic
offset (based on the preceeding shader's VUE).

Anv is updated to use this new infrastructure for dynamic
patch_control_points.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:17 +00:00
Lionel Landwerlin
a18835a9ca anv/brw/iris: move VS VUE computation to backend 
Drivers can provide the inputs required for the backend to call the
compute function.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:16 +00:00
Lionel Landwerlin
8dee4813b0 brw: add ability to compute VUE map for separate tcs/tes 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:16 +00:00
Lionel Landwerlin
afea98593e nir: add a new intrinsic for load dynamic tessellation config 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872>
 2025-09-05 07:46:15 +00:00
Samuel Pitoiset
7f12f98741 radv: rework the optimal packet order for dispatches 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37013>
 2025-09-05 07:28:14 +00:00
Samuel Pitoiset
62c92a0516 radv: rework the optimal packet order for task/mesh draws 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37013>
 2025-09-05 07:28:13 +00:00
Samuel Pitoiset
f5bbe5228f radv: rework the optimal packet order for "normal" draws 
This idea comes from RadeonSI but RADV was already implementing
something similar. Except that it checked for wait-for-idle but this
shouldn't be necessary.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37013>
 2025-09-05 07:28:12 +00:00
Samuel Pitoiset
f289e8eddc radv: only expose permitted global queue priorities
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It's the responsability of the application to check for
VK_ERROR_NOT_PERMITTED, but filtering not permitted priorities seems
better.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13775
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37076>
 2025-09-05 06:34:36 +00:00