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radeonsi: Flush L2 for render condition when CP can't use L2

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If CP can't use L2 then it also can't read the render condition
through L2, so we need a flush, just like on GFX6-8.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37121>
This commit is contained in:
Timur Kristóf 2025-08-18 11:11:30 +02:00 • committed by Marge Bot
parent 78efa4157a
commit 637f618ac5
1 changed files with 1 additions and 1 deletions
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2
src/gallium/drivers/radeonsi/si_query.c
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@ -1696,7 +1696,7 @@ static void si_render_condition(struct pipe_context *ctx, struct pipe_query *que
/* Settings this in the render cond atom is too late,
* so set it here. */
if (sctx->gfx_level <= GFX8) {
if (sctx->gfx_level <= GFX8 || sctx->screen->info.cp_sdma_ge_use_system_memory_scope) {
sctx->barrier_flags |= SI_BARRIER_WB_L2 | SI_BARRIER_PFP_SYNC_ME;
si_mark_atom_dirty(sctx, &sctx->atoms.s.barrier);
}