Commit graph

19274 commits

Author SHA1 Message Date
Georg Lehmann
7108dac637 aco/optimizer: use new helpers for s_lshl<n>_add_u32
Foz-DB Navi48:
Totals from 7654 (9.29% of 82419) affected shaders:
Instrs: 6170479 -> 6174536 (+0.07%); split: -0.07%, +0.13%
CodeSize: 32489580 -> 32500100 (+0.03%); split: -0.07%, +0.10%
SpillSGPRs: 4253 -> 4224 (-0.68%); split: -0.71%, +0.02%
Latency: 60472662 -> 60489681 (+0.03%); split: -0.02%, +0.04%
InvThroughput: 9218099 -> 9218149 (+0.00%); split: -0.01%, +0.01%
VClause: 121094 -> 121089 (-0.00%); split: -0.01%, +0.00%
SClause: 178092 -> 179830 (+0.98%); split: -0.55%, +1.53%
Copies: 424495 -> 423756 (-0.17%); split: -0.57%, +0.40%
Branches: 120352 -> 120353 (+0.00%); split: -0.01%, +0.01%
PreSGPRs: 334391 -> 333381 (-0.30%); split: -0.33%, +0.02%
VALU: 3349394 -> 3349323 (-0.00%); split: -0.00%, +0.00%
SALU: 957913 -> 957149 (-0.08%); split: -0.25%, +0.17%
VOPD: 9177 -> 9179 (+0.02%); split: +0.03%, -0.01%

Foz-DB Navi21:
Totals from 7649 (9.28% of 82387) affected shaders:
Instrs: 6144605 -> 6143005 (-0.03%); split: -0.06%, +0.04%
CodeSize: 32685976 -> 32672380 (-0.04%); split: -0.08%, +0.04%
SpillSGPRs: 3079 -> 3067 (-0.39%); split: -0.42%, +0.03%
Latency: 64979945 -> 65002741 (+0.04%); split: -0.02%, +0.05%
InvThroughput: 14754398 -> 14754230 (-0.00%); split: -0.01%, +0.01%
VClause: 132336 -> 132357 (+0.02%); split: -0.02%, +0.03%
SClause: 190229 -> 191340 (+0.58%); split: -1.01%, +1.60%
Copies: 511915 -> 511287 (-0.12%); split: -0.44%, +0.32%
Branches: 157156 -> 157154 (-0.00%); split: -0.01%, +0.01%
PreSGPRs: 345761 -> 344826 (-0.27%); split: -0.33%, +0.05%
VALU: 3856887 -> 3856928 (+0.00%); split: -0.01%, +0.01%
SALU: 1001190 -> 1000362 (-0.08%); split: -0.22%, +0.14%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38530>
2025-11-25 11:49:10 +00:00
Georg Lehmann
d9919c3e10 aco/optimizer: optimize add(mad_u32_u16(a, b, 0), c)
Foz-DB Navi48:
Totals from 104 (0.13% of 82419) affected shaders:
Instrs: 3554243 -> 3553555 (-0.02%); split: -0.02%, +0.00%
CodeSize: 18836004 -> 18830572 (-0.03%); split: -0.03%, +0.00%
Latency: 19288034 -> 19287208 (-0.00%); split: -0.01%, +0.00%
InvThroughput: 3527510 -> 3526925 (-0.02%); split: -0.02%, +0.00%
VClause: 89526 -> 89522 (-0.00%); split: -0.02%, +0.01%
SClause: 62484 -> 62492 (+0.01%); split: -0.00%, +0.01%
Copies: 266415 -> 266404 (-0.00%); split: -0.04%, +0.03%
Branches: 102123 -> 102125 (+0.00%)
VALU: 1987067 -> 1986531 (-0.03%); split: -0.03%, +0.00%
SALU: 471348 -> 471346 (-0.00%); split: -0.00%, +0.00%

Foz-DB Navi21:
Totals from 228 (0.28% of 82387) affected shaders:
Instrs: 3069693 -> 3068317 (-0.04%); split: -0.05%, +0.00%
CodeSize: 16582476 -> 16574920 (-0.05%); split: -0.05%, +0.00%
Latency: 20038755 -> 20030986 (-0.04%); split: -0.04%, +0.00%
InvThroughput: 4742546 -> 4738245 (-0.09%); split: -0.10%, +0.00%
VClause: 93157 -> 93135 (-0.02%); split: -0.03%, +0.01%
Copies: 265019 -> 264959 (-0.02%); split: -0.04%, +0.02%
VALU: 2025352 -> 2023897 (-0.07%); split: -0.07%, +0.00%
SALU: 447385 -> 447375 (-0.00%); split: -0.00%, +0.00%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38530>
2025-11-25 11:49:10 +00:00
Georg Lehmann
0359c8a901 aco/optimizer: use new helpers for v_add_u32 opts
Foz-DB Navi48:
Totals from 1554 (1.89% of 82419) affected shaders:
Instrs: 5154325 -> 5151499 (-0.05%); split: -0.08%, +0.02%
CodeSize: 27310012 -> 27318708 (+0.03%); split: -0.01%, +0.05%
VGPRs: 97236 -> 97200 (-0.04%); split: -0.05%, +0.01%
Latency: 34121873 -> 34120894 (-0.00%); split: -0.02%, +0.01%
InvThroughput: 6735276 -> 6730418 (-0.07%); split: -0.08%, +0.01%
VClause: 130106 -> 130090 (-0.01%); split: -0.05%, +0.04%
SClause: 90439 -> 90449 (+0.01%); split: -0.00%, +0.01%
Copies: 382920 -> 382401 (-0.14%); split: -0.18%, +0.05%
Branches: 130089 -> 130091 (+0.00%)
PreSGPRs: 67745 -> 67743 (-0.00%); split: -0.01%, +0.00%
PreVGPRs: 72710 -> 72674 (-0.05%)
VALU: 2941866 -> 2938129 (-0.13%); split: -0.13%, +0.00%
SALU: 651032 -> 651779 (+0.11%); split: -0.02%, +0.14%
VOPD: 2446 -> 2393 (-2.17%); split: +0.70%, -2.86%

Foz-DB Navi21:
Totals from 1534 (1.86% of 82387) affected shaders:
MaxWaves: 32481 -> 32479 (-0.01%)
Instrs: 4732755 -> 4730039 (-0.06%); split: -0.06%, +0.00%
CodeSize: 25305728 -> 25313148 (+0.03%); split: -0.00%, +0.03%
VGPRs: 84424 -> 84448 (+0.03%)
SpillVGPRs: 2420 -> 2419 (-0.04%)
Scratch: 180224 -> 179200 (-0.57%)
Latency: 36843383 -> 36846269 (+0.01%); split: -0.01%, +0.02%
InvThroughput: 9252495 -> 9238142 (-0.16%); split: -0.17%, +0.02%
VClause: 146629 -> 146671 (+0.03%); split: -0.02%, +0.05%
SClause: 94502 -> 94512 (+0.01%); split: -0.00%, +0.01%
Copies: 403672 -> 403592 (-0.02%); split: -0.09%, +0.07%
Branches: 141145 -> 141137 (-0.01%)
PreSGPRs: 70003 -> 70001 (-0.00%); split: -0.01%, +0.00%
PreVGPRs: 70835 -> 70800 (-0.05%)
VALU: 3114513 -> 3111338 (-0.10%); split: -0.10%, +0.00%
SALU: 651177 -> 651925 (+0.11%); split: -0.02%, +0.13%
VMEM: 271263 -> 271261 (-0.00%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38530>
2025-11-25 11:49:09 +00:00
Georg Lehmann
715b9214da aco/optimizer: use new helpers for xor opts
Foz-DB Navi48:
Totals from 26 (0.03% of 82419) affected shaders:
Instrs: 180854 -> 180787 (-0.04%)
CodeSize: 948640 -> 948832 (+0.02%); split: -0.01%, +0.03%
Latency: 527883 -> 527858 (-0.00%); split: -0.03%, +0.02%
InvThroughput: 149480 -> 149379 (-0.07%); split: -0.07%, +0.00%
PreVGPRs: 1502 -> 1503 (+0.07%)
VALU: 84220 -> 84168 (-0.06%)

Foz-DB Navi21:
Totals from 26 (0.03% of 82387) affected shaders:
Instrs: 150984 -> 150929 (-0.04%)
CodeSize: 800404 -> 800552 (+0.02%); split: -0.00%, +0.02%
Latency: 541067 -> 540854 (-0.04%); split: -0.04%, +0.00%
InvThroughput: 182046 -> 181983 (-0.03%); split: -0.04%, +0.00%
Copies: 11324 -> 11322 (-0.02%)
PreVGPRs: 1568 -> 1569 (+0.06%)
VALU: 96977 -> 96923 (-0.06%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38530>
2025-11-25 11:49:08 +00:00
Georg Lehmann
3ba783e716 aco/optimizer: use new helpers for v_or opts
Foz-DB Navi48:
Totals from 1518 (1.84% of 82419) affected shaders:
Instrs: 6575669 -> 6575601 (-0.00%); split: -0.01%, +0.01%
CodeSize: 35135060 -> 35136020 (+0.00%); split: -0.00%, +0.01%
VGPRs: 99660 -> 99648 (-0.01%)
Latency: 47912874 -> 47910876 (-0.00%); split: -0.01%, +0.00%
InvThroughput: 9913228 -> 9912959 (-0.00%); split: -0.00%, +0.00%
VClause: 151572 -> 151567 (-0.00%); split: -0.01%, +0.00%
SClause: 133112 -> 133109 (-0.00%); split: -0.00%, +0.00%
Copies: 577835 -> 577837 (+0.00%); split: -0.01%, +0.01%
PreSGPRs: 84939 -> 84898 (-0.05%)
PreVGPRs: 75892 -> 75891 (-0.00%)
VALU: 3520300 -> 3520176 (-0.00%); split: -0.00%, +0.00%
SALU: 1026499 -> 1026529 (+0.00%); split: -0.00%, +0.01%
VOPD: 6830 -> 6850 (+0.29%); split: +0.31%, -0.01%

Foz-DB Navi21:
Totals from 1508 (1.83% of 82387) affected shaders:
Instrs: 5053785 -> 5053710 (-0.00%); split: -0.00%, +0.00%
CodeSize: 27603768 -> 27604048 (+0.00%); split: -0.00%, +0.00%
Latency: 44447441 -> 44444474 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 11666771 -> 11666371 (-0.00%); split: -0.00%, +0.00%
SClause: 121429 -> 121435 (+0.00%); split: -0.00%, +0.01%
Copies: 496693 -> 496642 (-0.01%); split: -0.02%, +0.01%
PreSGPRs: 72106 -> 72071 (-0.05%)
PreVGPRs: 69819 -> 69818 (-0.00%)
VALU: 3294641 -> 3294547 (-0.00%); split: -0.00%, +0.00%
SALU: 799012 -> 799014 (+0.00%); split: -0.01%, +0.01%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38530>
2025-11-25 11:49:08 +00:00
Georg Lehmann
88f7e3fff3 aco/optimizer: parse pseudo alu instructions
For combining, it's easier to handle these like their respective alu.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38530>
2025-11-25 11:49:07 +00:00
Timur Kristóf
4a76ed16d9 radv: Advertise sparse features pre Polaris with perftest flag
RADV_PERFTEST=sparse is a new option to enable experimental
support for sparse features when they aren't enabled by default:

- gfx6 supports sparse, albeit with a reduced feature set
- gfx7 supports 3D images (with non-standard block shape)
  and unaligned mip sizes
- gfx8 supports the same feature set as gfx7

(Polaris behaves more stable than other gfx8, so we had
already enabled it by default on Polaris for a long time.)

We pass all dEQP-VK.*sparse* tests on gfx6-8 when running on
a single thread however it may cause hangs or failures
when executing the tests on multiple parallel jobs.

We plan to enable this by default when we deem it stable enough.
Until then, users can already test some games that use it.
Note, at the moment there are some unsolved problems in the
amdgpu kernel driver regarding sparse bindings on these GPUs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38553>
2025-11-25 10:39:21 +01:00
Timur Kristóf
f00abaa1d4 ac/gpu_info: Add different sparse features
The following sparse features are not supported by all GPUs, so
keep track of their support individually:
has_sparse_image_3d
has_sparse_image_standard_3d
has_sparse_unaligned_mip_size

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38553>
2025-11-25 10:38:45 +01:00
Timur Kristóf
c15f9e7022 ac/surface: Use ADDR_TM_PRT_TILED_THIN1 on GFX6-8
Don't use ADDR_TM_PRT_2D_TILED_THIN1 because it is not supported
on CI/VI according to CiLib::HwlOverrideTileMode, and it is also
missing from SiLib::HwlOverrideTileMode.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38553>
2025-11-25 10:38:45 +01:00
Timur Kristóf
292460670a ac/gpu_info: Fix determining when CP DMA supports sparse
Change has_cp_dma_with_null_prt_bug to cp_dma_supports_sparse
to know when CP DMA supports sparse. CP DMA doesn't support
sparse on any gfx6-9 chip.

Sources:
- d2669628 already documented this on gfx6 in 2018
- e259f405 added a radeonsi workaround for gfx9 in 2023
- 235f70e4 added a radv workaround for Polaris in 2025

Now RADV will use compute copy and fill for sparse resources
on all gfx6-9 chips (previously only did on Polaris and newer).

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38553>
2025-11-25 10:38:45 +01:00
Timur Kristóf
cd72ce3213 ac/gpu_info: Rename has_sparse_vm_mappings to has_sparse
No functional changes. Just simplify the name.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38553>
2025-11-25 10:38:44 +01:00
Samuel Pitoiset
24d14313f6 radv: enable VRS for flat shading on GFX11+
RADV_DEBUG=novrsflatshading can be used to disable it if needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38527>
2025-11-25 07:52:52 +00:00
Samuel Pitoiset
92eaf7c0f5 radv: implement VRS for flat shading on GFX11+
For features parity compared to GFX10.3

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38527>
2025-11-25 07:52:52 +00:00
Samuel Pitoiset
90f761a7d5 radv: add a new dirty state for the VRS surface state on GFX11+
Unlike GFX10.3, on GFX11+ VRS override is part of PA_SC_VRS_OVERRIDE_CNTL
which also controls whether the VRS surface is enabled or not. This
new dirty state will allow us to re-emit that state without re-emitting
the complete framebuffer for VRS flat shading.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38527>
2025-11-25 07:52:52 +00:00
Samuel Pitoiset
af461de026 radv: fix per-submit RGP captures on video queues
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
SQTT user data packets aren't supported either.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38575>
2025-11-25 07:30:10 +00:00
Simon McVittie
b860ae309a vulkan: Optionally share one JSON manifest per driver between architectures
If the library_path is just a basename like `libvulkan_lvp.so`, then we
can share the same JSON manifest like `lvp_icd.json` between all of the
architectures, like we already do for Vulkan layers. The library will
be looked up in the dynamic linker's default search path in this case,
and in practice will be found in `${libdir}`. This is how the Mesa's
EGL driver and Vulkan layers work, how Mesa is packaged in Debian 13,
and also how the Nvidia proprietary driver works; it makes installation
simpler for distros, especially on multiarch systems like Debian and
the freedesktop.org SDK.

However, if we want a separate manifest per architecture in order to
be able to write the full path into it, we still need per-architecture
filename disambiguation like `lvp_icd.x86_64.json`.

We presumably still want a separate per architecture on Windows, because
the concept of a single monolithic `${libdir}` is less common there, and
it can also be helpful during development when setting `$VK_DRIVER_FILES`
to force the use of a specific driver installed in a non-default location.

Use the following parameter to passed to vk_icd_gen:
'--icd-lib-path', vulkan_icd_lib_path,
'--icd-filename', icd_file_name,
output : 'virtio_icd.' + vulkan_manifest_suffix,

and the output is passed by '--out', '@OUTPUT@',
so we can detect vulkan_manifest_per_architecture from the --out parameter in script.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13745
Signed-off-by: Simon McVittie <smcv@collabora.com>
Co-authored-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37314>
2025-11-24 19:05:57 +00:00
Samuel Pitoiset
6ab9e69d2f radv: ignore radv_disable_dcc{_mips} drirc options on GFX12
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
They shouldn't have any effects because on GFX12 DCC is transparent
to the userspace driver, and they should improve performance for the
games listed below:

- DOOM (2016)
- Wolfenstein II
- Red Dead Redemption 2
- WWE 2k23

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38481>
2025-11-24 17:40:33 +00:00
Samuel Pitoiset
e6514069ad radv: use a separate parameter for radv_disable_dcc
To stop abusing RADV_DEBUG flags for drirc entries.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38481>
2025-11-24 17:40:33 +00:00
Samuel Pitoiset
d497b87f7f radv: use a separate parameter for radv_rt_wave64
To stop abusing RADV_PERFTEST flags for drirc entries.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38481>
2025-11-24 17:40:32 +00:00
Samuel Pitoiset
faccb0b7cd radv: reformat debug/perftest options arrays
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38481>
2025-11-24 17:40:31 +00:00
Daniel Schürmann
6a35ab81b8 Revert "radv: Only call nir_opt_dead_write_vars once"
This reverts commit bf0e04a531.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38624>
2025-11-24 17:05:48 +00:00
Daniel Schürmann
7db497c096 Revert "radv: move nir_opt_copy_prop_vars out of optimization loop"
This reverts commit 36b0fdb7b7.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38624>
2025-11-24 17:05:48 +00:00
Daniel Schürmann
fc534ed209 amd: restrict radeon_info::marketing_name to 64 characters and copy it
The pointer is owned by the DRM device.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38546>
2025-11-24 12:34:08 +00:00
Daniel Schürmann
5a39e1e645 amd: remove radeon_info::is_pro_graphics
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38546>
2025-11-24 12:34:08 +00:00
Daniel Schürmann
24a43666e3 amd: replace uses of radeon_info::name with ac_get_family_name()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38546>
2025-11-24 12:34:08 +00:00
Daniel Schürmann
7b2f88b97c amd: remove radeon_info::lowercase_name
It is redundant.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38546>
2025-11-24 12:34:08 +00:00
Daniel Schürmann
8777894d3e amd: remove radeon_info::dev_filename
Instead, we can pass the file descriptor to ac_print_gpu_info().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38546>
2025-11-24 12:34:08 +00:00
Daniel Schürmann
80ab1de4be amd/drm-shim: handle AMDGPU_INFO_HW_IP_COUNT
It doesn't actually matter.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38546>
2025-11-24 12:34:08 +00:00
Eric Engestrom
53fe1f39a0 ci: use $CI_TRON_JOB_PRIORITY tag on all ci-tron jobs
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Moving `ci-tron:priority:` out of the variable because an empty value
will not be authorized, and this makes it obvious if that bug ever
happens (job will not be picked up and gitlab will complain that
`ci-tron:priority:` is not a tag registered by any runner), instead of
getting picked up by any runner that will then reject (fail) the job.

(This is caused by GitLab's API not allowing tags to be enforced when
picking up jobs, resulting in jobs with missing tags being picked up by
any runner, like the bug we had with the generic fd.o runners a few
months ago.)

v2 (Martin Roukala):
 * use the priority tags in all amdgpu jobs
 * add missing tags in etnaviv jobs
 * add missing tags in broadcom jobs

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37897>
2025-11-24 12:02:40 +00:00
Samuel Pitoiset
108d2d29a9 ac,radv,radeonsi: add more SPM helpers to common code
This also fixes a small bug on RADV for RDNA3 where counters might be
stuck.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38577>
2025-11-24 08:05:08 +00:00
Samuel Pitoiset
e2644a1389 radv: only reset SPM when cache counters are enabled with RGP
Otherwise, it's not necessary.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38577>
2025-11-24 08:05:08 +00:00
Samuel Pitoiset
0cc4e16c70 ac/spm,radv,radeonsi: configure the SPM sample interval in common code
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38577>
2025-11-24 08:05:08 +00:00
Samuel Pitoiset
9a61eaa1e3 radv: remove the ability to create NULL devices with RADV_FORCE_FAMILY
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On Linux, drm-shim is the replacement.

On Windows, the project to support a compile-only device has been
abandonned since a while, so it's fine to not allow creating NULL
devices for now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38544>
2025-11-24 07:44:49 +00:00
Yogesh Mohan Marimuthu
3ba6c9d0ac winsys/amdgpu: enable userq reg shadowing for gfx11.5
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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36700>
2025-11-23 19:44:07 +00:00
Yogesh Mohan Marimuthu
9beb668d8d winsys/amdgpu: fwm packet pre-emption for gfx 11.5
gfx 11.5 uses f32 firmware. f32 firmware requires COND_EXEC
packet to flush the ring buffer when pre-emption occured.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36700>
2025-11-23 19:44:06 +00:00
Dave Airlie
3eef0c0245 radv: add support for cooperative matrix per element operations.
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Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36992>
2025-11-22 13:16:20 +10:00
Samuel Pitoiset
344040c367 radv: enable RADV_THREAD_TRACE_CACHE_COUNTERS on GFX12
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38489>
2025-11-21 11:52:58 +00:00
Samuel Pitoiset
473118b6eb ac/spm: use hardware names for performance counters
Much easier to read.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38489>
2025-11-21 11:52:58 +00:00
Samuel Pitoiset
4c21a4846c ac/spm: adjust the granularity of SPM results on GFX12
It's 1, only GFX11-11.5 uses units of segment.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38489>
2025-11-21 11:52:58 +00:00
Samuel Pitoiset
f434c5c934 ac/spm: add cache counters configuration for GFX12
This is for the cache counters prior to RGP 2.6.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38489>
2025-11-21 11:52:58 +00:00
Samuel Pitoiset
da07f1ef3f radv: allocate the SQTT BO in GTT for faster readback
Reading VRAM from CPU is very slow.

This is similar to the SPM BO, and generating RGP captures is now
way faster.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38551>
2025-11-21 11:34:09 +00:00
Anna Maniscalco
3e01031f10 radv: consistently use the value in bytes for esgs_itemsize
Some checks are pending
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Previosuly this value was in bytes for vs/tes and in dwords for gs.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38514>
2025-11-20 16:45:37 +00:00
Anna Maniscalco
5e8885a339 radv: recalculate legacy_gs_info on bind
Previously legacy_gs_info calculated based on
gs_info->legacy_gs_info.esgs_itemsize which is calculated based on gs
input varyings.

However, when using ESO vs/tes can have outputs not read by gs, which
leads to underestimating LDS usage.

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38514>
2025-11-20 16:45:37 +00:00
Pierre-Eric Pelloux-Prayer
9e76f5f2a2 radv: enable global BO list if vm_always_valid is supported
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38529>
2025-11-20 10:21:47 +00:00
Pierre-Eric Pelloux-Prayer
cf4c55a20f ac/info: get vm_always_valid support through ac_linux_drm
For virtio it depends on the host support in virglrenderer.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38529>
2025-11-20 10:21:47 +00:00
Pierre-Eric Pelloux-Prayer
f57993b71d ac/virtio: fix incorrect NULL check
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38529>
2025-11-20 10:21:47 +00:00
Pierre-Eric Pelloux-Prayer
51365585e2 ac/virtio: remove dead code
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38529>
2025-11-20 10:21:47 +00:00
Samuel Pitoiset
3889695e9f aco/tests: switch to drm-shim
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38536>
2025-11-20 09:53:29 +00:00
Samuel Pitoiset
b4121a30df amd/drm-shim: export a function that allows to select a different device
To be used by ACO tests. Need to remove gnu_symbol_visibility for
exporting the symbol.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38536>
2025-11-20 09:53:29 +00:00
Samuel Pitoiset
168a8d0b52 radv: fix RB+ for depth-only with unused attachments
When there are no color outputs in the rendering state, but color write
enable/write aren't masked out (which seems legal with
VK_EXT_dynamic_rendering_unused_attachments), the driver must emit
CB_DISABLE to disable CB rendering completely.

Otherwise, if there is also a depth/stencil attachment in the rendering
state, CB0 is always set to 32_R for RB+. That means, the pixel shader
would still export fragments but to the previously bound color
attachment.

VKCTS is missing coverage.

Fixes: 4580293ab2 ("radv: implement RB+ depth-only rendering for better perf")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14319
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38509>
2025-11-20 07:37:17 +00:00