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radv: use a separate parameter for radv_disable_dcc

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To stop abusing RADV_DEBUG flags for drirc entries.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38481>
This commit is contained in:
Samuel Pitoiset 2025-11-17 11:01:31 +01:00 • committed by Marge Bot
parent d497b87f7f
commit e6514069ad
5 changed files with 16 additions and 12 deletions
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3
src/amd/vulkan/radv_device_memory.c
View file

@ -251,8 +251,7 @@ radv_alloc_memory(struct radv_device *device, const VkMemoryAllocateInfo *pAlloc
* (see DCC tiling flags).
*/
if (pdev->info.gfx_level >= GFX12 && pdev->info.gfx12_supports_dcc_write_compress_disable &&
domain == RADEON_DOMAIN_VRAM && (flags & RADEON_FLAG_NO_CPU_ACCESS) &&
!(instance->debug_flags & RADV_DEBUG_NO_DCC)) {
domain == RADEON_DOMAIN_VRAM && (flags & RADEON_FLAG_NO_CPU_ACCESS) && !radv_is_dcc_disabled(instance)) {
flags |= RADEON_FLAG_GFX12_ALLOW_DCC;
}

9
src/amd/vulkan/radv_formats.c
View file

@ -655,7 +655,7 @@ radv_get_modifier_flags(struct radv_physical_device *pdev, VkFormat format, uint
(instance->drirc.debug.disable_dcc_stores && pdev->info.gfx_level < GFX12))
features &= ~VK_FORMAT_FEATURE_2_STORAGE_IMAGE_BIT;
if (instance->debug_flags & (RADV_DEBUG_NO_DCC | RADV_DEBUG_NO_DISPLAY_DCC))
if (radv_is_dcc_disabled(instance) || instance->debug_flags & RADV_DEBUG_NO_DISPLAY_DCC)
return 0;
}
@ -1300,9 +1300,8 @@ radv_GetPhysicalDeviceImageFormatProperties2(VkPhysicalDevice physicalDevice,
pdev->use_hiz ? VK_IMAGE_COMPRESSION_DEFAULT_EXT : VK_IMAGE_COMPRESSION_DISABLED_EXT;
} else {
image_compression_props->imageCompressionFlags =
((instance->debug_flags & RADV_DEBUG_NO_DCC) || pdev->info.gfx_level < GFX8)
? VK_IMAGE_COMPRESSION_DISABLED_EXT
: VK_IMAGE_COMPRESSION_DEFAULT_EXT;
(radv_is_dcc_disabled(instance) || pdev->info.gfx_level < GFX8) ? VK_IMAGE_COMPRESSION_DISABLED_EXT
: VK_IMAGE_COMPRESSION_DEFAULT_EXT;
}
}
@ -1313,7 +1312,7 @@ radv_GetPhysicalDeviceImageFormatProperties2(VkPhysicalDevice physicalDevice,
might_enable_compression |= pdev->use_hiz && (base_info->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT);
} else {
might_enable_compression |=
!(instance->debug_flags & RADV_DEBUG_NO_DCC) && (base_info->usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT);
!radv_is_dcc_disabled(instance) && (base_info->usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT);
}
/**

3
src/amd/vulkan/radv_image.c
View file

@ -254,8 +254,7 @@ radv_use_dcc_for_image_early(struct radv_device *device, struct radv_image *imag
const VkImageCompressionControlEXT *compression =
vk_find_struct_const(pCreateInfo->pNext, IMAGE_COMPRESSION_CONTROL_EXT);
if (instance->debug_flags & RADV_DEBUG_NO_DCC ||
(compression && compression->flags == VK_IMAGE_COMPRESSION_DISABLED_EXT)) {
if (radv_is_dcc_disabled(instance) || (compression && compression->flags == VK_IMAGE_COMPRESSION_DISABLED_EXT)) {
return false;
}

10
src/amd/vulkan/radv_instance.c
View file

@ -214,6 +214,7 @@ radv_init_dri_debug_options(struct radv_instance *instance)
struct radv_drirc *drirc = &instance->drirc;
drirc->debug.disable_aniso_single_level = driQueryOptionb(&drirc->options, "radv_disable_aniso_single_level");
drirc->debug.disable_dcc = driQueryOptionb(&drirc->options, "radv_disable_dcc");
drirc->debug.disable_dcc_mips = driQueryOptionb(&drirc->options, "radv_disable_dcc_mips");
drirc->debug.disable_dcc_stores = driQueryOptionb(&drirc->options, "radv_disable_dcc_stores");
drirc->debug.disable_depth_storage = driQueryOptionb(&drirc->options, "radv_disable_depth_storage");
@ -248,9 +249,6 @@ radv_init_dri_debug_options(struct radv_instance *instance)
drirc->debug.override_uniform_offset_alignment =
driQueryOptioni(&drirc->options, "radv_override_uniform_offset_alignment");
if (driQueryOptionb(&drirc->options, "radv_disable_dcc"))
instance->debug_flags |= RADV_DEBUG_NO_DCC;
drirc->debug.rt_wave64 = driQueryOptionb(&drirc->options, "radv_rt_wave64");
}
@ -315,6 +313,12 @@ radv_is_rt_wave64_enabled(const struct radv_instance *instance)
return instance->perftest_flags & RADV_PERFTEST_RT_WAVE_64 || instance->drirc.debug.rt_wave64;
}
bool
radv_is_dcc_disabled(const struct radv_instance *instance)
{
return instance->debug_flags & RADV_DEBUG_NO_DCC || instance->drirc.debug.disable_dcc;
}
static const struct vk_instance_extension_table radv_instance_extensions_supported = {
.KHR_device_group_creation = true,
.KHR_external_fence_capabilities = true,

3
src/amd/vulkan/radv_instance.h
View file

@ -40,6 +40,7 @@ struct radv_drirc {
struct {
bool disable_aniso_single_level;
bool disable_dcc;
bool disable_dcc_mips;
bool disable_dcc_stores;
bool disable_depth_storage;
@ -113,4 +114,6 @@ const char *radv_get_perftest_option_name(int id);
bool radv_is_rt_wave64_enabled(const struct radv_instance *instance);
bool radv_is_dcc_disabled(const struct radv_instance *instance);
#endif /* RADV_INSTANCE_H */