Commit graph

23780 commits

Author SHA1 Message Date
Brian Paul
6ec4e9c28d u_vbuf: fix src_offset alignment in u_vbuf_create_vertex_elements()
If the driver says PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY=1,
the driver should never receive a pipe_vertex_element::src_offset value
that's not a multiple of four.  But the vbuf code wasn't actually adjusting
the src_offset value when creating the vertex element state object.

We just need to align the src_offset values put in the driver_attribs[]
array.

See the piglit gl-1.5-vertex-buffer-offsets test.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-06-19 10:54:24 -06:00
Brian Paul
c40f44cc99 gallium: whitespace, formatting clean-up in p_state.h
Remove trailing whitespace, move some braces, 78-column wrapping.
Trivial.
2015-06-19 08:45:00 -06:00
Brian Paul
4c11008eba st/wgl: fix WGL_SWAP_METHOD_ARB query
There are three possible return values (not two): WGL_SWAP_COPY_ARB,
WGL_SWAP_EXCHANGE_EXT and WGL_SWAP_UNDEFINED_ARB.

VMware bug 1431184

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul
73bdf4ba86 stw: use new stw_get_nop_function() function to avoid Viewperf 12 crashes
Also, print a warning if we do return NULL from wglGetProcAddress() to
help spot this sort of problem in the future.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul
8d005a643e stw: add some no-op functions for GL_EXT_dsa, GL_NV_half_float
Viewperf 12 calls wglGetProcAddress() to get pointers to some unsupported
DSA and half-float functions.  We return NULL but Viewperf doesn't check
for null before trying to jump through the pointer.  That causes a crash.

This patch adds no-op functions to call instead (used by the next patch).
This avoids the crash but the rendering is incorrect.

Some DSA functions are being added to Mesa at this time so we may be
able to remove some of these no-ops in the future.

More no-op functions may be added as needed.

VMware PR1383421

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-06-19 08:45:00 -06:00
Jose Fonseca
eee9247018 st/wgl: Don't return core profile for 3.1 contexts.
WGL_CONTEXT_PROFILE_MASK_ARB doesn't apply to desktop OpenGL versions
less than 3.2 -- applications can't specify whether they want a core or
a compat 3.1 context -- instead they are supposed the check whether the
returned context advertises GL_ARB_compatibility extension.

Mesa doesn't support compatability contexts for version higher than 3.1,
so we used to return core profile context, but this makes several Windows
applications unhappy, because they just assume they got a compatability
context without checking.

So it seems safer to on Windows to never return core profile for 3.1,
ie, just fail the context creation.

VMware PR1365920.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul
528bd94432 st/wgl: set PIPE_BIND_SAMPLER_VIEW for window color buffers
To allow sampling from the surface for things like glCopyPixels
or glCopyTexSubImage.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul
9405c1b3b0 st/wgl: add support for multisample pixel formats
Create pixel formats with 0, 4, 8 and 16 samples per pixel.
Add a SVGA_FORCE_MSAA env var to force creating all pixel formats
with a particular sample count.  This is useful for testing Mesa/GLUT/
etc. programs which don't ordinarily use multisample.

Reviewed-by: Matthew McClure <mcclurem@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul
0925e5f5bc st/wgl: respect sample count when creating framebuffer surfaces
Use the visual/pixel format's sample count instead of zero.

Reviewed-by: Matthew McClure <mcclurem@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul
b8249de646 st/wgl: fix WGL_SAMPLE_BUFFERS_ARB query
Only report 1 for WGL_SAMPLE_BUFFERS_ARB if the number of samples
per pixel > 1.

Reviewed-by: Matthew McClure <mcclurem@vmware.com>
2015-06-19 08:45:00 -06:00
Brian Paul
5ad5d44af5 tgsi: add comments for ureg_emit_label() 2015-06-19 08:45:00 -06:00
Brian Paul
12c1c0706d tgsi: new comments, assertion for executing TGSI_OPCODE_CAL 2015-06-19 08:45:00 -06:00
Jose Fonseca
afeb922206 llvmpipe: Truncate the binned constants to max const buffer size.
Tested with Ilia Mirkin's gzdoom.trace and
"arb_uniform_buffer_object-maxuniformblocksize fsexceed" piglit test
without my earlier fix to fail linkage when UBO exceeds
GL_MAX_UNIFORM_BLOCK_SIZE.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-06-19 07:21:06 +01:00
Emil Velikov
6b0378e483 ilo: remove missing ilo_fence.h from the sources list
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-18 12:59:28 +01:00
Eric Anholt
1d45e44b2f vc4: Move tile state/alloc allocation into the kernel.
This avoids a security issue where userspace could have written the tile
state/tile alloc behind the GPU's back, and will apparently be necessary
for fixing stability bugs (tile state buffers are missing some top bits
for the tile alloc's address).
2015-06-17 23:53:49 -07:00
Eric Anholt
9adcd2d80a vc4: Move RCL generation into the kernel.
There weren't that many variations of RCL generation, and this lets us
skip all the in-kernel validation for what we generated.
2015-06-17 23:53:49 -07:00
Eric Anholt
91c73a9a28 vc4: Add dumping of VC4_PACKET_TILE_BINNING_MODE_CONFIG. 2015-06-17 23:53:49 -07:00
Eric Anholt
dc1fbad2eb vc4: Fix memory leak from simple_list conversion.
I accidentally shadowed the outside declaration, so we always returned
NULL even when we'd found something in the cache.
2015-06-17 23:53:49 -07:00
Eric Anholt
62d153ea37 vc4: Track the number of BOs allocated and their size.
This is useful for BO leak debugging.
2015-06-17 23:53:49 -07:00
Ilia Mirkin
36e3eb6a95 nvc0/ir: can't have a join on a load with an indirect source
Triggers an INVALID_OPCODE warning on GK208. Seems rare enough to not
warrant verification on other chips. Fixes the new piglits:

  ubo_array_indexing/fs-nonuniform-control-flow.shader_test
  ubo_array_indexing/vs-nonuniform-control-flow.shader_test

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-17 22:23:20 -04:00
Eric Anholt
a0cd1a4060 vc4: Make sure that direct texture clamps have a minimum value of 0.
I was thinking of the MIN opcode in terms of unsigned math, but it's
signed, so if you used a negative array index, you could read before the
UBO.  Fixes segfaults under simulation in piglit array indexing tests with
mprotect-based guard pages.
2015-06-16 15:15:14 -07:00
Eric Anholt
d4d2736149 vc4: Swap around which src we spill to ra31/rb31.
I wanted to assert that src1 came from a non-unspilled register in shader
validation, and this easily gets us that.  And, as a bonus:

total instructions in shared programs: 93347 -> 92723 (-0.67%)
instructions in affected programs:     60524 -> 59900 (-1.03%)
2015-06-16 15:15:14 -07:00
Eric Anholt
507f3e708c vc4: R4 is not a valid register for clamped direct texturing.
Our array only goes to R3, and R4 is a special case that shouldn't be
used.
2015-06-16 15:15:14 -07:00
Eric Anholt
2eac356467 vc4: Factor out the live clamp register getter. 2015-06-16 15:15:14 -07:00
Eric Anholt
596532cc7d vc4: Drop the unused "stride" field of surfaces.
We're always looking at the slice anyway, when we would have needed it.
2015-06-16 15:15:14 -07:00
Eric Anholt
6dd55b4909 vc4: Handle refcounting the exec BO like we do in the kernel.
This reduces the diff to the kernel, and will be useful when I make the
kernel allocate more BOs as part of validation.
2015-06-16 15:15:14 -07:00
Eric Anholt
731ac05cc4 vc4: Use VC4_SET/GET_FIELD for some RCL packets. 2015-06-16 15:15:14 -07:00
Eric Anholt
e22a192784 vc4: Make symbolic values for packet sizes. 2015-06-16 15:15:14 -07:00
Eric Anholt
c2f8287601 vc4: Use symbolic values in texture ptype validation. 2015-06-16 15:15:14 -07:00
Eric Anholt
5fbbec9aae vc4: Move vc4_packet.h to the kernel/ directory, since it's also shared.
I want to notice discrepancies when I diff -u between Mesa and the kernel.
2015-06-16 15:15:14 -07:00
Ilia Mirkin
8b24388647 nv50,nvc0: clamp uniform size to 64k
The state tracker will pass through requests from buggy applications
which will have the buffer size larger than the max allowed (64k). Clamp
the size to 64k so that we don't get errors when uploading the constbuf
data.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-15 15:48:58 -04:00
Ilia Mirkin
a2af42c1d2 nvc0/ir: fix collection of first uses for texture barrier insertion
One of the places we have to insert texbars is in situations where the
result of the tex gets overwritten by a different instruction (e.g. in a
conditional statement). However in some situations it can actually
appear as though the original tex itself is an overwriting instruction.
This can naturally never really happen, so just ignore the tex
instruction when it comes up.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90347
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.5 10.6" <mesa-stable@lists.freedesktop.org>
2015-06-15 14:31:00 -04:00
Eric Anholt
bcd8a64f32 gallium: Drop the gallium-specific Android sw winsys.
This was part of gallium_egl, and we now have the normal libEGL Android
winsys support to handle it.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-15 10:32:23 -07:00
Eric Anholt
6ce0b0e317 vc4: Add support for building on Android.
v2: Add a comment explaining why we link libmesa_glsl.  Drop warning
    option from freedreno.  Add vc4 to the documentation for
    BOARD_GPU_DRIVERS.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-15 10:32:23 -07:00
Eric Anholt
fd3234891f gallium: Enable build of NIR support on Android.
v2: Add a comment explaining why we link libmesa_glsl.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-15 10:32:23 -07:00
Jürgen Rühle
2e42deb29c nv50/ir: OP_JOIN is a flow instruction
OP_JOIN instructions are assumed to be flow instructions and mercilessly
casted to FlowInstruction.

This patch fixes an instance where an OP_JOIN is created as a plain
instruction. This can cause crashes in the ir printer.

[imirkin: add ->fixed = 1]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-15 11:46:32 -04:00
Chia-I Wu
94ab563671 ilo: add ilo_state_raster_{line,poly}_stipple
Initialize hardware stipple states on bound instead of on emission.
2015-06-15 15:06:11 +08:00
Chia-I Wu
7cb853d52a ilo: add ilo_state_sample_pattern
Move sample pattern initialization from ilo_render to
ilo_state_sample_pattern.
2015-06-15 15:06:11 +08:00
Chia-I Wu
8f37e8e64f ilo: add 3DSTATE_AA_LINE_PARAMETERS to ilo_state_raster
Utilize ilo_state_raster to avoid redundant state change.
2015-06-15 15:06:11 +08:00
Marek Olšák
b0a2280e45 gallium/util: add util_last_bit64
This will be needed by radeonsi.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-06-14 20:17:29 +02:00
Marek Olšák
790510808e r600g: handle TGSI input/output array declarations correctly
Most of this code could be removed if r600g used tgsi_shader_info.
2015-06-14 20:17:29 +02:00
Chia-I Wu
117926debb ilo: merge ilo_state_3d*.[ch] to ilo_state.[ch]
With most code replaced to ilo_state_*, what was left did not belong there
anymore.
2015-06-15 01:23:23 +08:00
Chia-I Wu
54e0a8ed5d ilo: add ilo_state_ps to ilo_shader_cso 2015-06-15 01:22:13 +08:00
Chia-I Wu
30fcb31c9b ilo: add ilo_state_{vs,hs,ds,gs} to ilo_shader_cso 2015-06-15 01:07:10 +08:00
Chia-I Wu
da6e45fcbc ilo: embed ilo_state_sbe in ilo_shader 2015-06-15 01:07:10 +08:00
Chia-I Wu
5a52627c4f ilo: embed ilo_state_vf in ilo_ve_state 2015-06-15 01:07:09 +08:00
Chia-I Wu
9bfa987fb0 ilo: embed ilo_state_urb in ilo_state_vector 2015-06-15 01:07:09 +08:00
Chia-I Wu
eaf2c73899 ilo: embed ilo_state_sol in ilo_shader 2015-06-15 01:07:09 +08:00
Chia-I Wu
960ca7d5e3 ilo: embed ilo_state_cc in ilo_blend_state 2015-06-15 01:07:09 +08:00
Chia-I Wu
402e155cd3 ilo: embed ilo_state_raster in ilo_rasterizer_state 2015-06-15 01:07:09 +08:00