Commit graph

9445 commits

Author SHA1 Message Date
Samuel Pitoiset
81f4670ed6 radv,aco: dump all SGPRS from the trap handler
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31960>
2024-11-05 07:58:38 +00:00
Samuel Pitoiset
45d56d9395 radv: set missing shader info values for the trap handler
This fixes an assert in radv_precompute_registers_pgm() on GFX11
because it was considered a vertex shader.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31962>
2024-11-05 07:11:30 +00:00
Marek Olšák
755fb7a262 amd: move Tonga and Iceland TC-compat HTILE workarounds to ac_gpu_info.c
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31910>
2024-11-04 19:45:54 +00:00
Georg Lehmann
a7f6294f90 radv: use nir_opt_frag_coord_to_pixel_coord
Foz-DB Navi21:
Totals from 1648 (2.08% of 79395) affected shaders:
MaxWaves: 44918 -> 44950 (+0.07%); split: +0.09%, -0.02%
Instrs: 1004193 -> 1001179 (-0.30%); split: -0.33%, +0.03%
CodeSize: 5486412 -> 5486592 (+0.00%); split: -0.08%, +0.09%
VGPRs: 56664 -> 56552 (-0.20%); split: -0.93%, +0.73%
Latency: 15430894 -> 15435320 (+0.03%); split: -0.12%, +0.15%
InvThroughput: 3097789 -> 3092861 (-0.16%); split: -0.20%, +0.04%
VClause: 18757 -> 18793 (+0.19%); split: -0.13%, +0.32%
SClause: 34475 -> 34495 (+0.06%); split: -0.11%, +0.17%
Copies: 66195 -> 66150 (-0.07%); split: -0.88%, +0.81%
Branches: 23035 -> 23033 (-0.01%)
PreVGPRs: 42235 -> 41724 (-1.21%); split: -1.32%, +0.11%
VALU: 709730 -> 706662 (-0.43%); split: -0.47%, +0.04%
SALU: 111731 -> 111722 (-0.01%); split: -0.02%, +0.01%
VMEM: 25988 -> 25987 (-0.00%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31864>
2024-11-04 12:34:31 +00:00
Georg Lehmann
a2a9e93e72 radv: add support for load_pixel_coord
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31864>
2024-11-04 12:34:30 +00:00
Samuel Pitoiset
f7636b611a radv: add a struct that describes the trap handler layout
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31934>
2024-11-01 15:40:25 +00:00
Samuel Pitoiset
49682fc0cb radv,aco: save SQ_WAVE_GPR_ALLOC from the trap handler
This would be used to dump SGPRs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31934>
2024-11-01 15:40:25 +00:00
Samuel Pitoiset
31fc3199dd radv: fix dumping the faulty shader detected by the trap handler on GFX9+
The most significant bits need to be cleared.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31925>
2024-11-01 15:01:35 +00:00
Samuel Pitoiset
7b4da7f736 radv: only emit the TBA/TMA registers on GFX8
On GFX9+, these registers are privilegied and the kernel needs to
configure them.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31925>
2024-11-01 15:01:35 +00:00
Samuel Pitoiset
930395c5e4 radv: check for has_trap_handler_support instead of asserting
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31925>
2024-11-01 15:01:35 +00:00
Samuel Pitoiset
b23cc8c1d3 radv: add missing L2 non-coherent image case for mipmaps with DCC/HTILE on GFX11
According to PAL, an image with DCC/HTILE and mipmaps isn't coherent
with L2 when the mip level is in the metadata mip-tail region.

This fix isn't super optimal because the driver should rely on the
subresource range to determine if the mip level is in the mip-tail,
but it's easier to backport. Upcoming commits will optimize that.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11939
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31920>
2024-11-01 14:36:55 +00:00
Samuel Pitoiset
77e59eefc1 radv: add an option to configure the trap handler exceptions
This introduces RADV_TRAP_HANDLER_EXCP to configure the various
shader exceptions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31902>
2024-10-31 06:58:15 +00:00
Samuel Pitoiset
6b5a0f57ba radv: fix configuring the memory violation exception for the compute stage
The compute stage has two EXCP_EN fields and the memory violation bit
is in EXCP_EN_MSB. Confirmed by writing a small test on GFX8.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31902>
2024-10-31 06:58:14 +00:00
Timur Kristóf
96b95c8427 radv: Flush L2 cache for non-L2-coherent images in EndCommandBuffer.
This fixes a CTS hang on Hawaii.

We previously only did a CB/DB flush,
but that doesn't include a L2 cache flush.
Also fix the comment that said this is for GFX9+.

Fixes: 7c62f6fa01
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31906>
2024-10-30 17:46:50 +00:00
Samuel Pitoiset
fc0545e6a7 radv: fix wrong index in radv_skip_graphics_pipeline_compile()
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12089
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31901>
2024-10-30 11:25:59 +00:00
Samuel Pitoiset
4459a1d210 radv: resize the SPM bo when it's too small
This used to abort (see the previous commit) when the hardware wasn't
able to sample all SPM counters because the BO was too small. The SPM
BO can now be resized like the SQTT BO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31883>
2024-10-29 18:33:17 +00:00
Marek Olšák
ee452129c6 nir: add cull_triangles_, cull_lines_ prefixes to viewport_xy_scale_and_offset
for radeonsi

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31865>
2024-10-29 16:47:44 +00:00
Marek Olšák
2227f5be9d nir: rename load_cull_small_primitive_precision -> triangle, add line_precision
for radeonsi

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31865>
2024-10-29 16:47:44 +00:00
Marek Olšák
0914e0d02f nir: rename load_cull_small_primitives -> triangles, add load_cull_small_lines
for radeonsi

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31865>
2024-10-29 16:47:44 +00:00
Georg Lehmann
938f5ec7ce radv: use nir_opt_fragdepth
Cyberpunk 2077 writes unmodified depth.

Foz-DB Navi21:
Totals from 28 (0.04% of 79395) affected shaders:
Instrs: 6484 -> 6448 (-0.56%)
CodeSize: 36016 -> 35784 (-0.64%)
Latency: 58517 -> 58400 (-0.20%)
InvThroughput: 7719 -> 7717 (-0.03%)
Branches: 129 -> 119 (-7.75%)
PreVGPRs: 394 -> 372 (-5.58%)

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31874>
2024-10-29 15:15:24 +00:00
Georg Lehmann
695d2414cd nir,radv: optimize shared atomic offsets
Foz-DB Navi21:
Totals from 87 (0.11% of 79395) affected shaders:
Instrs: 140877 -> 140873 (-0.00%)
CodeSize: 747760 -> 747164 (-0.08%); split: -0.09%, +0.01%
Latency: 4528171 -> 4528162 (-0.00%)
InvThroughput: 826358 -> 826349 (-0.00%)
Copies: 10888 -> 10884 (-0.04%)
VALU: 84634 -> 84630 (-0.00%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31080>
2024-10-29 09:31:08 +00:00
Samuel Pitoiset
e83f91f206 radv: regroup and emit all raster related states in the same function
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31787>
2024-10-29 07:25:34 +00:00
Samuel Pitoiset
62f51becbb radv: track more redundant raster related registers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31787>
2024-10-29 07:25:34 +00:00
Konstantin Seurer
0963a0a2b4 radv: Move ac_addrlib to the physical device
There is nothing amdgpu specific here so this does not need to be
abstracted away. max_alignment also is not used in winsys code.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31643>
2024-10-28 20:06:38 +00:00
Semenov Herman (Семенов Герман)
1764f70ba8 radv: fix memleaks in radv_init_shader_upload_queue()
Co-authored-by: default avatarSamuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31608>
2024-10-28 17:11:41 +00:00
Samuel Pitoiset
8300378bf3 radv: advertise VK_EXT_device_generated_commands on GFX8+
GFX6-7 can't really support it and it's not worth the effort anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31383>
2024-10-28 16:27:35 +00:00
Samuel Pitoiset
9f8684359f radv: implement VK_EXT_device_generated_commands
The major differences compared to the NV extensions are:
- support for the sequence index as push constants
- support for draw with count tokens (note that DrawID is zero for
  normal draws)
- support for raytracing
- support for IES (only compute is supported for now)
- improved preprocessing support with the state command buffer param

The NV DGC extensions were only enabled for vkd3d-proton and it will
maintain both paths for a while, so they can be replaced by the EXT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31383>
2024-10-28 16:27:35 +00:00
Semenov Herman (Семенов Герман)
637a4b849a radv: fix memleaks in radv_sqtt_reloc_graphics_shaders()
Co-authored-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31607>
2024-10-28 15:48:05 +01:00
Samuel Pitoiset
0ae880c08c Revert "radv: implement 2D views of 3D images using 2D_ARRAY descriptors on GFX9+"
Using view3dAs2dArray changes the tiling and it's slower (-7.5% in
Silent Hill 2 Remake) than using 3D tiling. The previous implementation
was the best one regarding performance (it's also what RadeonSI does).

Sadly it seems that sampler2DViewOf3D can't really be supported without
that but nobody really needs it apparently.

Also view3dAs2array is incompatible for 2D views of sparse 3D images
because sparse 3D images requires 3D tiling.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11997

This reverts commit f5805bcb8e.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31869>
2024-10-28 12:47:38 +00:00
Samuel Pitoiset
742a1097a9 Revert "radv: advertise sampler2DViewOf3D"
This feature has never been exposed in stable releases, so I think it's
fine to disable it.

This reverts commit 493d5910a3.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31869>
2024-10-28 12:47:38 +00:00
Samuel Pitoiset
b3a06daa72 radv: simplify determining if dual-source blending is enabled
If blending is disabled or the color write mask is 0, dual-source
blending would be ignored, and this can be simplified a bit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31681>
2024-10-28 12:04:59 +00:00
Samuel Pitoiset
dc5efa892f radv: remove useless check about gl_Position as PS inputs for NGGC
gl_Position isn't part of the PS inputs read mask.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31830>
2024-10-28 11:03:47 +00:00
Samuel Pitoiset
8e4d1965bd radv: fix considering NGG culling for depth-only rendering
When the FS is unknown, this can happen with fast-link GPL or unlinked
ESO, rely on the number of VS/TES outputs which should be a good
approximation of the number of PS inputs.

This fixes a (huge?) performance regression from May 2023 because
for depth-only rendering, the FS is NULL and NGG culling wasn't
considered at all.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31830>
2024-10-28 11:03:47 +00:00
Samuel Pitoiset
72871d8330 radv: set missing FMASK surface counters for MSAA MRTs
This has been removed few years ago by mistake but it's important for
performance. This is mostly for addrlib to determine tile_swizzle which
is used to make memory access faster with multiple render targets.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31797>
2024-10-28 08:21:12 +01:00
Joshua Ashton
c66fd95d92 radv: Fix sample locations at 0 for X/Y
We cannot set the {X,Y}MAX_RIGHT_EXCLUSION bits
if we have a sample location at a pixel boundary.

CTS does not seem to be catching this.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Co-authored-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31839>
2024-10-25 11:24:12 +00:00
Joshua Ashton
130a423118 radv: Enable variableSampleLocations
This should come for free now we are dynamic
rendering based.

This passes CTS on RX 7900XTX.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31839>
2024-10-25 11:24:12 +00:00
Samuel Pitoiset
927a17f30a amd: do not emit PA_SU_PRIM_FILTER_CNTL in the common GFX preamble
RADV needs to adjust this register for user sample locations because
it seems possible to have a sample on the -8 coordinate.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31815>
2024-10-25 07:41:22 +00:00
Samuel Pitoiset
3d172d08b0 radv: do no emit PA_SC_CONSERVATIVE_RASTERIZATION_CNTL in the preamble on GFX12
It's already emitted as part of the cmdbuf.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31815>
2024-10-25 07:41:22 +00:00
Samuel Pitoiset
56cffd4b9b radv: simplify determining if a graphics pipeline uses NGG culling
has_ngg_culling can only be TRUE if the last VGT shader also uses NGG.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31829>
2024-10-25 07:10:28 +00:00
Samuel Pitoiset
62efebfd70 radv: fix emitting NGG culling state for ESO
It's possible to enable NGG culling with ESO if shaders are linked, or
if the VS doesn't need a prolog or if TES is used. This wasn't
supposed to be enabled but I think it worked just by luck because the
user SGPR value was probably zero and NGGC was disabled at draw time.

Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31829>
2024-10-25 07:10:27 +00:00
Samuel Pitoiset
982af1a2bc radv: capture shader statistics when RGP is enabled
This is useful in order to correlate shader hashes between RGP and
Fossilize. This is because Fossilize needs to pass the capture
statistics flag for getting shader hashes and the pipeline key won't
match otherwise.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31820>
2024-10-25 06:29:02 +00:00
Georg Lehmann
54fa55a3f7 radv: don't use v_mqsad_u32_u8 on gfx7
According to tests on hawaii, v_mqsad_u32_u8 always uses saturating accumulation
while v_msad_u8 truncates. GFX8+ can control this with the VOP3 clamp bit,
on older hardware that's not supported.

We want truncation for the NIR opcode.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12062
Fixes: c3c138b10f ("radv: optimize msad_4x8 to mqsad_4x8")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31809>
2024-10-24 17:20:56 +00:00
Rhys Perry
d312220c2d aco,radv,radeonsi: add aco_shader_info::ps::has_prolog
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30478>
2024-10-24 16:08:07 +00:00
Samuel Pitoiset
605d4dd42a radv: do not use MRT counters for images created for db capture&replay
Setting the surface index is optimal for performance in case of
multiple MRTs because addrlib rotates tiles differently.

But this should be disabled when the image is used for descriptor
buffers capture&replay because the descriptor isn't immutable
(ie. tile_swizzle can be different).

This fixes dEQP-VK.binding_model.descriptor_buffer.capture_replay.*
on some GPUs where tile_swizzle is non-zero.

Fixes: 3b57a35ece ("radv: Enable descriptorBufferCaptureReplay.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31818>
2024-10-24 13:53:20 +00:00
Daniel Schürmann
87cb42f953 treewide: don't lower to LCSSA before calling nir_divergence_analysis()
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
2024-10-24 10:06:17 +00:00
Daniel Schürmann
421b42637d nir: remove nir_update_instr_divergence()
This function has obscure limitations.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
2024-10-24 10:06:17 +00:00
Samuel Pitoiset
be81c8b8db radv: fix initializing the HTILE buffer on transfer queue
When only of the depth/stencil aspects is used, RADV dispatches a
compute shader to initialize the HTILE buffer. But dispatching on SDMA
just hangs and the only way to initialize the HTILE buffer is to clear
both aspects using a memory fill operation.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31803>
2024-10-24 06:25:18 +00:00
Samuel Pitoiset
3a5d40b152 radv: fix enabling/disabling user sample locations
When user sample locations are disabled dynamically, the driver should
re-emit the standard sample locations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31786>
2024-10-23 06:28:20 +00:00
Samuel Pitoiset
b33f47b498 radv: regroup and emit all DS related states in the same function
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31662>
2024-10-22 11:52:10 +00:00
Samuel Pitoiset
8791e56b62 radv: track more redundant DB related registers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31662>
2024-10-22 11:52:10 +00:00