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194 commits

Author SHA1 Message Date
Rhys Perry
6963c8dd80 radv,aco/gfx11: preserve s2 when NGG_WAVE_ID_EN=1
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According to the ISA doc, this is needed for hang recovery.

This works by just avoiding putting temporaries in s0-3 unless they're
precolored there.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (radv)
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39720>
 2026-02-16 14:33:58 +00:00
Marek Olšák
d1e6a5c1c8 ac: lower load_num_workgroups in NIR 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39638>
 2026-02-13 15:33:19 +00:00
Marek Olšák
a9e47751d2 ac: lower load_subgroup_id for ACO in NIR 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39638>
 2026-02-13 15:33:19 +00:00
Marek Olšák
0a9bdcac79 ac: lower load_workgroup_ids for ACO in NIR 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39638>
 2026-02-13 15:33:19 +00:00
Daniel Schürmann
da1594f8bb aco: introduce notion of block_kind_loop_latch 
A block annotated with block_kind_loop_latch denotes a block
the re-entry point for a loop back-edge. It is emitted after
the loop preheader and (potentially) before the loop header.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39519>
 2026-02-13 14:49:44 +00:00
Daniel Schürmann
fbf2083b8f aco/isel: Don't emit ELSE side of divergent branches which jump 
Totals from 50 (0.06% of 84383) affected shaders: (Navi48)

Instrs: 402490 -> 402444 (-0.01%); split: -0.01%, +0.00%
CodeSize: 2239024 -> 2238864 (-0.01%); split: -0.01%, +0.00%
SpillSGPRs: 1493 -> 1496 (+0.20%)
Latency: 5836785 -> 5836747 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 1120893 -> 1120909 (+0.00%); split: -0.00%, +0.00%
Copies: 46128 -> 46082 (-0.10%)
VALU: 222708 -> 222715 (+0.00%); split: -0.00%, +0.00%
SALU: 53039 -> 52993 (-0.09%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39519>
 2026-02-13 14:49:44 +00:00
Daniel Schürmann
ba32219cf8 aco/isel: Don't emit ELSE side of uniform branches which jump 
Totals from 4 (0.00% of 84383) affected shaders: (Navi48)

Instrs: 16473 -> 16468 (-0.03%)
CodeSize: 85276 -> 85300 (+0.03%)
SpillSGPRs: 175 -> 176 (+0.57%)
Latency: 267907 -> 267885 (-0.01%)
InvThroughput: 36302 -> 36298 (-0.01%)
Copies: 1353 -> 1345 (-0.59%)
VALU: 9025 -> 9029 (+0.04%)
SALU: 2635 -> 2627 (-0.30%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39519>
 2026-02-13 14:49:44 +00:00
Daniel Schürmann
96a639918c aco: don't emit p_logical_start / p_logical_end after divergent branches 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39519>
 2026-02-13 14:49:44 +00:00
Daniel Schürmann
3743230252 aco/isel: Do IF-simplification if that didn't happen during NIR optimizations 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39519>
 2026-02-13 14:49:43 +00:00
Georg Lehmann
08f9bad0b5 aco/isel: avoid extracts for continuous alu src components 
Helps fp8 FSR4, hurts parallel_rdp.

Foz-DB Navi48:
Totals from 23 (0.03% of 82405) affected shaders:
MaxWaves: 380 -> 383 (+0.79%)
Instrs: 71228 -> 71487 (+0.36%); split: -0.26%, +0.62%
CodeSize: 411500 -> 415004 (+0.85%); split: -0.21%, +1.06%
VGPRs: 2856 -> 2784 (-2.52%)
Latency: 1654160 -> 1665555 (+0.69%); split: -0.14%, +0.83%
InvThroughput: 354145 -> 361122 (+1.97%); split: -0.10%, +2.07%
VClause: 1557 -> 1541 (-1.03%); split: -1.41%, +0.39%
Copies: 9857 -> 10059 (+2.05%); split: -1.76%, +3.80%
PreVGPRs: 2285 -> 2182 (-4.51%); split: -4.73%, +0.22%
VALU: 38873 -> 39066 (+0.50%); split: -0.47%, +0.96%
VOPD: 1237 -> 1246 (+0.73%); split: +1.13%, -0.40%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39532>
 2026-02-06 11:29:39 +00:00
Georg Lehmann
a0c663378c aco/isel: split vector into dwords/words first 
Foz-DB Navi48:
Totals from 361 (0.44% of 82405) affected shaders:
MaxWaves: 5806 -> 5832 (+0.45%)
Instrs: 2343746 -> 2343762 (+0.00%); split: -0.04%, +0.04%
CodeSize: 13270504 -> 13267116 (-0.03%); split: -0.10%, +0.08%
VGPRs: 42008 -> 41708 (-0.71%)
SpillVGPRs: 308 -> 303 (-1.62%)
Scratch: 1574656 -> 1574400 (-0.02%)
Latency: 26571385 -> 22602486 (-14.94%); split: -14.95%, +0.01%
InvThroughput: 5474157 -> 4614777 (-15.70%); split: -15.70%, +0.00%
VClause: 57512 -> 57515 (+0.01%); split: -0.03%, +0.03%
SClause: 56313 -> 56319 (+0.01%)
Copies: 251626 -> 248707 (-1.16%); split: -1.24%, +0.08%
Branches: 89620 -> 89614 (-0.01%)
PreVGPRs: 37361 -> 36910 (-1.21%); split: -1.21%, +0.01%
VALU: 1111534 -> 1108507 (-0.27%); split: -0.29%, +0.02%
SALU: 443684 -> 443687 (+0.00%); split: -0.00%, +0.00%
VMEM: 85287 -> 85277 (-0.01%)
VOPD: 97987 -> 98091 (+0.11%); split: +0.30%, -0.20%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39532>
 2026-02-06 11:29:39 +00:00
Georg Lehmann
1a3e627223 aco: improve emit_extract_vector for vector of vecs 
No Foz-DB changes, but nessecary for dword first splits.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39532>
 2026-02-06 11:29:39 +00:00
Georg Lehmann
6951ddc43b aco: clean up emit_extract_vector a bit 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39532>
 2026-02-06 11:29:39 +00:00
Rhys Perry
63b18e9e5b aco: move return address to a clobbered register 
It's placed in the preserved registers, but the p_call clobbers it, so
this change removes some special casing.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39590>
 2026-02-06 09:49:19 +00:00
Rhys Perry
837afd7faf aco: use Program::stack_ptr instead of Program::static_scratch_rsrc 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39590>
 2026-02-06 09:49:17 +00:00
Georg Lehmann
146779d16d aco: remove unpack_half support 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39511>
 2026-02-06 06:12:36 +00:00
Marek Olšák
bac80013e6 ac: remove image_load buffer code from ACO & LLVM 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> (aco)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
 2026-02-02 17:56:55 +00:00
Marek Olšák
c05d340184 ac: remove txf buffer code from ACO & LLVM 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> (aco)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
 2026-02-02 17:56:55 +00:00
Marek Olšák
21d79dc22f aco,ac/llvm: force IDXEN=1 for buffer format opcodes on GFX9 
This fixes txf and image_load lowered to buffer_load_amd.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
 2026-02-02 17:56:53 +00:00
Marek Olšák
4a7728c436 aco: handle ACCESS_SPARSE and ACCESS_SKIP_HELPERS for load_buffer_amd 
buffer txf and buffer image_load will be lowered to load_buffer_amd

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
 2026-02-02 17:56:53 +00:00
Natalie Vock
ad23e02a28 aco: Don't exclude discardable parameters from register preservation 
The original semantic of discardable parameters was "okay, nothing
actually uses this parameter, feel free to clobber it", but we were
only using it with tail calls from a function without discardable
parameters, which was broken.

Instead, slightly change the use-case and utilize the "discardable"
attribute to mark parameters that the callee will clobber in a tail
call. This makes doing tail calls safe when the tail callee receives a
modified set of parameters.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39579>
 2026-01-31 14:26:57 +00:00
Rhys Perry
0b0e124a73 aco: use lv1.resize() pattern
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Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39537>
 2026-01-28 16:46:30 +00:00
Rhys Perry
5f5032bb6a aco: use lv1/lv2 instead of v1/v2.as_linear() 
This is just a search+replace then clang-format.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39537>
 2026-01-28 16:46:30 +00:00
Georg Lehmann
830d6de9ff aco/isel: optimize pack_32_2x16_split(undef, const) 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39412>
 2026-01-26 10:54:20 +00:00
Natalie Vock
15328a5ef3 aco: Fix parameter stack size calculation
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This only accounted for 1/32 (or 1/64) of the actual parameter size. In
some cases this meant that some threads were smashing other threads'
stacks.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39455>
 2026-01-22 22:02:31 +00:00
Natalie Vock
e8f1dc687c aco: Use parameter assignment hints for any-hit shaders 
Query the signature of the traversal function stored in the any-hit
shader and make the parameter locations between the two match up, to
remove unnecessary movs inside the traversal loop.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39314>
 2026-01-20 21:49:55 +00:00
Natalie Vock
a32709674a aco: Add parameter assignment hints 
Parameter assignment hints allow to influence parameter register
assignment logic with user-specified affinities. If there is an affinity
declared for a parameter, the assignment logic will try to match the
registers a parameter and its affinity are assigned.

It also allows to hint that certain registers are not suitable for
assigning parameters to and should be avoided.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39314>
 2026-01-20 21:49:55 +00:00
Natalie Vock
2d6ecf303a aco: Add and use nir_abi_to_aco helper 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39314>
 2026-01-20 21:49:55 +00:00
Natalie Vock
7a2f050daa aco: Put boolean parameters inside SGPRs 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39314>
 2026-01-20 21:49:54 +00:00
Emma Anholt
ed8676dc28 nir: Rename the unit_test_*_amd intrinics to be un-vendored. 
We'll reuse these from the nir_opt_algebraic_pattern_test.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39076>
 2026-01-15 19:09:37 +00:00
Natalie Vock
cc81c7de23 nir,aco: Clean up useless lowering of sbt_base_amd 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
 2026-01-14 14:19:07 +00:00
Natalie Vock
0a1911b220 radv,aco: Use function call structure for RT programs 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
 2026-01-14 14:19:07 +00:00
Natalie Vock
06c2e90e35 aco: Note if a parameter needs to be explicitly preserved 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
 2026-01-14 14:19:05 +00:00
Rhys Perry
7a09e4a740 aco: use correct addition opcodes in gfx6-8 RT prolog
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Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 60dd9d797e ("aco: Swizzle ray launch IDs in the RT prolog")
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39232>
 2026-01-14 11:23:42 +00:00
Rhys Perry
da728d5a1a aco: micro-optimize ray launch ID swizzling 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39232>
 2026-01-14 11:23:42 +00:00
Natalie Vock
0d93e8ce54 aco: Don't insert p_reload_preserved in loops 
This can't work.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39157>
 2026-01-12 21:46:50 +00:00
Konstantin Seurer
39d58a55a7 aco: Add support to f2f16 with rtpi/rtni 
Those rounding modes are needed when computing 16-bit bounding boxes
since the bounding box must not get smaller.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37883>
 2026-01-10 11:34:12 +01:00
Natalie Vock
60dd9d797e aco: Swizzle ray launch IDs in the RT prolog 
This converts from 1D workgroups to 2D ray launch IDs entirely via
shader ALU, including handling partial/cut-off workgroups optimally.

Doing this entirely in-shader means it Just Works(TM) with indirect
dispatches as well. Previous approaches manipulating various things on
CPU depending on the dispatch size couldn't handle indirect dispatches.

The swizzle implemented here also swizzles with a recursive Z-order
pattern, which should be a little more optimal than arranging
invocations linearly within the wave.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39142>
 2026-01-08 19:49:55 +01:00
Natalie Vock
1f6ac3fa93 radv/rt,aco: Always dispatch 1D workgroups for RT 
We will swizzle the workgroups ourselves in the next commit.
Removes the need for 1D dispatch workarounds.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39142>
 2026-01-08 19:49:54 +01:00
Georg Lehmann
eb4737a1dd nir: add nir_alu_instr_is_exact helper 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39103>
 2026-01-07 09:40:57 +00:00
Daniel Schürmann
1e8d367537 amd: add and use ac_cu_info::has_vtx_format_alpha_adjust_bug 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:48 +00:00
Daniel Schürmann
addd4ea59f aco: pass aco_compiler_options to init_program() 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:46 +00:00
Alyssa Rosenzweig
079e9ae606 treewide: use BITSET_*_COUNT 
Mix of Coccinelle patch, manual fix ups, sed, etc. Probably best to review the diff
as-if hand written:

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38955>
 2025-12-16 17:42:10 +00:00
Timur Kristóf
f001515c87 aco: Use only VGPR offset on buffer atomics on GFX6-7 
SGPR offset is not included in the bounds check
according to the ISA documentation of GFX6-7 and
indeed it can trigger VM faults on OOB access.

Note that ACO already doesn't use the SGPR offset
on GFX6-7 for buffer loads and stores. This commit
just does the same for buffer atomics.

This commit mitigates a ton of VM faults that are exposed by:
24e75fea4b

Fossil DB stats on Hawaii (GFX7):

Totals from 148 (0.24% of 61818) affected shaders:
Instrs: 324004 -> 327352 (+1.03%)
CodeSize: 1556468 -> 1514100 (-2.72%); split: -2.74%, +0.02%
Latency: 1271480 -> 1276894 (+0.43%)
InvThroughput: 396850 -> 397740 (+0.22%)
VClause: 6861 -> 6858 (-0.04%)
Copies: 34083 -> 37430 (+9.82%)
PreVGPRs: 5705 -> 5706 (+0.02%)
VALU: 147529 -> 150898 (+2.28%)
SALU: 98194 -> 98172 (-0.02%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38958>
 2025-12-15 21:03:19 +00:00
Georg Lehmann
a2b70ce4ec aco/isel: remove uniform reduce/scan optimization 
This is now done in NIR, with the exception of exclusive min/max/and/or scans.
But those are not really useful, and if we ever come across them we can
optimize them in NIR using write_invocation_amd.

No Foz-DB changes on Navi21.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38902>
 2025-12-15 12:22:32 +00:00
Georg Lehmann
072815e5cb aco/gfx6: move mrtz writemask workaround to assembler and handle all mrt 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38853>
 2025-12-12 17:00:51 +00:00
Georg Lehmann
ef246aaf72 aco/isel: emit register copies for workgroup ids 
This way, we don't overestimate SGPR pressure.

Foz-DB Navi48:
Totals from 1413 (1.45% of 97637) affected shaders:
Instrs: 3468375 -> 3468585 (+0.01%); split: -0.01%, +0.02%
CodeSize: 18643064 -> 18643520 (+0.00%); split: -0.01%, +0.01%
VGPRs: 71776 -> 71788 (+0.02%)
SpillSGPRs: 18575 -> 18561 (-0.08%)
Latency: 23207643 -> 23207998 (+0.00%); split: -0.00%, +0.01%
InvThroughput: 8116806 -> 8116541 (-0.00%); split: -0.01%, +0.00%
VClause: 75250 -> 75252 (+0.00%); split: -0.00%, +0.00%
SClause: 65274 -> 65283 (+0.01%); split: -0.02%, +0.04%
Copies: 275750 -> 275942 (+0.07%); split: -0.03%, +0.10%
PreSGPRs: 70246 -> 69072 (-1.67%)
VALU: 1892111 -> 1892092 (-0.00%); split: -0.00%, +0.00%
SALU: 523460 -> 523648 (+0.04%); split: -0.02%, +0.05%
VOPD: 41097 -> 41102 (+0.01%)

Sadly the RA noise is slightly negative for instruction count.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38830>
 2025-12-11 08:06:59 +00:00
Georg Lehmann
911e1ce168 aco/isel: emit exec copy for ballot(true) 
Once copy propagated in the optimizer, this will allow
using nir_opt_uniform_subgroup without too many regressions.

Foz-DB Navi48:
Totals from 405 (0.41% of 97637) affected shaders:
Instrs: 3796716 -> 3796894 (+0.00%); split: -0.00%, +0.00%
CodeSize: 20116136 -> 20116652 (+0.00%); split: -0.00%, +0.00%
Latency: 18326661 -> 18327114 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 3353206 -> 3353268 (+0.00%); split: -0.00%, +0.00%
Copies: 292307 -> 293830 (+0.52%)
SALU: 507523 -> 507738 (+0.04%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38830>
 2025-12-11 08:06:58 +00:00
Marek Olšák
308da55f1a radv,radeonsi: use FRAG_RESULT_DUAL_SRC_BLEND 
this is slightly nicer

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38604>
 2025-12-10 19:16:46 +00:00
Natalie Vock
8bc5fdef53 aco: Remove unused p_reload_preserved def 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38281>
 2025-12-08 19:12:52 +00:00