Commit graph

10843 commits

Author SHA1 Message Date
Marek Olšák
68f6dec32e r600g: move aux_context and r600_screen_clear_buffer to drivers/radeon
This will be used in the next commit.
2013-09-29 15:18:09 +02:00
Marek Olšák
0cb9de1dd0 radeonsi: move debug options to R600_DEBUG 2013-09-29 15:18:09 +02:00
Marek Olšák
ba650ccf91 r600g: move some debug options to drivers/radeon 2013-09-29 15:18:09 +02:00
Marek Olšák
2814202ef4 r600g,radeonsi: share the async dma interface
r600_texture.c is one step closer to r600g.
2013-09-29 15:18:09 +02:00
Marek Olšák
e916267285 radeonsi: move radeonsi-specific functions out of r600_texture.c 2013-09-29 15:18:08 +02:00
Marek Olšák
31169400a0 r600g,radeonsi: remove unused code 2013-09-29 15:18:08 +02:00
Marek Olšák
6f21009cb3 r600g: move r600g-specific functions out of r600_texture.c 2013-09-29 15:18:08 +02:00
Marek Olšák
bfea9c498d r600g,radeonsi: consolidate r600_texture structures 2013-09-29 15:18:08 +02:00
Marek Olšák
4ea2e5a4e7 r600g: get rid of r600_texture::is_rat
It's always 0.
2013-09-29 15:18:08 +02:00
Marek Olšák
ba29324dba r600g: get rid of r600_texture::array_mode 2013-09-29 15:18:08 +02:00
Marek Olšák
39801d4ba7 r600g,radeonsi: consolidate transfer, cmask, and fmask structures 2013-09-29 15:18:08 +02:00
Marek Olšák
a62cd6949c radeon drivers: handle PIPE_CAP_MAX_VIEWPORTS 2013-09-29 15:18:07 +02:00
Marek Olšák
900b1863c8 radeon/llvm: fix TGSI_OPCODE_UCMP
This doesn't fix any known issue (I haven't run piglit with this yet),
but the code was obviously completely wrong. It looks like copy-pasted from CMP.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2013-09-29 14:49:23 +02:00
Zack Rusin
60c448faea llvmpipe: count c_primitives before discarding null prims
We need to count the clipper primitives before the rasterizer
discards one it considers to be null.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2013-09-25 19:41:02 -04:00
Zack Rusin
1291e833e7 llvmpipe: we need to subdivide if fb is bigger in either direction
We need to subdivide triangles if either of the dimensions is
larger than the max edge length, not when both of them are larger.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2013-09-25 19:38:21 -04:00
Marek Olšák
028b26e2ef radeon/llvm: fix shadow cube texturing for GL3.0
The fix is at the end (TGSI_TEXTURE_SHADOWCUBE handling), but I also
restructured the code for it to be more readable.

Fixes spec/!OpenGL 3.0/sampler-cube-shadow.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-09-25 20:45:23 +02:00
Marek Olšák
57f38e9f92 radeonsi: fix blitting the last 2 mipmap levels of compressed textures
This fixes compressedteximage piglit tests.

+10 piglits

Evergreen and Cayman have the same issue. R600 and R700 don't.

Cc: "9.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-09-25 20:45:22 +02:00
Marek Olšák
296adb6de9 radeonsi: add missing colorbuffer formats (rework format translation)
This fixes some piglits, e.g:
  spec/!OpenGL 3.0/required-renderbuffer-attachment-formats.

This can be ported to r600g.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-09-25 20:45:22 +02:00
Marek Olšák
f9ea435ebc radeonsi: bypass alpha-test for integer colorbuffers
Fixes spec/EXT_texture_integer/fbo-blending.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-09-25 20:45:22 +02:00
Marek Olšák
f7d004b9ad r600g: fix texture buffer object cache flushing
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
2013-09-25 20:45:22 +02:00
Marek Olšák
6317a3fb31 r600g: fix constant buffer cache flushing
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
2013-09-25 20:45:22 +02:00
Christian König
4871128e58 radeon/winsys: keep screen pointer in winsys v2
Only create one screen for each winsys instance.
This helps with buffer sharing and interop handling.

v2: rebased and some minor cleanup

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2013-09-25 19:41:31 +02:00
Christian König
1c57d9a6c6 radeon/uvd: try to place msg/fb buffer into GART
This is only supported on NI+, but the kernel takes care of those limitations.

Signed-off-by: Christian König <christian.koenig@amd.com>
2013-09-25 10:59:03 +02:00
Christian König
f9f14201c1 radeon/uvd: move alignment to winsys
Similar to GFX and DMA.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2013-09-25 10:58:58 +02:00
Zack Rusin
71ecc2cf71 Revert "llvmpipe: increase number of subpixel bits to eight"
This reverts commit 755c11dc5e.
We agreed that this is band-aid that's not very useful and
the proper solution is to rewrite the rasterization algo
so that it operates on 64 bit values.

Signed-off-by: Zack Rusin <zackr@vmware.com>
2013-09-24 15:10:02 -04:00
Zack Rusin
e5ec5aef2b llvmpipe: align the array used for subdivived vertices
When subdiving a triangle we're using a temporary array to store
the new coordinates for the subdivided triangles. Unfortunately
the array used for that was not aligned properly causing
random crashes in the llvm jit code which was trying to load
vectors from it.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2013-09-23 18:10:51 -04:00
Zack Rusin
755c11dc5e llvmpipe: increase number of subpixel bits to eight
Unfortunately d3d10 requires a lot higher precision (e.g.
wgf11clipping tests for it). The smallest number of precision
bits with which it passes is 8. That means that we need to
decrease the maximum length of an edge that we can handle without
subdivision by 4 bits. Abstracted the code a bit to make it easier
to change once to switch to 64bit rasterization.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2013-09-23 14:53:07 -04:00
Christian König
8bbcc43ad9 radeon/uvd: async flush the UVD cs
No need to block for the CS thread here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2013-09-22 10:33:20 +02:00
Grigori Goronzy
edbbfac6cf r600g: fast color clears for single-sample buffers
Allocate a CMASK on demand and use it to fast clear single-sample
colorbuffers. Both FBOs and window system colorbuffers are fast
cleared. Expand as needed when colorbuffers are mapped or displayed
on screen.

v2: cosmetics, move transfer expansion into dma_blit

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2013-09-20 20:35:55 +02:00
Grigori Goronzy
56d9a397aa r600g: add support for separately allocated CMASKs
v2: check for NULL cbufs

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2013-09-20 20:35:55 +02:00
Marek Olšák
419cd5f2a2 gallium: add flush_resource context function
r600g needs explicit flushing before DRI2 buffers are presented on the screen.

v2: add (stub) implementations for all drivers, fix frontbuffer flushing
v3: fix galahad

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2013-09-20 20:35:55 +02:00
Marek Olšák
d2bd63433a radeonsi: simplify and fix MSAA texture sampling for array textures
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-09-20 20:35:55 +02:00
Marek Olšák
defedc0f61 radeonsi: fix textureOffset and texelFetchOffset GLSL functions
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-09-20 20:35:55 +02:00
José Fonseca
1569b3e536 llvmpipe: Fix rendering to PIPE_FORMAT_R10G10B10A2_UNORM.
We must take rounding in consideration when re-scaling to narrow
normalized channels, such as 2-bit normalized alpha.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2013-09-20 17:34:57 +01:00
Rob Clark
7dab097a51 freedreno/a3xx: fix typo mixup w/ mipfilter
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-09-19 11:47:40 -04:00
Rob Clark
575a6e7ec5 freedreno: fix glReadPixels
duh, we still need to flush if there are pending draws and it isn't an
unsynchronized case.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-09-19 11:45:01 -04:00
Chia-I Wu
4a6939edae ilo: make ilo_bind_sampler_states return void
So that it can be hooked up pipe_context::bind_sampler_states that is
currently living on another branch.
2013-09-17 00:20:50 +08:00
Dave Airlie
bbe3d6dc29 nouveau: fix regression since float comparison instructions (v2)
Fix the return type and allow src and dst types for comparison
to be separate, this at least fixes the two test cases I've written.

v2: drop the u32->s32 change

Acked-by: Christoph Bumiller <christoph.bumiller@speed.at>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-09-16 08:32:42 +10:00
Rob Clark
ffa3244534 freedreno: PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
When the old contents do not need to be preserved, it is faster to
create a new backing bo rather than stall.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-09-14 13:31:58 -04:00
Rob Clark
d7be322410 freedreno/a3xx: fix VFD_INDEX_MAX overflow
max_index may be 0xffffffff.  The hardware does not need 1 + max_index
(although it does not hurt unless max_index wraps around to zero).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-09-14 13:31:58 -04:00
Rob Clark
c756a3ef70 freedreno: add debug option to disable GMEM bypass
Useful for debugging.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-09-14 13:31:58 -04:00
Rob Clark
cdec879e38 freedreno/a3xx: handle front_ccw
Used by supertuxkart.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-09-14 13:31:58 -04:00
Rob Clark
cda75253f7 freedreno/a3xx: stencil fixes
For mem->gmem we don't sample depth/stencil as it's native type.  So we
need to setup the swizzle state for the sampler based on the format used
for sampling.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-09-14 13:31:58 -04:00
Rob Clark
65ae4392ce freedreno/a3xx: alpha-test
Needed by some games, like etuxracer and supertuxkart which use alpha
test rather than blending, to handle texture transparency.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-09-14 13:31:58 -04:00
Rob Clark
dbf041e61f freedreno/a3xx/compiler: implement SUB
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-09-14 13:31:58 -04:00
Rob Clark
1a42d4ee34 freedreno/a3xx: use INDIRECT state load for shaders
With a debug option to force DIRECT (mainly to make it easier for
capturing cmdstream dumps).  Using INDIRECT for large shaders at least
makes a noticable reduction in CPU load, which helps for CPU limited
games.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-09-14 13:31:58 -04:00
Rob Clark
6e9c386d16 freedreno: avoid stalling at ringbuffer wraparound
Because of how the tiling works, we can't really flush at arbitrary
points very easily.  So wraparound is handled by resetting to top of
ringbuffer.  Previously this would stall until current rendering is
complete.  Instead cycle through multiple ringbuffers to avoid a stall.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-09-14 13:31:58 -04:00
Rob Clark
ca505303a7 freedreno: emit markers to scratch registers
Emit markers by writing to scratch registers in order to "triangulate"
gpu lockup position from post-mortem register dump.  By comparing
register values in post-mortem dump to command-stream, it is possible to
narrow down which DRAW_INDX caused the lockup.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-09-14 13:31:58 -04:00
Rob Clark
1e6d290f21 freedreno: split out WFI helper
Mostly just to give an easy debug/instrumentation point.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-09-14 13:31:58 -04:00
Rob Clark
74052347f3 freedreno: fd_draw helper
Have a single helper that all draws come through.. mainly for a
convenient debug and instrumentation point.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-09-14 13:31:58 -04:00