Commit graph

75514 commits

Author SHA1 Message Date
Vedran Miletić
67c99c1245 clover: Fix build against clang SVN >= r273191
setLangDefaults() now requires PreprocessorOptions as an argument.

Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit 82e0bbd01a)
Nominated-by: Andreas Boll <andreas.boll.dev@gmail.com>
Nominated-by: Timo Aaltonen <tjaalton@ubuntu.com>
2016-11-08 16:23:12 +00:00
Kenneth Graunke
6a72af2aeb mesa: Expose RESET_NOTIFICATION_STRATEGY with KHR_robustness.
This is supposed to be exposed with the GL_KHR_robustness extension,
which we support on ES 2.0 and later.  On desktop GL, it's also exposed
by GL_ARB_robustness, which is supported by all drivers ("dummy_true").
so we also allow desktop GL.

Fixes:
- ES32-CTS.robust.robustness.noResetNotification
- ES32-CTS.robust.robustness.loseContextOnReset

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
(cherry picked from commit 3bcdc2e3db)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/mesa/main/get.c
	src/mesa/main/get_hash_params.py
2016-11-08 16:23:12 +00:00
Kenneth Graunke
e591b0b206 nir: Call nir_metadata_preserve from nir_lower_alu_to_scalar().
This is mandatory.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit e6eed3533e)
2016-11-08 16:23:12 +00:00
Marek Olšák
b1c5719d7b radeonsi: fix FP64 UBO loads with indirect uniform block indexing
No known tests.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 15a127bc2c)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
        src/gallium/drivers/radeonsi/si_shader.c
2016-11-08 16:23:12 +00:00
Ilia Mirkin
ec1f6700b6 st/mesa: fix is_scissor_enabled when X/Y are negative
Similar to commit 49c24d8a24 ("i965: fix noop_scissor range issue on
width/height") - take the X/Y into account to determine whether the
scissor covers the whole area or not.

Fixes the recently-added gl-1.0-scissor-depth-clear-negative-xy piglit
test.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 742832434a)
2016-11-08 16:23:11 +00:00
Julien Isorce
b2495c2202 st/va: also honors interlaced preference when providing a video format
This fixes a crash when using the prefered video format with vaapisink
on Nvidia hardwares.
Also caught by the following assert:
  nouveau_vp3_video.c:91: Assertion `templat->interlaced' failed.

TEST= gst-launch-1.0 videotestsrc ! video/x-raw, format=NV12 ! vaapisink

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Julien Isorce <j.isorce@samsung.com>
Tested-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
Tested-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit bf901a2f8c)
2016-11-08 16:23:11 +00:00
Chuanbo Weng
7ad97bc307 gbm: fix potential NULL deref of mapImage/unmapImage.
The mapImage/unmapImage functions of DRIimage extension can be NULL,
so we should add additional check for them.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Chuanbo Weng <chuanbo.weng@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 9a1eb54237)
2016-11-08 16:23:11 +00:00
Ilia Mirkin
106f2dc8a7 gm107/ir: AL2P writes to a predicate register
We have to force it to write to predicate 7 (aka PT) in order for it not
to mess up another predicate. Unclear what would be returned in the
predicate, perhaps an error code for out-of-bounds requests. Blob
doesn't seem to check it.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit a22aee5ad1)
2016-11-08 16:23:11 +00:00
Marek Olšák
a3c232db2f radeonsi: take compute shader and dispatch indirect memory usage into account
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit e62caf576e)

Squashed with commit:

radeonsi: flush TC L2 before using a compute indirect buffer

There is no known test for this.

Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 08bcbfdc07)
2016-11-08 16:23:11 +00:00
Max Staudt
f75a108434 r300g: Set R300_VAP_CNTL on RSxxx to avoid triangle flickering
On the RSxxx chip series, HW TCL is missing and r300_emit_vs_state()
is never called.

However, if R300_VAP_CNTL is never set, the hardware (at least the
RS690 I tested this on) comes up with rendering artifacts, and
parts that are uploaded before this "fix" remain broken in VRAM.
This causes artifacts as in fdo#69076 ("triangle flickering").

It seems like this setup needs to happen at least once after power on
for 3D rendering to work properly. In the DDX with EXA, this happens in
RADEON_SWITCH_TO_3D() when processing an XRENDER Composite or an
Xv request. So playing back a video or starting a GTK+2 application
fixes 3D rendering for the rest of the session. However, this auto-fix
doesn't happen when EXA is not used, such as with GLAMOR or Wayland.

This patch ensures the register is configured even in absence of
the DDX's EXA module.

The register setting is taken from:
  xf86-video-ati  --  RADEONInit3DEngineInternal()
  mesa/src/mesa/drivers/dri/r300  --  r300EmitClearState()

Tested on RS690.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Max Staudt <mstaudt@suse.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 02675622b0)
2016-11-08 16:23:11 +00:00
Jason Ekstrand
258e651e0f nir/spirv: Refactor variable deocration handling
Previously, we dind't apply variable decorations to the members of a split
structure variable.  This doesn't quite work, unfortunately, because things
such as the "flat" qualifier may get applied to an entire structure instead
of propagated to the members.  This fixes 9 of the new CTS tests in the
dEQP-VK.glsl.linkage.varying.struct.* group.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit a00bd7bc27)
2016-11-08 16:23:11 +00:00
Jason Ekstrand
662a7c627b nir/spirv: Break variable decoration handling into a helper
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit f5505730d3)
2016-11-08 16:23:11 +00:00
Ilia Mirkin
ed8e99761d nir: fix definition of pack_uvec2_to_uint
Found by inspection. Untested beyond compilation. This also matches the
logic used in nir_lower_alu_to_scalar.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 8c8874eafb)
2016-11-08 16:23:10 +00:00
Ilia Mirkin
98c9fcf259 mesa/formatquery: limit ES target support, fix core context support
First off, as late as ES 3.2, GetInternalformat only supports
RENDERBUFFER and 2DMS(_ARRAY) targets.

Secondly, the _mesa_has_ext helpers are very accurate... a little too
accurate, some might say. If we only show an extension in compat
profiles because core profiles have the functionality guaranteed, they
will return false. Fix these to either check for a core profile
explicitly, or to a different-but-identical extension available in core
profile.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matteo Bruni <matteo.mystral@gmail.com>
Tested-by: Matteo Bruni <matteo.mystral@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit c42acd93d4)
2016-11-08 16:23:10 +00:00
Ilia Mirkin
5eabc81d50 main: GL_RGB10_A2UI does not come with GL 3.0/EXT_texture_integer
Add a separate extension check for that format. Prevents glTexImage from
trying to find a matching format, which fails on drivers without support
for this format.

Fixes: sized-texture-format-channels (on a3xx)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 36347c8d6f)
2016-11-08 16:23:10 +00:00
Jason Ekstrand
2fbce4c9e1 nir/spirv: Use the correct sources for CompareExchange on images
The CompareExchange operation has two "Memory Semantics" parameters instead
of one so the real arguments start at w[7] instead of w[6].

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit f2a10937d8)
2016-11-08 16:23:10 +00:00
Jason Ekstrand
ab6126bb1d nir/spirv: Swap the argument order for AtomicCompareExchange
SPIR-V has the two arguments in the opposite order from GLSL.  NIR uses the
GLSL order so we had them backwards.

Fixes dEQP-VK.spirv_assembly.instruction.compute.opatomic.compex

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 0ead7bef6b)
2016-11-08 16:23:10 +00:00
Marek Olšák
f5de7da4e1 radeonsi: fix cubemaps viewed as 2D
This fixes: GL43-CTS.texture_view.view_sampling

v2: fix a typo, merge both if statements

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Dave Airlie <airlied@redhat.com> (v1)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit a4fa215058)
2016-11-08 16:23:10 +00:00
Ilia Mirkin
05ec6a7c03 a3xx: use window scissor to simulate viewport xy clip
Unfortunately a3xx does not have a separate disable for depth clipping,
so when depth clamp is enabled, we disable the whole 3d clipper logic.
This in turn also gets rid of the xy clip that it would normally do.
When we detect this would happen, instead we integrate the viewport into
the window scissor. This may have slightly different behavior around
wide points, but it's unlikely that anything depends on this.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97231
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit ca313e00b6)
[Emil Velikov: s|batch->||g]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/gallium/drivers/freedreno/a3xx/fd3_emit.c
2016-11-08 16:23:10 +00:00
Ilia Mirkin
dee992caa1 a3xx: make use of software clipping when hw can't handle it
The hw clipper only handles up to 6 UCPs. If there are more than 6 UCPs,
or a clip vertex, or clip distances are in use, then we must use the
fallback discard-based clipping from the frag shader.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 83d7230fd5)
2016-11-08 16:23:10 +00:00
Ilia Mirkin
68620d14d4 a3xx: make sure to actually clamp depth as requested
We were previously ... not clamping. I guess this meant that everything
got clamped to 1/0, which was enough to pass the existing tests. Or
perhaps the clamping would only happen to the rasterized depth value and
not the frag shader's output depth value.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97231
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit dac72234c7)
[Emil Velikov: s|batch->||g]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-11-08 16:23:10 +00:00
Ilia Mirkin
42a890891c nv30: set usage to staging so that the buffer is allocated in GART
The code a few lines below expects to migrate the bo in question to
VRAM. Since we're filling the initial data via CPU, it's more efficient
to create the temporary buffer in GART. There is no "push" method
implemented, otherwise we'd use that instead.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 6118bcab4e)
2016-10-31 17:39:42 +00:00
Michel Dänzer
d3d33918c7 loader/dri3: Overhaul dri3_update_num_back
Always use 3 buffers when flipping. With only 2 buffers, we have to wait
for a flip to complete (which takes non-0 time even with asynchronous
flips) before we can start working on the next frame. We were previously
only using 2 buffers for flipping if the X server supports asynchronous
flips, even when we're not using asynchronous flips. This could result
in bad performance (the referenced bug report is an extreme case, where
the inter-frame stalls were preventing the GPU from reaching its maximum
clocks).

I couldn't measure any performance boost using 4 buffers with flipping.
Performance actually seemed to go down slightly, but that might have
been just noise.

Without flipping, a single back buffer is enough for swap interval 0,
but we need to use 2 back buffers when the swap interval is non-0,
otherwise we have to wait for the swap interval to pass before we can
start working on the next frame. This condition was previously reversed.

Cc: "12.0 11.2" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97260
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 1e3218bc5b)

Squashed with commit:

loader/dri3: Always use at least two back buffers

This can make a significant difference for performance with some extreme
test cases such as vblank_mode=0 glxgears.

Fixes: 1e3218bc5b ("loader/dri3: Overhaul dri3_update_num_back")
Cc: "12.0 11.2" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97549
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
(cherry picked from commit dc3bb5db8c)
2016-10-31 17:39:32 +00:00
Emil Velikov
71b47b9cfe Revert "i965/miptree: Stop multiplying cube depth by 6 in HiZ calculations"
This reverts commit be0344f630.

The commit depends on 48e9ecc47f ("Revert "i965/miptree: Set
logical_depth0 == 6 for cube maps") which was reverted earlier.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97781
2016-09-14 12:14:01 +01:00
Emil Velikov
7757de1ebf glx/glvnd: list the strcmp arguments in correct order
Currently, due to the inverse order, strcmp will produce negative result
when the needle is towards the start of the haystack. Thus on the next
iteration(s) we'll end up further towards the end and eventually fail to
locate the entry.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 62b224d428)
2016-09-05 11:59:25 +01:00
Ilia Mirkin
8e9b6161eb gk110/ir: fix quadop dall emission
We recently starting to always emit the NDV (== dall) bit for quadops.
However it was folded into the wrong code word.

Fixes: e0a067ed48 (nv50/ir: always emit the NDV bit for OP_QUADOP)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 61e978524a)
2016-09-05 11:37:18 +01:00
Ilia Mirkin
7c96b11fd6 a4xx: make sure to actually clamp depth as requested
We were previously ... not clamping. I guess this meant that everything
got clamped to 1/0, which was enough to pass the existing tests. Or
perhaps the clamping would only happen to the rasterized depth value and
not the frag shader's output depth value.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97231
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org

(cherry-picked from 89f00f749f)
[imirkin: adjust ctx->batch to just ctx]
2016-09-05 11:37:07 +01:00
Emil Velikov
49e84b8f18 Revert "i965/miptree: Set logical_depth0 == 6 for cube maps"
This reverts commit 48e9ecc47f.

The commit regressed several piglit tests on SNB/ILK hardware.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97567
2016-09-05 11:37:06 +01:00
Ilia Mirkin
0fa0e2a505 nv30: only bail on color/depth bpp mismatch when surfaces are swizzled
The actual restriction is a little weaker than I originally thought. See
https://bugs.freedesktop.org/show_bug.cgi?id=92306#c17 for the
suggestion. This also explain why things weren't *always* failing
before, only sometimes. We will allocate a non-swizzled depth buffer for
NPOT winsys buffer sizes, which they almost always are.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 8caf2cb0c0)
2016-09-01 11:39:47 +01:00
Jason Ekstrand
9a8d605398 anv: Rework pipeline caching
The original pipeline cache the Kristian wrote was based on a now-false
premise that the shaders can be stored in the pipeline cache.  The Vulkan
1.0 spec explicitly states that the pipeline cache object is transiant and
you are allowed to delete it after using it to create a pipeline with no
ill effects.  As nice as Kristian's design was, it doesn't jive with the
expectation provided by the Vulkan spec.

The new pipeline cache uses reference-counted anv_shader_bin objects that
are backed by a large state pool.  The cache itself is just a hash table
mapping keys hashes to anv_shader_bin objects.  This has the added
advantage of removing one more hand-rolled hash table from mesa.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97476
Acked-by: Kristian Høgsberg Kristensen <krh@bitplanet.net>
(cherry picked from commit 10f9901bce)
2016-09-01 11:39:47 +01:00
Jason Ekstrand
17d40ca82b anv/pipeline: Add support for caching the push constant map
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
(cherry picked from commit ffcef720b7)
[Emil Velikov: dependency for the next patch]
Nominated-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-01 11:39:47 +01:00
Jason Ekstrand
a8e4b59cfd anv: Add a struct for storing a compiled shader
This new anv_shader_bin struct stores the compiled kernel (as an anv_state)
as well as all of the metadata that is generated at shader compile time.
The struct is very similar to the old cache_entry struct except that it
is reference counted and stores the actual pipeline_bind_map.  Similarly to
cache_entry, much of the actual data is floating-size and stored after the
main struct.  Unlike cache_entry, which was storred in GPU-accessable
memory, the storage for anv_shader_bin kernels comes from a state pool.
The struct itself is reference-counted so that it can be used by multiple
pipelines at a time without fear of allocation issues.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Acked-by: Kristian Høgsberg Kristensen <krh@bitplanet.net>
(cherry picked from commit 6899718470)
2016-09-01 11:39:47 +01:00
Jason Ekstrand
2566315063 anv: Add pipeline_has_stage guards a few places
All of these worked before because they were depending on prog_data to be
null.  Soon, we won't be able to depend on a nice prog_data pointer and
it's nice to be more explicit anyway.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 13c09fdd0c)
2016-09-01 11:39:47 +01:00
Jason Ekstrand
b529a77d79 anv: Remove unused fields from anv_pipeline_bind_map
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit b259d86ad6)
2016-09-01 11:39:47 +01:00
Jason Ekstrand
d159ca4fa2 anv/pipeline: Properly handle OOM during shader compilation
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit d5945bec12)
2016-09-01 11:39:47 +01:00
Jason Ekstrand
1ce414accf anv/allocator: Correctly set the number of buckets
The range from ANV_MIN_STATE_SIZE_LOG2 to ANV_MAX_STATE_SIZE_LOG2 should
be inclusive and we have asserts that ensure that you never try to allocate
a state larger than (1 << ANV_MAX_STATE_SIZE_LOG2).  However, without
adding 1 to the difference, we allocate 1 too few bucckts and so, even
though we have an assert, anything landing in the last bucket will fail to
allocate properly..

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit a0f5c496e3)
2016-09-01 11:39:47 +01:00
Jason Ekstrand
e12b7486b3 anv/pipeline: Fix bind maps for fragment output arrays
Found by inspection.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 4200c2266e)
2016-09-01 11:39:47 +01:00
Jason Ekstrand
1d0c79b13b anv/descriptor_set: memset anv_descriptor_set_layout
We hash this data structure so we can't afford to have uninitialized data
even if it is just structure padding.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit d316cec1c1)
2016-09-01 11:39:46 +01:00
Samuel Pitoiset
04f04ab6a6 nv50/ir: always emit the NDV bit for OP_QUADOP
This silences a divergent error found with F1 2015.

Basically, the NDV bit has to be set when a FSWZ instruction is
inside divergent code, but it's not needed otherwise. The correct
fix should be to set it only in divergent code situations.

GM107 emitter already sets that bit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit e0a067ed48)
2016-09-01 11:39:46 +01:00
Emil Velikov
5af16ddf84 i915: Check return value of screen->image.loader->getBuffers
Ported from the i965 commit e7ab358e81.

Cc: 11.2 12.0 <mesa-stable@lists.freedesktop.org>
Cc: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
(cherry picked from commit 5de640a518)
2016-09-01 11:39:46 +01:00
Ilia Mirkin
178c34c535 nouveau: always enable at least one RC
Experimentally, this is required for glxgears and others to display the
proper colors. This is also what the code used to do before the
referenced commit.

Fixes: c703658b39 (mesa: Drop _EnabledUnits.)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 357d8261f1)
2016-09-01 11:39:46 +01:00
Brian Paul
7c583adfb5 mesa: fix format conversion bug in get_tex_rgba_uncompressed()
We need to set the need_convert flag with each loop iteration, not
just when the rgba pointer is null.

Bug reported by Markus Müller <mueller@imfusion.de> on mesa-users list.
Fixes new piglit arb_texture_float-get-tex3d test.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
(cherry picked from commit b9b88516f8)
2016-09-01 11:39:46 +01:00
Ilia Mirkin
f70585e56a main: add missing EXTRA_END in OES_sample_variables get check
Fixes: 3002296cb6 (mesa: add GL_OES_shader_multisample_interpolation support)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 05b37e20de)
2016-09-01 11:39:46 +01:00
Jason Ekstrand
2d48468e58 isl: Allow multisampled array textures
This probably isn't the only thing that needs to be done to get
multisampled array textures working in Vulkan but I think this is all that
ISL really needs and it does fix 8 of the new CTS tests.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
(cherry picked from commit fb89551047)
2016-09-01 11:39:46 +01:00
Ian Romanick
ab0183172f glsl: Mark cube map array sampler types as reserved in GLSL ES 3.10
All the GLSL 4.x keywords were added to the list of reserved keywords
in GLSL ES 3.10.  As far as I can tell, these are the only ones that
were missed.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit c879dbc4e4)
2016-09-01 11:39:46 +01:00
Miklós Máté
1d4c887020 vbo: set draw_id
Fixes conditional jump depending on uninitialized value
in si_state_draw.c:593

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Miklós Máté <mtmkls@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit b9ac72b511)
2016-09-01 11:39:46 +01:00
Chad Versace
a0e81225bd i965: Respect miptree offsets in intel_readpixels_tiled_memcpy()
Respect intel_miptree_slice::x_offset,y_offset and
intel_mipmap_tree::offset. All three may be non-zero when glReadPixels
is called on an EGLImage created from the non-base slice of a miptree.

Patch 2/2 that fixes test
'dEQP-EGL.functional.image.create.gles2_cubemap_*'.

Reported-by: Haixia Shi <hshi@chromium.org>
Diagnosed-by: Haixia Shi <hshi@chromium.org>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Change-Id: I4b397b27e55a743a7094d29fb0a6a4b6b34352b0
(cherry picked from commit 5b03975889)
2016-09-01 11:39:46 +01:00
Chad Versace
6898eb5859 i965: Fix miptree layout for EGLImage-based renderbuffers
When glEGLImageTargetRenderbufferStorageOES() was given an EGLImage
created from the non-base slice of a miptree,
intel_image_target_renderbuffer_storage() forgot to apply the intra-tile
offsets __DRIimage::tile_x,tile_y to the miptree layout.

This patch fixes the problem with a quick hack suitable for
cherry-picking. A proper fix requires more thorough plumbing in
intel_miptree_create_layout() and brw_tex_layout().

Patch 1/2 that fixes test
'dEQP-EGL.functional.image.create.gles2_cubemap_*'.

Reported-by: Haixia Shi <hshi@chromium.org>
Diagnosed-by: Haixia Shi <hshi@chromium.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
Change-Id: I8a64b0048a1ee9e714ebb3f33fffd8334036450b
(cherry picked from commit c82f99e883)
2016-09-01 11:39:46 +01:00
Matt Turner
9aa4e400d2 nir: Walk blocks in source code order in lower_vars_to_ssa.
Prior to this commit rename_variables_block() is recursively called,
performing a depth-first traversal of the control flow graph. The
function uses a non-trivial amount of stack space for local variables,
which puts us in danger of smashing the stack, given a sufficiently deep
dominance tree.

XCOM: Enemy Within contains a shader with such a dominance tree (1574
nir_blocks in total, depth of at least 143).

Jason tells me that he believes that any walk over the nir_blocks that
respects dominance is sufficient (a DFS might have been necessary prior
to the introduction of nir_phi_builder).

In fact, the introduction of nir_phi_builder made the problem worse:
rename_variables_block(), walks to the bottom of the dominance tree
before calling nir_phi_builder_value_get_block_def() which walks back to
the top of the dominance tree...

In any case, this patch ensures we avoid that problem as well.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97225
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
(cherry picked from commit e53130cc27)
2016-09-01 11:39:46 +01:00
Brian Paul
b061b2e3eb swrast: fix incorrectly positioned putImage() in swrast driver
Some front buffer rendering was in the wrong position.  This included
scissored clears, glDrawPixels and glCopyPixels.  The problem was the
y coordinate passed to putImage() didn't match the y coordinate passed
to getImage().

We fix this by setting xrb->map_y to the inverted coordinate in
swrast_map_renderbuffer() which is used later by the putImage() call.
Also pass xrb->map_y to getImage() to be symmetric.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97426
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 2a2dc416b6)
2016-09-01 11:39:45 +01:00