71617 commits

Author	SHA1	Message	Date
Georg Lehmann	2306cba65b	nir: remove manual nir_store_global ... Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37959>	2025-10-21 12:37:58 +02:00
Georg Lehmann	9e41a7c139	treewide: use nir_load_global alias of nir_build_load_global ... Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37959>	2025-10-21 12:37:58 +02:00
Georg Lehmann	77540cac8c	nir: remove manual nir_load_global ... Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37959>	2025-10-21 12:37:58 +02:00
Eric Engestrom	1773e2df50	ci: uprev vkd3d ... 0845d1b69c...03cca4cd97 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37960>	2025-10-21 03:57:14 +00:00
Emma Anholt	c76b52ae00	virgl: Fix VIRGL_DEBUG=tgsi to work on debugoptimized builds. ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37313>	2025-10-20 19:24:44 +00:00
Silvio Vilerino	a5af8866df	p_video_codec::encode_bitstream_sliced: Add last_slice_completion_fence for PIPE_VIDEO_SLICE_MODE_AUTO ... Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Reviewed-by: Pohsiang (John) Hsu <pohhsu@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37936>	2025-10-20 13:37:16 +00:00
Patrick Lerda	84dc9af3d4	r600: update nplanes support ... This change fixes "piglit/bin/ext_image_dma_buf_import-export -auto". Fixes: 02aaf360ae ("r600: Implement resource_get_param") Signed-off-by: Patrick Lerda <patrick9876@free.fr> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37840>	2025-10-20 11:42:35 +00:00
Patrick Lerda	3b1e3a40a8	r600: fix r600_draw_rectangle refcnt imbalance ... The object buf is referenced at the beginning of the r600_draw_rectangle() function and should be freed at the end. This issue was introduced with cbb6e0277f. Fixes: cbb6e0277f ("r600: stop using util_set_vertex_buffers") Signed-off-by: Patrick Lerda <patrick9876@free.fr> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37617>	2025-10-20 11:28:39 +00:00
David Rosca	ffec70465c	radeonsi/video: Remove rvid_buffer ... Not used anymore. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:07 +00:00
David Rosca	9764748f91	radeonsi/vpe: Stop using rvid_buffer ... Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:07 +00:00
David Rosca	0c270c602d	radeonsi/vce,uvd_enc: Stop using rvid_buffer ... Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:07 +00:00
David Rosca	a0324576aa	radeonsi/vcn: Stop using rvid_buffer ... Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:07 +00:00
David Rosca	a25db1c53c	radeonsi/video: Change si_vid_resize_buffer to take si_resource ... Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:07 +00:00
David Rosca	663eada9b2	radeonsi/uvd_enc: Don't use temporary feedback buffer when not needed ... We don't request feedback for create and destroy commands, so it's not needed to allocate feedback buffer. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:06 +00:00
David Rosca	1033ac0879	radeonsi/vcn: Don't use temporary feedback buffer when not needed ... We don't request feedback for create and destroy commands, so it's not needed to allocate feedback buffer. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:06 +00:00
David Rosca	86832f7499	radeonsi/vpe: Stop clearing embedded buffer on allocation ... If it was needed, it would be needed to clear it before every submission as well. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:05 +00:00
Martin Roukala (né Peres)	33232223f6	zink/ci: update the expectations of RADV-based pre-merge jobs ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37934>	2025-10-20 10:30:51 +00:00
Jose Maria Casanova Crespo	a131530dd1	v3d: mark FRAG_RESULT_COLOR as output_written on SAND blits FS ... With the introduction of "v3d: Add support for 16bit normalised formats" https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35820 nir_lower_fragcolor is always called if shaders outputs_written shows that FRAG_RESULT_COLOR is used. But on SAND8/30 blit fragment shaders although the FRAG_RESULT_COLOR is used, it was not marked as output_written so the lowering was not applied. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14141 Fixes: ee48e81b26 ("v3d: Always lower frag color") Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37949>	2025-10-20 09:42:19 +02:00
Marek Olšák	e2b271d7b1	radeonsi/ci: update hawaii failures ... Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37910>	2025-10-19 17:01:44 +00:00
Marek Olšák	f5b648f6d3	winsys/radeon: fix completely broken tessellation for gfx6-7 ... The info was moved to radeon_info, but it was only set for the amdgpu kernel driver. It was uninitialized for radeon. Fixes: d82eda72a1 - ac/gpu_info: move HS info into radeon_info Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37910>	2025-10-19 17:01:43 +00:00
Qiang Yu	11f2babddc	mesa,gallium: not touch TS when internal draws ... TS does not affect vertex pipeline draws. We keep mesh shader before radeonsi is ready. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:19 +00:00
Qiang Yu	4711fb711c	gallium/blitter: no need to save TS state ... TS does not affect blitter currently. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:19 +00:00
Qiang Yu	71e0895715	mesa,radeonsi: add comments about vertex and mesh pipeline shader states ... They are exclusive in mesa state tracker currently, so add some comments and assertions for developers. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:19 +00:00
Qiang Yu	dcf2399e6f	radeonsi: save mesh shader when blit ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:19 +00:00
Qiang Yu	ffc3d430db	radeonsi: simplify si_update_rasterized_prim while handle mesh shader ... Otherwise mesh shader ends in the "else" section. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:19 +00:00
Qiang Yu	56a437183a	radeonsi: si_get_vs support mesh shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:19 +00:00
Qiang Yu	7e83962e85	radeonsi: update scratch va for mesh shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:19 +00:00
Qiang Yu	de4fb088d3	radeonsi: share some vertex pipe function with mesh pipe ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:18 +00:00
Qiang Yu	e6e21dfbf2	radeonsi: kill outputs for mesh shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:18 +00:00
Qiang Yu	4c315bdbfa	radeonsi: lower task/mesh shader io to mem ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:18 +00:00
Qiang Yu	5931dbf7ac	radeonsi: add task info to screen ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:18 +00:00
Qiang Yu	73aebeec42	radeonsi: no ngg culling for mesh shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:17 +00:00
Qiang Yu	74894150f1	radeonsi: init pm4 state for mesh shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:17 +00:00
Qiang Yu	ce6a1e7563	radeonsi: init mesh shader args ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:16 +00:00
Qiang Yu	2038134efc	radeonsi: calc workgroup size for mesh shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:15 +00:00
Qiang Yu	977a3f45bf	radeonsi: add task/mesh shader info to si_shader_info ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:15 +00:00
Qiang Yu	8659666089	radeonsi: add si_mesh_resources_add_all_to_bo_list ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:14 +00:00
Qiang Yu	b533d39b95	radeonsi: inline uniform support mesh shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:14 +00:00
Qiang Yu	8a3ef188c2	radeonsi: add context shader state for mesh shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:13 +00:00
Qiang Yu	24d7c9a2a8	radeonsi: handle mesh shader when si_create_shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:12 +00:00
Qiang Yu	f06a1b0d07	radeonsi: enlarge SI_NUM_SHADERS for mesh shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:12 +00:00
Mike Blumenkrantz	f74cf45078	zink: consistently set/unset msrtss in begin_rendering ... this has to always be set or unset, never persistent from previous renderpass Fixes: 5080f2b6f5 ("zink: disable msrtss handling when blitting") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37923>	2025-10-16 22:22:34 -04:00
Marek Olšák	733ba77bfe	r300: fix DXTC blits ... Fixes: 9d359c6d10 - gallium: delete pipe_surface::width and pipe_surface::height Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37912>	2025-10-16 22:33:50 +00:00
Gert Wollny	ba35ac29b6	r600/sfn: drop range pinning for registers after RA ... Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37847>	2025-10-16 20:57:18 +00:00
Gert Wollny	5962add398	r600/sfn: correct register interference range ... If a life range of one register starts in the same instruction where the life range of another register ends, then the two ranges don't overlap. v2: Fix test Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37847>	2025-10-16 20:57:18 +00:00
Mary Guillemard	b2accf86d1	poly: Migrate AGX's GS/TESS emulation to common code ... This moves most of the code to a new home: src/poly. Most precomp kernels logic that could be moved are provided by poly now. Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37914>	2025-10-16 19:25:35 +00:00
Mary Guillemard	60e5abdbaa	asahi: Move compiler preprocess out of agx_nir_lower_gs ... We run agx_preprocess_nir as the last step of each new compute shaders in agx_nir_lower_gs but we could move this out of the pass and makes it the driver responsability to call it. Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37914>	2025-10-16 19:25:35 +00:00
Mary Guillemard	71c4943c37	compiler: rename vs.tes_agx bit to vs.tes_poly ... Preparing to move AGX's GS/TESS lowering code. Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37914>	2025-10-16 19:25:35 +00:00
Mary Guillemard	1e0c18d6cf	nir: Rename stat_query_address_agx to stat_query_address_poly ... This is used by the geometry lowering that we are going to move to common code. Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37914>	2025-10-16 19:25:35 +00:00
David Rosca	09ff0fa005	frontends/va: Move remainig processing functions to postproc.c ... Reviewed-by: Leo Liu <leo.liu@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37545>	2025-10-16 16:33:15 +00:00