Commit graph

10046 commits

Author SHA1 Message Date
Samuel Pitoiset
0ba3a8b3cc radv: add clip rects state bit for emitting discard rectangles
Some checks are pending
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Better match the hw naming.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34361>
2025-04-08 08:42:17 +00:00
Samuel Pitoiset
08918f0880 radv: regroup emitting all MSAA states in one function
All register writes are optimized out. Also this will allow to use
paired context register writes on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34361>
2025-04-08 08:42:17 +00:00
Samuel Pitoiset
e8d787e1ef radv: track more MSAA related register writes
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34361>
2025-04-08 08:42:17 +00:00
Samuel Pitoiset
a327bc677a radv: configure COVERAGE_TO_SHADER_SELECT only if conservative rast is enabled
When conservative rasterization isn't enabled, FullyCoveredEXT is
expected to return 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34361>
2025-04-08 08:42:17 +00:00
Samuel Pitoiset
6e9782b39c radv: emit conservative raster mode as part of the MSAA state
From the hw perspective, it's more like a MSAA state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34361>
2025-04-08 08:42:17 +00:00
Samuel Pitoiset
ed744b5c68 radv: move emitting raster and depth/stencil state slightly earlier
To avoid a redundant chekc if no dynamic states are dirtied.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34361>
2025-04-08 08:42:17 +00:00
Samuel Pitoiset
ef9e7cb3f5 radv: add before/after draw functions for DGC
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34381>
2025-04-08 08:15:05 +02:00
Samuel Pitoiset
d2da54e6f3 radv: apply the workaround for buggy HiZ/HiS on GFX12 for DGC
Backport-to: 25.0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34381>
2025-04-08 08:15:04 +02:00
Samuel Pitoiset
6388db03c8 radv: add a workaround for buggy HiZ/HiS on GFX12
HiZ/HiS is buggy and can cause random GPU hangs when stencil is enabled.
There are basically two alternatives but RADV follows RadeonSI and emit
a dummy RELEASE_MEM packet after every draw which should workaround the
issue and maintain performance.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12944
Backport-to: 25.0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34381>
2025-04-08 08:09:13 +02:00
Samuel Pitoiset
11b6d2ba60 radv: determine if HiZ/HiS is enabled earlier on GFX12
To lower CPU overhead of the hardware workaround.

Backport-to: 25.0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34381>
2025-04-08 08:03:11 +02:00
Samuel Pitoiset
e3c3fa8b9a radv: add a fuction to emit the VRS surface on GFX11
Some checks are pending
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34357>
2025-04-07 15:09:18 +00:00
Samuel Pitoiset
00354f0a74 radv: do not emit the VRS surface VA when it's not enabled
This shouldn't be necessary because VRS_SURFACE_ENABLE is the toggle
bit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34357>
2025-04-07 15:09:18 +00:00
Samuel Pitoiset
9b11caee40 radv: stop emitting CB_FDCC_CONTROL to zero on GFX11-GFX11.5
It's already emitted by the CLEAR_STATE packet on these GPUs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34357>
2025-04-07 15:09:18 +00:00
Samuel Pitoiset
17e5fd856f radv: split null framebuffer state emission for GFX12
For consistency with color/ds states emission.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34357>
2025-04-07 15:09:18 +00:00
Samuel Pitoiset
c608a601bf radv: split framebuffer depth/stencil state emission for GFX12
It's also really simpler on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34357>
2025-04-07 15:09:18 +00:00
Samuel Pitoiset
d5eb1f6833 radv: split framebuffer color state emission for GFX12
It's really simpler on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34357>
2025-04-07 15:09:18 +00:00
Samuel Pitoiset
9dec80d8cf radv: tidy up radv_emit_db_shader_control()
To separate packet construction and emission.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34357>
2025-04-07 15:09:18 +00:00
Samuel Pitoiset
4bc6335e3c radv: restore DB_DFSM_CONTROL properly when POPS isn't used
It looks safer to restore this register to its initial value when POPS
isn't used. Only VEGA10 and RAVEN are concerned.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34357>
2025-04-07 15:09:18 +00:00
Samuel Pitoiset
cb390ca234 radv: tidy up radv_emit_raster_state()
To separate packet construction and emission.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34357>
2025-04-07 15:09:18 +00:00
Samuel Pitoiset
62e4b1130a radv: remove useless FDCC_ENABLE bitfield clear on GFX12
This bit doesn't exist.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34357>
2025-04-07 15:09:18 +00:00
Samuel Pitoiset
042770ceea ac,radv: remove has_scheduled_fence_dependency
This isn't used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34375>
2025-04-07 06:44:22 +00:00
MaciejDziuban
f31a33905a radv: Use vk_video_derive_h265_scaling_list
This commit makes radv use vk_video_derive_h265_scaling_list, which properly
applies default scaling lists whenever they're needed. It also simplifies
update_h265_scaling function into a simple memcpy. The firmware interface
struct and Vulkan's StdVideoH265ScalingLists struct both have identical memory
layouts, so it's not neccessary divide it into multiple copies with offsets.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34096>
2025-04-04 07:23:48 +00:00
Timur Kristóf
e258492a8f radv: Remove radv_streamout_info::num_outputs.
This field was never used for determining the number of outputs,
just for determining whether streamout was enabled, which makes
it unnecessary. We can use enabled_stream_buffers_mask for that.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34317>
2025-04-03 19:54:51 +00:00
Timur Kristóf
ce2138d73a radv: Call nir_opt_undef too after nir_opt_varyings.
Shaders may have undefined output stores after nir_opt_varyings.
These must be optimized out, otherwise they hit an assertion.

Fixes: 17f6ab28cc
Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34317>
2025-04-03 19:54:51 +00:00
Timur Kristóf
15d0804670 radv: Use buffers_written mask when gathering XFB info.
We need to enable these buffers regardless of whether or not the
shader actually writes any outputs to them, otherwise we break
XFB queries.

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34317>
2025-04-03 19:54:51 +00:00
Stéphane Cerveau
ee535aa039 radv: video: rework maxActiveReferenceSlot/MaxDpbSlots
Some checks are pending
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For the pReferenceSlots.slotIndex, the max
value should the maxDpbSlots which is
h264: 16 + 1
h265 : 15 + 2
av1: 7+2

Fixing SVA_CL1_E test vector in JVT-AVC_V1
fluster test suite.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33094>
2025-04-03 13:20:45 +00:00
Samuel Pitoiset
ef3363ef71 radv: rework suspend/resume user conditional rendering
Some checks are pending
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Better to suspend/resume in the top level function.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34338>
2025-04-03 08:54:36 +00:00
Samuel Pitoiset
4bc971a0bd radv: add new helper to suspend/resume user conditional rendering
Instead of duplicating same code everywhere.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34338>
2025-04-03 08:54:36 +00:00
Samuel Pitoiset
4d1d6d4147 radv: fix ignoring conditional rendering with vkCmdResolveImage()
This command isn't supposed to be affected by conditional rendering.

This fixes new VKCTS coverage
dEQP-VK.conditional_rendering.conditional_ignore.resolve_image*.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34338>
2025-04-03 08:54:36 +00:00
David Rosca
597f13b244 radv: Add radv_format_description to remap 10/12bit formats to 16bit
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Remapping was missing for format description which made these formats
effectively unsupported as zero format features were reported.

Fixes: 0098f8ef35 ("radv: Remap 10 and 12 bit formats to 16 bit formats")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34274>
2025-04-02 08:40:28 +00:00
David Rosca
3ef0ee2241 radv: Use radv_format_to_pipe_format instead of vk_format_to_pipe_format
Fixes: 9af11bf306 ("radv: add initial DCC support on GFX12")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34274>
2025-04-02 08:40:28 +00:00
Samuel Pitoiset
64e6e043b3 Revert "radv: program SAMPLE_MASK_TRACKER_WATERMARK optimally for GFX11 APUs"
This reverts commit 96e9c3fe77.

This actually causes random GPU hangs like on Phoenix.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12461
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12426
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12692
Tested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34306>
2025-04-02 07:10:40 +00:00
Autumn Ashton
ae6d24c4ef radv: Expose VK_SAMPLE_COUNT_1_BIT for sample position on GFX10+
This works on GFX10+.

Signed-off-by: Autumn Ashton <misyl@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28237>
2025-04-01 21:15:34 +01:00
Autumn Ashton
693e3b47f7 radv: Expose EXT_sample_locations everywhere
This works and passes CTS now!

Signed-off-by: Autumn Ashton <misyl@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28237>
2025-04-01 21:15:31 +01:00
Autumn Ashton
343c434c50 radv: Enable fragmentShadingRateWithCustomSampleLocations
We need to expose this, as we support it.

Otherwise 1x1 is assumed and we fail some CTS.

Signed-off-by: Autumn Ashton <misyl@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28237>
2025-04-01 21:15:28 +01:00
Autumn Ashton
3d75082c02 radv: Fix compute resolve rounding
When we are using compute resolve, we can get
values the CTS does not expect due to the value
we end up writing for UNORM in
`nir_image_deref_store`.

Make the compute resolve rounding path match with
the output of the fragment shader resolve path,
by going through the same FP16 RTZ conversion as
we do for UNORM/SNORM formats.

This is why VK_EXT_sample_locations CTS was
failing on > GFX9.
On <= GFX9, I am assuming we are falling back to
RESOLVE_FRAGMENT, due to DCC stuff, which is why
it works there.

I tested a handful of images from the Vulkan CTS
for the sample locations and resolve tests for
diff UNORM formats from the qpa file forcing
FRAGMENT and with this change.
With this change, we now match on the compute
resolve path the same sha for the ones I compared
with ImageMagick `identify`.

CTS passes for: *resolve*, *image_clearing* and
*sample_locations* on RX 7900XTX.

Signed-off-by: Autumn Ashton <misyl@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28237>
2025-04-01 21:15:24 +01:00
Samuel Pitoiset
71b49aecdc radv: switch back radeon_cmdbuf to use 32-bit counters
This has been tested again with vkoverhead on 4 different CPUs and
using 32-bit counters is the fastest combination overall.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34229>
2025-04-01 06:18:28 +00:00
Samuel Pitoiset
f0b3a6f9d4 radv: rework command buffer emission with begin/end sequences
A begin/end sequence is something like (it's all macros based):

   radeon_begin(cs);
   radeon_emit(PKT3(PKT3_DRAW_INDEX_AUTO, 1, cmd_buffer->state.predicating));
   radeon_emit(vertex_count);
   radeon_emit(V_0287F0_DI_SRC_SEL_AUTO_INDEX | use_opaque);
   radeon_end();

This is loosely based on RadeonSI (see !8653 (a0978fff)) and it seems
indeed faster overall.

The main goal of this rework is to re-use the same logic as RadeonSI
for paired packets on GFX12 (also GFX11 dGPUs) because it's supposed
to be way faster, especially on GFX12 where the CP is slow. The other
goal is to share more cmdbuf emission between both drivers in the near
future.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34229>
2025-04-01 06:18:28 +00:00
Samuel Pitoiset
97e8872f1c radv: only enable HTILE for depth/stencil attachment images
Some checks are pending
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It's really only useful for depth/stencil attachments. vkd3d and DXVK
both always use that usage flag for depth/stencil images.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34231>
2025-03-31 11:55:02 +00:00
Samuel Pitoiset
ba9988d230 radv: remove useless use of radv_image_use_comp_to_single()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34231>
2025-03-31 11:55:02 +00:00
Samuel Pitoiset
5398ec6356 radv: add queue family assertions when doing decompression passes
This is to make sure the previous functions that are supposed to
trigger a decompression pass work as expected.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34231>
2025-03-31 11:55:02 +00:00
Samuel Pitoiset
086f529bbe radv: do not trigger FCE or FMASK decompress on compute queue
A pipeline barrier which contains an image layout transition like
COLOR_ATTACHMENT_OPTIMAL -> TRANSFER_DST_OPTIMAL on compute queue
would just hang. Such a barrier is useless in practice but it's legal.

Prevent GPU hangs by skipping FCE or FMASK_DECOMPRESS when it's not
on the graphics queue.

Fixes dEQP-VK.synchronization2.layout_transition.compute_transition*.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34231>
2025-03-31 11:55:02 +00:00
Natalie Vock
c1e1d86bd1 radv/rt: Flush CP writes from the common BVH framework with INV_L2 on GFX12
a1b05991 ("radv/rt: Flush L2 after writing internal node offset on GFX12")
did this for radv-internal CP writes - we also need to do this for PLOC
sync data initialization which is done in the common framework.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34178>
2025-03-28 23:07:17 +00:00
Dave Airlie
dc8e21ce60 radv: expose VK_KHR_video_mainteance2
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34204>
2025-03-28 21:18:00 +00:00
Dave Airlie
feef12b2a8 radv/video: convert to using common parameter wrappers.
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34204>
2025-03-28 21:18:00 +00:00
Samuel Pitoiset
a7d8e5d4ca ac,radv,radeonsi: use PM4 for shadowed registers
Some checks are pending
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34228>
2025-03-28 20:50:22 +00:00
Samuel Pitoiset
250742519f radv: disable TC-compatible CMASK with {FMASK,DCC}_DECOMPRESS
Because if FMASK_COMPRESS_1FRAG_ONLY is set, the FMASK decompress
operation actually doesn't occur. Note that DCC_DECOMPRESS implicitly
decompresses FMASK.

This fixes an issue on GFX10-GFX10.3 which is uncovered by enabling
VK_EXT_sample_locations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33639>
2025-03-28 19:41:07 +00:00
Samuel Pitoiset
8c96b9e306 radv: make sure to always decompress FMASK before expanding it
This is actually required even for TC-compatible CMASK images.

VKCTS coverage is missing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33639>
2025-03-28 19:41:07 +00:00
Samuel Pitoiset
42b0df447c radv: inline radv_fast_clear_flush_image_inplace()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33639>
2025-03-28 19:41:07 +00:00
Samuel Pitoiset
09d91837e4 radv: rework radv_handle_color_image_transition()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33639>
2025-03-28 19:41:07 +00:00