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radv/rt: Flush CP writes from the common BVH framework with INV_L2 on GFX12

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a1b05991 ("radv/rt: Flush L2 after writing internal node offset on GFX12")
did this for radv-internal CP writes - we also need to do this for PLOC
sync data initialization which is done in the common framework.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34178>
This commit is contained in:
Natalie Vock 2025-03-25 13:09:03 +01:00 • committed by Marge Bot
parent 51292976fe
commit c1e1d86bd1
1 changed files with 6 additions and 0 deletions
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6
src/amd/vulkan/radv_acceleration_structure.c
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@ -673,6 +673,12 @@ radv_write_buffer_cp(VkCommandBuffer commandBuffer, VkDeviceAddress addr, void *
static void
radv_flush_buffer_write_cp(VkCommandBuffer commandBuffer)
{
VK_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
const struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
const struct radv_physical_device *pdev = radv_device_physical(device);
if (pdev->info.cp_sdma_ge_use_system_memory_scope)
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_INV_L2;
}
static void