Commit graph

5014 commits

Author SHA1 Message Date
Timur Kristóf
64acec0ef9 nir: Fix lowering terminology of compute system values: "from"->"to".
This is to match other NIR terminology.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15103>
2022-03-08 17:36:31 +00:00
Samuel Pitoiset
516aee64cc radv,aco: do not lower nir_op_pack_{unorm,snorm}_2x16
v_cvt_pknorm_{u16,i16}_f32 can be emitted instead, it's supported on
all generations.

No fossils-db changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15215>
2022-03-03 14:54:12 +01:00
Rhys Perry
feb7e30e2d radv: include disable_aniso_single_level and adjust_frag_coord_z in key
Fixes potential pipeline caching bug.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15175>
2022-03-02 19:05:28 +00:00
Samuel Pitoiset
4380916b76 radv: disable DCC for Fable Anniversary, Dragons Dogma, GTA IV and more
Also Starcraft 2 and The Force Unleashed II.

These games are known to be affected by the feedback loop issue. We will
fix this properly soon but as a hotfix disabling DCC should be enough.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4424
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15203>
2022-03-01 16:33:18 +00:00
Samuel Pitoiset
1e010348ee radv: remove color exports in presence of holes
If there is holes, eg. if only MRT0 and MRT2 are exported, we have to
set MRT1 to SPI_SHADER_32_R to avoid a GPU hang but the export can
still be removed from the fragment shader.

fossils-db (Sienna Cichlid):
Totals from 565 (0.42% of 134913) affected shaders:
VGPRs: 13328 -> 11456 (-14.05%)
CodeSize: 613232 -> 548224 (-10.60%); split: -11.13%, +0.53%
LDS: 284672 -> 296960 (+4.32%)
MaxWaves: 17624 -> 17684 (+0.34%)
Instrs: 113056 -> 100445 (-11.15%); split: -11.68%, +0.53%
Latency: 684327 -> 639348 (-6.57%); split: -7.17%, +0.60%
InvThroughput: 122877 -> 104382 (-15.05%); split: -15.18%, +0.13%
VClause: 2601 -> 2323 (-10.69%); split: -10.77%, +0.08%
SClause: 5629 -> 5443 (-3.30%); split: -3.91%, +0.60%
Copies: 9393 -> 8720 (-7.16%); split: -8.22%, +1.05%
PreSGPRs: 14623 -> 13666 (-6.54%); split: -6.76%, +0.22%
PreVGPRs: 9847 -> 8503 (-13.65%)

fossils-db (Polaris10):
Totals from 565 (0.42% of 135960) affected shaders:
SGPRs: 28064 -> 27104 (-3.42%)
VGPRs: 12516 -> 10544 (-15.76%); split: -15.79%, +0.03%
CodeSize: 516920 -> 456536 (-11.68%); split: -11.68%, +0.00%
MaxWaves: 4369 -> 4418 (+1.12%)
Instrs: 97771 -> 85903 (-12.14%); split: -12.14%, +0.00%
Latency: 767482 -> 708545 (-7.68%); split: -7.97%, +0.29%
InvThroughput: 280017 -> 235744 (-15.81%)
VClause: 2270 -> 2090 (-7.93%); split: -8.50%, +0.57%
SClause: 5185 -> 5012 (-3.34%); split: -3.86%, +0.52%
Copies: 8328 -> 7555 (-9.28%); split: -9.35%, +0.07%
Branches: 1143 -> 1113 (-2.62%)
PreSGPRs: 13816 -> 12725 (-7.90%); split: -7.92%, +0.02%
PreVGPRs: 9707 -> 8270 (-14.80%)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15108>
2022-03-01 12:28:47 +01:00
Jonathan Gray
f0398180a5 radv: use MAJOR_IN_SYSMACROS for sysmacros.h include
fixes build on OpenBSD
../src/amd/vulkan/radv_device.c:35:10: fatal error: 'sys/sysmacros.h' file not found

Fixes: 7aaa54feb5 ("radv: implement VK_EXT_physical_device_drm")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13448>
2022-02-26 01:00:29 +00:00
Samuel Pitoiset
53ca85ac2a radv,drirc: move RADV workarounds to 00-radv-defaults.conf
Because we have to maintain two different packages of Mesa, one
specific to RADV and another one for RadeonSI and such, it's a bit
annoying to have to synchronize the drirc entries. Currently, only our
Mesa package installs 00-mesa-defaults.conf which means we have to
backport the drirc RADV changes.

This splits 00-mesa-defaults.conf in two to move the drirc RADV entries
to src/amd/vulkan/00-radv-defaults.conf. Meson will install the file
only if RADV is built.

There is still a caveat for common drirc workarounds like for WSI but
they are rare enough and we could still duplicate them if needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15152>
2022-02-25 15:05:56 +01:00
Timur Kristóf
d2d6eca081 radv: Refactor mesh shader draws and add num_workgroups.
Several of the new draw packets need this argument
including all of the taskmesh commands, so it's
best to always declare it.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15034>
2022-02-25 06:31:33 +00:00
Timur Kristóf
1ee3d49e3e radv: Better exclude special MS outputs from driver location assignment.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15034>
2022-02-25 06:31:33 +00:00
Samuel Pitoiset
a2c1fa9137 radv: initialize extra state for internal pipelines at one place
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14650>
2022-02-23 22:29:55 +00:00
Samuel Pitoiset
959e8586aa radv: remove useless radv_blend_state::single_cb_enable field
This was only used for meta operations. DCC/FMASK/FCE pipelines
only declare one color attachment and the color writemask of the
second color attachment is 0 for the HW CB resolve.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14650>
2022-02-23 22:29:55 +00:00
Samuel Pitoiset
8347d3dfd7 radv: initialize VGT_GS_OUT_PRIM_TYPE earlier
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14650>
2022-02-23 22:29:55 +00:00
Samuel Pitoiset
9fb0831ca1 radv: initialize more depth/stencil states earlier
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14650>
2022-02-23 22:29:55 +00:00
Samuel Pitoiset
83ee08f6d1 radv: fix build on BSD
Just disable inotify for BDS systems.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6060
Fixes: c50557d961 ("radv: allow applications to dynamically change RADV_FORCE_VRS")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15105>
2022-02-22 17:16:21 +00:00
Marek Olšák
197467c238 amd: add a workaround for an SQ perf counter bug
Cc: mesa-stable@lists.freedesktop.org
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098>
2022-02-22 11:41:04 +00:00
Marek Olšák
95af3cc2f8 amd: remove the _UMD suffix from register definitions
It was mistakenly added to indicate it's for a User-Mode Driver,
but all defined registers in Mesa are.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098>
2022-02-22 11:41:04 +00:00
Erik Faye-Lund
25a37fabb7 vulkan/wsi: untangle buffer-images from prime
Not all Vulkan implementations allows rendering to linear images, so in
order to support scanning out from these on Windows we might have to copy
through a buffer like we do in the PRIME path.

To avoid reimplementing the same, let's instead generalize the code a
bit so it doesn't have to specfy any PRIME-specific details.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12210>
2022-02-22 10:04:34 +00:00
Samuel Pitoiset
369b8cffea radv,aco,llvm: lower adjusting vertex alpha in NIR
Instead of duplicating the same lowering in both compiler backends.
This pass will be used to do more VS input lowering.

fossils-db (Polaris10):
Totals from 48 (0.04% of 135960) affected shaders:
VGPRs: 1692 -> 1684 (-0.47%)
CodeSize: 54016 -> 53964 (-0.10%); split: -0.11%, +0.01%
MaxWaves: 339 -> 341 (+0.59%)
Instrs: 11260 -> 11247 (-0.12%); split: -0.13%, +0.02%
Latency: 88165 -> 88113 (-0.06%); split: -0.07%, +0.01%
InvThroughput: 36153 -> 36093 (-0.17%)
Copies: 583 -> 568 (-2.57%)

fossils-db (Pitcairn):
Totals from 43 (0.03% of 135960) affected shaders:
VGPRs: 1548 -> 1552 (+0.26%)
CodeSize: 47900 -> 47820 (-0.17%)
Instrs: 10751 -> 10731 (-0.19%)
Latency: 83029 -> 82873 (-0.19%)
VClause: 168 -> 164 (-2.38%)
SClause: 393 -> 391 (-0.51%)
Copies: 705 -> 685 (-2.84%)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15076>
2022-02-22 08:08:42 +00:00
Samuel Pitoiset
e6853de6b0 radv: set profile_peak when capturing with SQTT
Using new CTX OP to set/get stable pstates.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14038>
2022-02-21 11:16:11 +00:00
Samuel Pitoiset
5cf4f0cc91 radv/winsys: add support for new CTX OP to set/get stable pstates
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14038>
2022-02-21 11:16:11 +00:00
Alyssa Rosenzweig
294a357b33 panfrost,asahi,radv: Don't set internal=true manually
nir_builder_init_simple_shader does this automatically now.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14936>
2022-02-17 23:30:46 +00:00
Alyssa Rosenzweig
7ec1d96e5e nir: Set internal=true in nir_builder_init_simple_shader
Matches the expected use by callers. We do need to fix up a few callers which
use this call for external shaders.

v2: Fix up a radv call site (Rhys).

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net> [v1]
Acked-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14936>
2022-02-17 23:30:46 +00:00
Samuel Pitoiset
377884c9c8 radv: do not enable per-vertex VRS if the FS uses gl_FragCoord
It breaks postprocessing in some games like Ghostrunner, Deathloop,
Street Fighter V.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15042>
2022-02-16 21:09:12 +00:00
Samuel Pitoiset
3cc53c047a radv: allow to force per-vertex VRS in the tessellation stage
It's more useful than I thought.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15042>
2022-02-16 21:09:12 +00:00
Timur Kristóf
1912503224 radv: Don't disturb dynamic primitive topology with mesh shading.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14653>
2022-02-16 13:42:39 +00:00
Timur Kristóf
da719792ad radv: Disable IB2 on compute queues.
The "IB2" indirect buffer command is not supported on compute queues
according to PAL, and it indeed causes GPU hangs when task shaders are
used together with vkCmdExecuteCommands.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15006>
2022-02-16 13:09:20 +00:00
Samuel Pitoiset
103699677b radv: allow to force per-vertex VRS if the config file is present
This is needed to add the primitive shading rate output to the vertex
or geometry shaders, even if the default value is 1x1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:29 +01:00
Samuel Pitoiset
c50557d961 radv: allow applications to dynamically change RADV_FORCE_VRS
This introduces inotify support in RADV to handle changes from the
RADV_FORCE_VRS_CONFIG_FILE. This is similar to MangoHUD. I'm personally
not sure it's the best solution but let's try this way and change it
later if we have issues (or if we have a lightweight solution).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:29 +01:00
Samuel Pitoiset
5e2d9202e2 radv: add RADV_FORCE_VRS_CONFIG_FILE to configure per-vertex VRS
Similar to RADV_FORCE_VRS but from a file. If present, this is used
instead of RADV_FORCE_VRS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:29 +01:00
Samuel Pitoiset
a862e15ee7 radv: rename RADV_FORCE_VRS_NONE to RADV_FORCE_VRS_1x1 and accept 1x1
It's the default value.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:27 +01:00
Samuel Pitoiset
b4f526cc19 radv: only re-emit the per-vertex VRS rates if necessary
This reduces the overhead slightly when the VRS rates don't change.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:23 +01:00
Samuel Pitoiset
99d7c13051 radv: rework RADV_FORCE_VRS to make it more dynamic
The VRS rates are now emitted from the command buffer via an user SGPR
which will allow to change the rates dynamically in later changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:21 +01:00
Samuel Pitoiset
85436896c4 radv: declare a new shader argument for loading the VRS rates
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:15 +01:00
Samuel Pitoiset
32155851f1 radv: remove set but unused radv_buffer::shareable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14937>
2022-02-14 09:28:17 +00:00
Samuel Pitoiset
af420833f0 radv: remove useless NULL checks in vkBind{Buffer,Image}Memory2()
The memory object must be a valid vkDeviceMemory handle.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14937>
2022-02-14 09:28:17 +00:00
Samuel Pitoiset
2dcd12f38b radv: fix finding shaders by PC
Shaders are allocated contiguously in memory for a pipeline and
the freelist.next pointer is a pointer to the pipeline now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14950>
2022-02-14 08:31:14 +01:00
Samuel Pitoiset
306e153c18 radv: make the trap handler shader BO resident
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14950>
2022-02-14 08:31:12 +01:00
Samuel Pitoiset
a224b7a057 radv: fix allocating/uploading the trap handler shader
Since shaders are allocated per pipeline, the trap handler shader
was not uploaded at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14950>
2022-02-14 08:31:10 +01:00
Bas Nieuwenhuizen
d8d32cf773 radv: Only wait on CS/PS to finish if we wait on a semaphore.
I think plain submission doesn't need it.

Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14574>
2022-02-11 23:45:24 +00:00
Bas Nieuwenhuizen
79131b6ee6 radv: Fix preamble argument order.
Used the wrong cmdbuffer in the wrong situation. Oops.

Fixes: 915e9178fa ("radv: Split out commandbuffer submission.")
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14574>
2022-02-11 23:45:24 +00:00
Bas Nieuwenhuizen
7adb3c0f7f radv: Use larger arena sizes.
For some games that take like 400 MiB of shader binaries, the
number of shader arenas ends up going >1500. Cut that down a bit
by using larger arenas.

8 MiB should still be decent with small BAR and should still cut
things down from ~1500 to ~50 buffers.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14591>
2022-02-11 23:20:21 +00:00
Samuel Pitoiset
aa3405e812 radv/winsys: fix initializing debug/perftest options if multiple instances
Since the winsys uses refcount, options like RADV_DEBUG_ZERO_VRAM might
have not been initialized if the first instance wasn't created with
application info.

This fixes missing zerovram for vkd3d-proton.

Cc: 21.3 22.0 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14978>
2022-02-11 16:12:47 +01:00
Daniel Schürmann
af4b26c53a radv: move nir_opt_shrink_stores from radv_optimize_nir()
No need to call this pass in a loop.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14480>
2022-02-11 11:50:52 +01:00
Daniel Schürmann
2a92452a0e nir/opt_shrink_vectors: Remove shrinking of store intrinsics data source
This is done via nir_opt_shrink_stores.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14480>
2022-02-11 11:50:47 +01:00
Jason Ekstrand
bda4c4f6b6 vulkan: Take a vk_command_pool in vk_command_buffer_init()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
2022-02-11 08:06:25 +00:00
Jason Ekstrand
29a164b088 radv: Use vk_command_pool
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
2022-02-11 08:06:24 +00:00
Louis-Francis Ratté-Boulianne
5e263cc324 vulkan/runtime: Add a level field to vk_command_buffer
Looks like 3 implementations already have that field in their private
command_buffer struct, and having it at the vk_command_buffer opens the
door for generic (but suboptimal) secondary command buffer support.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
2022-02-11 08:06:24 +00:00
Daniel Schürmann
fce6ca0f3a radv: remove exports without color attachment or writemask
This lets us make use of NIR's more advanced DCE.
This includes removing of CF constructs, PS inputs and VS outputs.

Totals from 1959 (1.45% of 134913) affected shaders: (GFX10.3)
VGPRs: 73464 -> 71944 (-2.07%); split: -3.79%, +1.72%
SpillSGPRs: 6 -> 0 (-inf%)
CodeSize: 4860324 -> 4675248 (-3.81%); split: -4.92%, +1.11%
LDS: 2619904 -> 2781696 (+6.18%); split: -0.37%, +6.55%
MaxWaves: 50614 -> 50852 (+0.47%); split: +1.63%, -1.16%
Instrs: 924233 -> 887836 (-3.94%); split: -5.01%, +1.07%
Latency: 5635532 -> 5418083 (-3.86%); split: -4.53%, +0.67%
InvThroughput: 1107764 -> 1077542 (-2.73%); split: -3.44%, +0.71%
VClause: 17361 -> 16163 (-6.90%); split: -8.38%, +1.47%
SClause: 31886 -> 29323 (-8.04%); split: -8.52%, +0.48%
Copies: 53529 -> 52127 (-2.62%); split: -5.30%, +2.68%
Branches: 22993 -> 22802 (-0.83%); split: -3.44%, +2.61%
PreSGPRs: 53123 -> 51395 (-3.25%); split: -3.60%, +0.35%
PreVGPRs: 59699 -> 57424 (-3.81%); split: -5.13%, +1.32%

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14771>
2022-02-10 14:23:26 +00:00
Bas Nieuwenhuizen
8d5be0a2b3 radv: Add submit locking with trace bo.
Otherwise cmdbuffers from different queues can override the trace id
from each other, making for a very confusing hang report.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14868>
2022-02-10 03:49:02 +00:00
Samuel Pitoiset
53dc5f774d radv: only emit the per-vertex VRS state if the pipeline forced it
If the primitive shading rate is not written by the last VGT stage
(like if no FS), it's useless to emit the VRS state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14907>
2022-02-09 17:40:37 +01:00