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radv: declare a new shader argument for loading the VRS rates

Browse source 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
This commit is contained in:
Samuel Pitoiset 2022-01-25 08:57:54 +01:00
parent 74b932f8d3
commit 85436896c4
4 changed files with 27 additions and 1 deletions
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1
src/amd/common/ac_shader_args.h
View file

@ -143,6 +143,7 @@ struct ac_shader_args {
struct ac_arg view_index;
struct ac_arg sbt_descriptors;
struct ac_arg ray_launch_size;
struct ac_arg force_vrs_rates;
};
void ac_add_arg(struct ac_shader_args *info, enum ac_arg_regfile regfile, unsigned registers,

4
src/amd/vulkan/radv_shader.h
View file

@ -144,7 +144,8 @@ enum radv_ud_index {
AC_UD_NGG_GS_STATE = 6,
AC_UD_NGG_CULLING_SETTINGS = 7,
AC_UD_NGG_VIEWPORT = 8,
AC_UD_SHADER_START = 9,
AC_UD_FORCE_VRS_RATES = 9,
AC_UD_SHADER_START = 10,
AC_UD_VS_VERTEX_BUFFERS = AC_UD_SHADER_START,
AC_UD_VS_BASE_VERTEX_START_INSTANCE,
AC_UD_VS_PROLOG_INPUTS,
@ -249,6 +250,7 @@ struct radv_shader_info {
uint32_t num_lds_blocks_when_not_culling;
uint32_t num_tess_patches;
unsigned workgroup_size;
bool force_vrs_per_vertex;
struct {
uint8_t input_usage_mask[RADV_VERT_ATTRIB_MAX];
uint8_t output_usage_mask[VARYING_SLOT_VAR31 + 1];

20
src/amd/vulkan/radv_shader_args.c
View file

@ -248,6 +248,9 @@ allocate_user_sgprs(const struct radv_nir_compiler_options *options,
if (needs_view_index)
user_sgpr_count++;
if (info->force_vrs_per_vertex)
user_sgpr_count++;
if (info->loads_push_constants)
user_sgpr_count++;
@ -624,6 +627,10 @@ radv_declare_shader_args(const struct radv_nir_compiler_options *options,
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.view_index);
}
if (info->force_vrs_per_vertex) {
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.force_vrs_rates);
}
if (info->vs.as_es) {
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.es2gs_offset);
} else if (info->vs.as_ls) {
@ -727,6 +734,10 @@ radv_declare_shader_args(const struct radv_nir_compiler_options *options,
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.view_index);
}
if (info->force_vrs_per_vertex) {
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.force_vrs_rates);
}
if (info->is_ngg) {
declare_ngg_sgprs(info, args, has_api_gs);
}
@ -751,6 +762,10 @@ radv_declare_shader_args(const struct radv_nir_compiler_options *options,
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.view_index);
}
if (info->force_vrs_per_vertex) {
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.force_vrs_rates);
}
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.gs2vs_offset);
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.gs_wave_id);
if (options->explicit_scratch_args) {
@ -811,6 +826,8 @@ radv_declare_shader_args(const struct radv_nir_compiler_options *options,
case MESA_SHADER_VERTEX:
if (args->ac.view_index.used)
set_loc_shader(args, AC_UD_VIEW_INDEX, &user_sgpr_idx, 1);
if (args->ac.force_vrs_rates.used)
set_loc_shader(args, AC_UD_FORCE_VRS_RATES, &user_sgpr_idx, 1);
break;
case MESA_SHADER_TESS_CTRL:
if (args->ac.view_index.used)
@ -824,6 +841,9 @@ radv_declare_shader_args(const struct radv_nir_compiler_options *options,
if (args->ac.view_index.used)
set_loc_shader(args, AC_UD_VIEW_INDEX, &user_sgpr_idx, 1);
if (args->ac.force_vrs_rates.used)
set_loc_shader(args, AC_UD_FORCE_VRS_RATES, &user_sgpr_idx, 1);
if (args->ngg_gs_state.used) {
set_loc_shader(args, AC_UD_NGG_GS_STATE, &user_sgpr_idx, 1);
}

3
src/amd/vulkan/radv_shader_info.c
View file

@ -298,6 +298,9 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
case nir_intrinsic_load_sbt_amd:
info->cs.uses_sbt = true;
break;
case nir_intrinsic_load_force_vrs_rates_amd:
info->force_vrs_per_vertex = true;
break;
default:
break;
}