Commit graph

2577 commits

Author SHA1 Message Date
Timur Kristóf
cff24443fd ac/nir/tess: Clarify when VS-TCS I/O can use registers.
And cleanup some old ugly code.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
2024-04-03 17:37:40 +00:00
Timur Kristóf
9faabdd5dd ac/nir/tess: Remove superfluous args for reserved TCS outputs.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
2024-04-03 17:37:40 +00:00
Timur Kristóf
ae8a954048 ac/nir/tess: Calculate reserved LDS outputs based on IO info.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
2024-04-03 17:37:40 +00:00
Timur Kristóf
c61eb54806 ac/nir/tess: Map TCS LDS IO locations without gaps.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
2024-04-03 17:37:40 +00:00
Timur Kristóf
a167cb9ba3 ac/nir/tess: Return undef when loading an unwritten TCS output.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
2024-04-03 17:37:40 +00:00
Timur Kristóf
a1c821e911 ac/nir/tess: Clarify when a TCS output is stored in LDS or VRAM.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
2024-04-03 17:37:40 +00:00
Timur Kristóf
08baefe18c ac/nir/tess: Load tess factors from variable when they are passed in registers.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
2024-04-03 17:37:40 +00:00
Timur Kristóf
10acebf88f ac/nir: Introduce ac_nir_calc_io_offset_mapped.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28487>
2024-04-03 17:37:40 +00:00
Sathishkumar S
c34cfc1a3b ac/gpu_info: update multimedia info
update multimedia info to show num_instances and firmware version when valid
and video codec capabilities are shown if the query is supported and valid.
Multimedia info: from Navi21 ASIC is shown below.

Multimedia info:
    vcn_decode = 2
    vcn_encode = 2
    vcn_enc_major_version = 1
    vcn_enc_minor_version = 30
    vcn_dec_version = 3
    jpeg_decode = 1
    codec    dec  max_resolution   enc  max_resolution
    mpeg2    *    4096x4096        -    -
    mpeg4    *    4096x4096        -    -
    vc1      *    4096x4096        -    -
    h264     *    4096x4096        *    4096x2160
    hevc     *    8192x4352        *    7680x4352
    jpeg     *    4096x4096        -    -
    vp9      *    8192x4352        -    -
    av1      *    8192x4352        -    -

v2: fix build error with _WIN32 builds
v3: rebase on 76425cdf23 (ac/gpu_info: Add vcn dec and enc version query)

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28252>
2024-04-01 18:05:21 +00:00
Sathishkumar S
583921b2e7 ac/gpu_info: fix regression in vulkan hw decode
commit f3ab454f07 breaks vulkan hardware decoding. num_queues must
not be more than 1 for vcn ip since vcn has to retain context among
dependent jobs. use num_instances variable to track ip count.

Fixes: f3ab454f07 ("ac/gpu_info: query the number of ip instance")

v2: rebase on 76425cdf23 (ac/gpu_info: Add vcn dec and enc version query)

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28252>
2024-04-01 18:05:21 +00:00
Timur Kristóf
96ee0d6711 ac/nir/tess: Remove dead code that was meant for epilogs.
We no longer need to emit store_output intrinsics at the
end of the shaders.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28425>
2024-03-30 21:56:51 +01:00
Timur Kristóf
508f293b14 ac/nir/tess: Emit tess factor stores based on new intrinsics.
This allows the TCS to read the primitive mode and whether
TES reads the tess factors, from an SGPR arg, which lets it
decide how to store them at runtime.

For linked shaders, the conditions will be constant and
NIR optimizations can delete the dead CF.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28408>
2024-03-28 23:44:03 +00:00
Boyuan Zhang
c38a2ab993 radeonsi/vcn: mark rc_per_pic as obsoleted
Rename parameters in rc_per_pic to emphasize that the method is obsoleted
Add warning to recommend users to update VCN FW for the correct rate control

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28234>
2024-03-28 13:09:18 +00:00
Boyuan Zhang
b61ffe2151 radeonsi/vcn: choose rc_per_pic by encode verison
Using VCN FW encode version to check if the current FW support the new
rate control per picture method (ex). If not, roll back to use the previous
rate control per picture method.

Fixes: 5ecf83e9adcd652e6159 ("radeonsi/vcn: Implement separate QP for I/P/B frames")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10793

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28234>
2024-03-28 13:09:18 +00:00
Boyuan Zhang
76425cdf23 ac/gpu_info: Add vcn dec and enc version query
So that driver can query the current VCN FW decode version and encode
major and minor version.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28234>
2024-03-28 13:09:18 +00:00
Timur Kristóf
524c4fa5ad ac/nir/tess: Refactor how the end of HS is emitted.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28371>
2024-03-28 09:41:08 +00:00
Timur Kristóf
96998b448c ac/nir/tess: Emit tess factor output independently of whether it can be passed by registers.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28371>
2024-03-28 09:41:08 +00:00
Timur Kristóf
7a5a462a75 ac/nir/tess: Split tess factor write into multiple functions.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28371>
2024-03-28 09:41:08 +00:00
Timur Kristóf
d53e836d55 ac/nir/tess: Don't record mapped tess level location.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28371>
2024-03-28 09:41:08 +00:00
Timur Kristóf
b7d5d7629a ac/nir/tess: Always record tess level info and use it at the end.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28371>
2024-03-28 09:41:08 +00:00
Ruijing Dong
7525d2242b radeonsi/vcn: add enc surface alignment caps
set [64x16] as the alignment for hevc
encoding surface.

Cc: mesa-stable
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28280>
2024-03-25 14:38:46 +00:00
Marek Olšák
1585a5cc6d nir,amd: add nir_intrinsic_load_debug_log_desc_amd and its use
for shader debugging

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27952>
2024-03-22 21:58:02 +00:00
Marek Olšák
6773595ed0 nir: rename AMD XFB intrinsics to *_gfx11_amd
to indicate it's only for gfx11.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27952>
2024-03-22 21:58:02 +00:00
Samuel Pitoiset
be4a6b946a radv: add a workaround for null IBO on GFX6
Based on PAL.

Fixes dEQP-VK.draw.*nulldescriptor_maintenance_5_maintenance6 on GFX6.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28263>
2024-03-20 16:27:58 +00:00
Konstantin Seurer
a78cbc98cc ac: Improve context roll readability
Add new lines to improve visual separation and color registers:
- red = unchanged
- green = changed

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27549>
2024-03-19 16:08:14 +00:00
Konstantin Seurer
bf15688fa1 ac/parse_ib: Implement annotations
Annotates the IB dump with driver specified strings.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27549>
2024-03-19 16:08:13 +00:00
Konstantin Seurer
0f436e0fe1 ac/parse_ib: Replace the parameter list with ac_ib_parser
It's more code but it should be more readable. This also makes adding
optional arguments easier.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27549>
2024-03-19 16:08:13 +00:00
Konstantin Seurer
2e4d365104 ac: Annotate context rolls
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27549>
2024-03-19 16:08:13 +00:00
Marek Olšák
82aca689c1 ac: use the gfx11 shadowed register tables for gfx11.5
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27943>
2024-03-11 23:36:55 +00:00
Samuel Pitoiset
d12984edb8 ac/nir: fix exporting NGG streamout outputs with implicit PrimId from VS/TES
With RADV, when VS/TES and FS are compiled separately, the PrimitiveId
is exported unconditionally because it's not possible to know if the
FS reads it or not. This happens with fast-link GPL and shader object.

Though, the PrimitiveID should be ignored when it's implicitly exported
because otherwise the stream output LDS offset is incorrect.

This fixes a bunch of failures with transform feedback and Zink/RADV
when shader object is enabled on RDNA3.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27981>
2024-03-11 16:28:32 +00:00
Sathishkumar S
f3ab454f07 ac/gpu_info: query the number of ip instance
query the number of ip instances for VCN and JPEG

v2: use num_queues and remove new variable (Marek)
v3: remove whitespace (Leo)
v4: remove redundant print jpeg_decode (Marek)

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27884>
2024-03-04 13:41:56 +00:00
Saleemkhan Jamadar
4ed4058910 radeonsi/vcn: set jpeg reg version for gfx 1151
select appropriate jpeg reg version for gfx 1151

Co-authored-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27811>
2024-03-04 04:43:53 +00:00
Yifan Zhang
8446604dd4 amd: Add code to enable gfx11.5.1
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27811>
2024-03-04 04:43:53 +00:00
David Rosca
cbbed6ca3e radeonsi/vcn: Implement separate QP for I/P/B frames
This also fixes max_au_size as a side effect of using new IB.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27558>
2024-02-29 16:12:13 +00:00
Ruijing Dong
5663221bdb radeonsi/vcn: data structure av1 enc long term reference.
Here it borrowed the term "long term reference" to represent
the customized reference frame rather than the default ones used.

To enable that, it needs application to leverage VAAPI existing
interface to mark a frame as "long term reference", and then
it will be preserved in the DPB for later usage. This preserved
frame later could be refered to by having its signature used in
the ref_frame_idx[] list, and the index can be indicated by
RefFrameCtrl index2, which has not been used for other purpose.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27771>
2024-02-27 20:20:45 +00:00
Konstantin Seurer
d95c30b6ec ac/parese_ib: Handle more packets
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27451>
2024-02-22 19:25:39 +00:00
Konstantin Seurer
ebbbca005e ac/parse_ib: Handle 32bit PKT3_DISPATCH_INDIRECT addrs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27451>
2024-02-22 19:25:39 +00:00
Konstantin Seurer
fea21e5649 ac/parse_ib: Annotate addresses with UAF/OOB info
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27451>
2024-02-22 19:25:39 +00:00
Konstantin Seurer
badd2131b5 ac/parse_ib: Dump the ADDR field of PKT3_SET_BASE
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27451>
2024-02-22 19:25:39 +00:00
Konstantin Seurer
160d18b273 ac/parse_ib: Add and use print_addr
Writes the whole address on one line.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27451>
2024-02-22 19:25:39 +00:00
Konstantin Seurer
ba6d6e5ee1 amd/common: Use the correct register table for GFX10_3
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27322>
2024-02-12 14:04:24 +00:00
Pierre-Eric Pelloux-Prayer
02fe3c32cd ac, radeonsi: remove has_syncobj, has_fence_to_handle
syncobj support is now required so these features are always
available.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24724>
2024-01-26 16:02:26 +00:00
Pierre-Eric Pelloux-Prayer
d25201903d winsys/amdgpu: use syncobj rather than amdgpu fence
syncobjs provide the same features and allow to unify code
paths because we don't need to handle imported syncobj
separately.

This simplifies the code and doesn't seem to have any perf
impact.

Syncobjs are supported in amdgpu since kernel commit 660e855813f78
during 4.12 cycle but the minor version wasn't bumped so use
the next bump value asthe minimum supported version.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24724>
2024-01-26 16:02:26 +00:00
Karol Herbst
f2b7c4ce29 nir: rework and fix rotate lowering
No driver supports urol/uror on all bit sizes. Intel gen11+ only for 16
and 32 bit, Nvidia GV100+ only for 32 bit. Etnaviv can support it on 8,
16 and 32 bit.

Also turn the `lower` into a `has` option as only two drivers actually
support `uror` and `urol` at this momemt.

Fixes crashes with CL integer_rotate on iris and nouveau since we emit
urol for `rotate`.

v2: always lower 64 bit

Fixes: fe0965afa6 ("spirv: Don't use libclc for rotate")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by (Intel and nir): Ian Romanick <ian.d.romanick@intel.com>

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27090>
2024-01-22 10:27:44 +00:00
Samuel Pitoiset
5c03cdbd02 radv: fix indirect dispatches on the compute queue on GFX7
GFX7 CP requires the indirect dispatch VA to be aligned to 32-bytes.

This fixes dEQP-VK.api.command_buffers.many_indirect_disps_on_secondary,
but it's unexpected that it uncovered this bug.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27148>
2024-01-22 07:41:05 +00:00
Marek Olšák
b9b00a0e7a ac,radeonsi: emulate GS primitive pipeline stat on gfx11 because of culling
GS culls too, so the pipeline stat is incorrect. This can be exposed by
forcing monolithic shader use, which makes culling shaders immediately
available for tests to use.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:55 +00:00
Marek Olšák
1d3f937142 ac/nir: simplify code at the beginning of ac_nir_gs_shader_query
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:54 +00:00
Marek Olšák
4747bd6ba8 ac/nir: optimize out multiplications in small line culling
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:54 +00:00
Marek Olšák
0d74123633 ac/nir: rename clipdist_enable_mask -> clip_cull_dist_mask
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:54 +00:00
Marek Olšák
af4e91f6b8 ac/nir: don't write TCS outputs to memory if no_varying is set
nir_opt_varyings() will set this, making it unnecessary to look
at the TES input mask.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:54 +00:00